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1. 发明授权

US07790591B2 Methods of manufacturing semiconductor devices including metal oxide layers 有权
标题翻译：制造包括金属氧化物层的半导体器件的方法
公开(公告)号：US07790591B2
公开(公告)日：2010-09-07
申请号：US12270014
申请日：2008-11-13
申请人： Dong-chul Yoo , Myoung-bum Lee , Young-geun Park , Han-mei Choi , Se-hoon Oh , Byong-ju Kim , Kyong-won An , Seon-ho Jo
发明人： Dong-chul Yoo , Myoung-bum Lee , Young-geun Park , Han-mei Choi , Se-hoon Oh , Byong-ju Kim , Kyong-won An , Seon-ho Jo
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/31616 , H01L21/02178 , H01L21/02181 , H01L21/022 , H01L21/02271 , H01L21/0228 , H01L21/28273 , H01L21/28282 , H01L21/3141 , H01L21/3142 , H01L21/3145 , H01L21/31604
摘要： Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating layer may be formed by forming a lower metal oxide layer at a first temperature and forming an upper metal oxide layer on the lower metal oxide layer at a second temperature, lower than the first temperature.
摘要翻译：提供了制造半导体器件的方法，包括在半导体衬底上的栅极绝缘层上形成电荷存储层。在电荷存储层上形成阻挡绝缘层，在隔离绝缘层上形成电极层。阻挡绝缘层可以通过在第一温度下形成下部金属氧化物层并在低于第一温度的第二温度下在下部金属氧化物层上形成上部金属氧化物层而形成。

2. 发明申请

US20090124071A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20090124071A1
公开(公告)日：2009-05-14
申请号：US12270033
申请日：2008-11-13
申请人： Dong-chul Yoo , Han-mei Choi , Kwang-hee Lee , Kyong-won An , Cha-young Yoo
发明人： Dong-chul Yoo , Han-mei Choi , Kwang-hee Lee , Kyong-won An , Cha-young Yoo
IPC分类号： H01L21/28 , H01L21/316
CPC分类号： H01L29/792 , H01L21/02178 , H01L21/02181 , H01L21/022 , H01L21/02271 , H01L21/02337 , H01L21/3115 , H01L21/3162 , H01L21/31645 , H01L29/513 , H01L29/66825 , H01L29/66833 , H01L29/7881
摘要： Provided is a method of manufacturing a semiconductor device. The method includes: forming a charge storage layer on a substrate on which a gate insulating layer is formed; forming a first metal oxide layer on the charge storage layer using a first reaction source including a metal oxide layer precursor and a first oxidizing agent and changing the first metal oxide layer to a second metal oxide layer using a second reaction source including a second oxidizing agent having larger oxidizing power than the first oxidizing agent and repeating the forming of the first metal oxide layer and the changing of the first metal oxide layer to the second metal oxide layer several times to form a blocking insulating layer; and forming an electrode layer on the blocking insulating layer.
摘要翻译：提供一种制造半导体器件的方法。该方法包括：在其上形成有栅极绝缘层的基板上形成电荷存储层; 使用包括金属氧化物层前体和第一氧化剂的第一反应源在电荷存储层上形成第一金属氧化物层，并且使用包括第二氧化剂的第二反应源将第一金属氧化物层改变为第二金属氧化物层具有比第一氧化剂更大的氧化能力，并且重复形成第一金属氧化物层和将第一金属氧化物层改变为第二金属氧化物层数次以形成阻挡绝缘层; 以及在所述阻挡绝缘层上形成电极层。

3. 发明授权

US07964462B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07964462B2
公开(公告)日：2011-06-21
申请号：US12270033
申请日：2008-11-13
申请人： Dong-chul Yoo , Han-mei Choi , Kwang-hee Lee , Kyong-won An , Cha-young Yoo
发明人： Dong-chul Yoo , Han-mei Choi , Kwang-hee Lee , Kyong-won An , Cha-young Yoo
IPC分类号： H01L21/336
CPC分类号： H01L29/792 , H01L21/02178 , H01L21/02181 , H01L21/022 , H01L21/02271 , H01L21/02337 , H01L21/3115 , H01L21/3162 , H01L21/31645 , H01L29/513 , H01L29/66825 , H01L29/66833 , H01L29/7881
摘要： Provided is a method of manufacturing a semiconductor device. The method includes: forming a charge storage layer on a substrate on which a gate insulating layer is formed; forming a first metal oxide layer on the charge storage layer using a first reaction source including a metal oxide layer precursor and a first oxidizing agent and changing the first metal oxide layer to a second metal oxide layer using a second reaction source including a second oxidizing agent having larger oxidizing power than the first oxidizing agent and repeating the forming of the first metal oxide layer and the changing of the first metal oxide layer to the second metal oxide layer several times to form a blocking insulating layer; and forming an electrode layer on the blocking insulating layer.
摘要翻译：提供一种制造半导体器件的方法。该方法包括：在其上形成有栅极绝缘层的基板上形成电荷存储层; 使用包括金属氧化物层前体和第一氧化剂的第一反应源在电荷存储层上形成第一金属氧化物层，并且使用包括第二氧化剂的第二反应源将第一金属氧化物层改变为第二金属氧化物层具有比第一氧化剂更大的氧化能力，并且重复形成第一金属氧化物层和将第一金属氧化物层改变为第二金属氧化物层数次以形成阻挡绝缘层; 以及在所述阻挡绝缘层上形成电极层。

4. 发明授权

US08748249B2 Vertical structure non-volatile memory device and method of manufacturing the same 有权
标题翻译：垂直结构非易失性存储器件及其制造方法
公开(公告)号：US08748249B2
公开(公告)日：2014-06-10
申请号：US13456415
申请日：2012-04-26
申请人： Jun-kyu Yang , Ki-hyun Hwang , Phil-ouk Nam , Jae-young Ahn , Han-mei Choi , Dong-chul Yoo
发明人： Jun-kyu Yang , Ki-hyun Hwang , Phil-ouk Nam , Jae-young Ahn , Han-mei Choi , Dong-chul Yoo
IPC分类号： H01L21/8238
CPC分类号： H01L29/7926 , H01L27/11556 , H01L27/11582 , H01L29/7889
摘要： A vertical structure non-volatile memory device in which a gate dielectric layer is prevented from protruding toward a substrate; a resistance of a ground selection line (GSL) electrode is reduced so that the non-volatile memory device is highly integrated and has improved reliability, and a method of manufacturing the same are provided. The method includes: sequentially forming a polysilicon layer and an insulating layer on a silicon substrate; forming a gate dielectric layer and a channel layer through the polysilicon layer and the insulating layer, the gate dielectric layer and the channel layer extending in a direction perpendicular to the silicon substrate; forming an opening for exposing the silicon substrate, through the insulating layer and the polysilicon layer; removing the polysilicon layer exposed through the opening, by using a halogen-containing reaction gas at a predetermined temperature; and filling a metallic layer in the space formed by removing the polysilicon layer.
摘要翻译：一种垂直结构的非易失性存储器件，其中防止栅介质层向衬底突出; 降低了接地选择线（GSL）电极的电阻，使得非易失性存储器件高度集成并且具有改进的可靠性，并且提供了其制造方法。该方法包括：在硅衬底上依次形成多晶硅层和绝缘层; 通过所述多晶硅层和所述绝缘层形成栅介质层和沟道层，所述栅介质层和所述沟道层在垂直于所述硅衬底的方向上延伸; 形成用于使所述硅衬底暴露于所述绝缘层和所述多晶硅层的开口; 通过在预定温度下使用含卤素反应气体去除通过开口暴露的多晶硅层; 并在通过去除多晶硅层形成的空间中填充金属层。

5. 发明申请

US20150115348A1 VERTICAL-TYPE NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：垂直型非易失性存储器件及其制造方法
公开(公告)号：US20150115348A1
公开(公告)日：2015-04-30
申请号：US14525361
申请日：2014-10-28
申请人： Phil-ouk Nam , Jun-kyu Yang , Hun-hyeong Lim , Ki-hyun Hwang , Jae-young Ahn , Dong-chul Yoo
发明人： Phil-ouk Nam , Jun-kyu Yang , Hun-hyeong Lim , Ki-hyun Hwang , Jae-young Ahn , Dong-chul Yoo
IPC分类号： H01L27/115 , H01L21/3205 , H01L29/66 , H01L21/02 , H01L29/792
CPC分类号： H01L27/11582 , H01L27/11524 , H01L27/11575 , H01L29/66666 , H01L29/66833 , H01L29/7926
摘要： A vertical-type nonvolatile memory device includes a first vertical channel structure, and first and second stacked structure. The first vertical channel structure extends vertically on a substrate. The first stacked structure includes gate electrodes and first interlayer insulating layers. The gate layers and the first interlayer insulating layers are alternately and vertically stacked on each other. The first stacked structure is disposed on a first sidewall of the first vertical channel structure. The second stacked structure includes first sacrificial layers and second interlayer insulating layers. The first sacrificial layers and the second interlayer insulating layers are alternately and vertically stacked on each other. The second stacked structure is disposed on a second sidewall of the first vertical channel structure. The first sacrificial layers is formed of a polysilicon layer.
摘要翻译：垂直型非易失性存储器件包括第一垂直沟道结构以及第一和第二堆叠结构。第一垂直通道结构在衬底上垂直延伸。第一堆叠结构包括栅电极和第一层间绝缘层。栅极层和第一层间绝缘层彼此交替地和垂直地堆叠。第一堆叠结构设置在第一垂直通道结构的第一侧壁上。第二堆叠结构包括第一牺牲层和第二层间绝缘层。第一牺牲层和第二层间绝缘层彼此交替地和垂直地堆叠。第二堆叠结构设置在第一垂直通道结构的第二侧壁上。第一牺牲层由多晶硅层形成。

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