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    • 2. 发明申请
    • Low voltage data transmitting circuit and associated methods
    • 低压数据传输电路及相关方法
    • US20080218292A1
    • 2008-09-11
    • US12073313
    • 2008-03-04
    • Dong-Uk ParkJin-Ho SeoJae-Jin Park
    • Dong-Uk ParkJin-Ho SeoJae-Jin Park
    • H01P5/12
    • G06F13/4086
    • A low voltage data transmitting circuit (LVDTC) may be connected to a first transmission line that transmits a first voltage signal to a receiver and a second transmission line that transmits a second voltage signal to the receiver. The LVDTC includes a first resistor coupled to the first transmission line, a second resistor coupled to the second transmission line, and a control unit coupled to the first transmission line and the second transmission line, the control unit being configured to control voltage levels of the first and second voltage signals such that the voltage levels of the first and second voltage signals are higher than a ground voltage level of the receiver, wherein the first and second voltage signals may constitute a differential pair.
    • 低压数据发送电路(LVDTC)可以连接到向接收机发送第一电压信号的第一传输线和向接收机发送第二电压信号的第二传输线。 LVDTC包括耦合到第一传输线的第一电阻器,耦合到第二传输线的第二电阻器和耦合到第一传输线路和第二传输线路的控制单元,该控制单元被配置为控制 第一和第二电压信号,使得第一和第二电压信号的电压电平高于接收器的接地电压电平,其中第一和第二电压信号可以构成差分对。
    • 5. 发明申请
    • Method for sampling reverse data and a reverse data sampling circuit for performing the same
    • 用于对反向数据进行采样的方法和用于执行相反数据的反向数据采样电路
    • US20060222131A1
    • 2006-10-05
    • US11369033
    • 2006-03-06
    • Dong-Uk Park
    • Dong-Uk Park
    • H04L7/00
    • H04L7/0338
    • A method for sampling reverse data and a reverse data sampling circuit for performing the same are provided. The reverse data sampling method of a host interface device includes generating a multi-phase clock; sampling clocks corresponding to respective phases of the multi-phase clock at a transition of a reverse data signal to generate clock sampling signals; sampling the reverse data signal at a transition of the clocks corresponding to the respective phases of the multi-phase clock to generate data sampling signals; selecting a sampling clock from the clocks corresponding to the respective phases of the multi-phase clock by using the clock sampling signals and the data sampling signals; and sampling reverse data at a transition of the sampling clock.
    • 提供了用于对反向数据进行采样的方法和用于执行相反数据的反向数据采样电路。 主机接口装​​置的反向数据采样方法包括:生成多相时钟; 在反向数据信号的转变处对应于多相时钟的相位的采样时钟,以产生时钟采样信号; 在与多相时钟的相位相对应的时钟的转变处对反向数据信号进行采样,以产生数据采样信号; 通过使用时钟采样信号和数据采样信号从与多相时钟的相位相对应的时钟中选择采样时钟; 并在采样时钟的转变时采样反向数据。
    • 10. 发明申请
    • CURRENT MODE BUS INTERFACE SYSTEM, METHOD OF PERFORMING A MODE TRANSITION AND MODE CONTROL SIGNAL GENERATOR FOR THE SAME
    • 电流模式总线接口系统,执行模式转换的方法和模式控制信号发生器
    • US20090132843A1
    • 2009-05-21
    • US12350647
    • 2009-01-08
    • Dong-Uk Park
    • Dong-Uk Park
    • G06F1/32
    • G06F13/4072
    • A current mode bus interface system includes a host interface device configured to transmit a reference current and a clock current, and to transmit a data current during a first transfer mode, and to receive a reverse direction data current and compare the reverse direction data current with the reference current to generate a reverse direction data voltage during a second transfer mode; and a client interface device configured to receive the reference current and the clock current and compare the reference current with the clock current to generate a clock voltage, to receive the data current and compare the data current with the reference current to generate a data voltage during the first transfer mode, and to transmit the reverse direction data current through a conducting wire over which the data current is received during the second transfer mode.
    • 电流模式总线接口系统包括被配置为传送参考电流和时钟电流并且在第一传输模式期间传输数据电流的主机接口设备,并且接收反向数据电流并且将反向数据电流与 所述参考电流在第二传送模式期间产生反向数据电压; 以及客户端接口装置,被配置为接收参考电流和时钟电流,并将参考电流与时钟电流进行比较以产生时钟电压,以接收数据电流并将数据电流与参考电流进行比较以在数据电压期间产生数据电压 第一传送模式,并且通过在第二传送模式期间接收数据电流的导线传输反向数据电流。