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1. 发明授权

US07339211B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07339211B2
公开(公告)日：2008-03-04
申请号：US10625277
申请日：2003-07-23
申请人： Dong-Sauk Kim , Ho-Seok Lee , Byung-Jun Park , Il-Young Kwon , Jong-Min Lee , Hyeong-Soo Kim , Jin-Woong Kim , Hyung-Bok Choi , Dong-Woo Shin
发明人： Dong-Sauk Kim , Ho-Seok Lee , Byung-Jun Park , Il-Young Kwon , Jong-Min Lee , Hyeong-Soo Kim , Jin-Woong Kim , Hyung-Bok Choi , Dong-Woo Shin
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H01L27/10855 , H01L27/0207 , H01L27/10814
摘要： Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a plurality of capacitor plugs disposed in an orderly separation distance; and a plurality of lower electrodes used for a capacitor and disposed in an orderly separation distance to be respectively connected with the capacitor plugs.
摘要翻译：公开了半导体装置及其制造方法，其能够通过扩大有效的电容器面积来形成下部电极并且通过扩大电容器的足够的电容来防止由倾斜或提升现象引起的较短的下部电极。本发明的半导体器件包括：以有序的间隔距离设置的多个电容器插头; 以及多个用于电容器的下电极，并且以与电容器插头分别连接的有序分隔距离设置。

2. 发明申请

US20070085128A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070085128A1
公开(公告)日：2007-04-19
申请号：US11608672
申请日：2006-12-08
申请人： Dong-Sauk KIM , Ho-Seok Lee , Byung-Jun Park , Il-Young Kwon , Jong-Min Lee , Hyeong-Soo Kim , Jin-Woong Kim , Hyung-Bok Choi , Dong-Woo Shin
发明人： Dong-Sauk KIM , Ho-Seok Lee , Byung-Jun Park , Il-Young Kwon , Jong-Min Lee , Hyeong-Soo Kim , Jin-Woong Kim , Hyung-Bok Choi , Dong-Woo Shin
IPC分类号： H01L29/76
CPC分类号： H01L27/10855 , H01L27/0207 , H01L27/10814
摘要： Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a plurality of capacitor plugs disposed in an orderly separation distance; and a plurality of lower electrodes used for a capacitor and disposed in an orderly separation distance to be respectively connected with the capacitor plugs.
摘要翻译：公开了半导体装置及其制造方法，其能够通过扩大有效的电容器面积来形成下部电极并且通过扩大电容器的足够的电容来防止由倾斜或提升现象引起的较短的下部电极。本发明的半导体器件包括：以有序的间隔距离设置的多个电容器插头; 以及多个用于电容器的下电极，并且以与电容器插头分别连接的有序分隔距离设置。

3. 发明申请

US20050018525A1 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050018525A1
公开(公告)日：2005-01-27
申请号：US10625277
申请日：2003-07-23
申请人： Dong-Sauk Kim , Ho-Seok Lee , Byung-Jun Park , Il-Young Kwon , Jong-Min Lee , Hyeong-Soo Kim , Jin-Woong Kim , Hyung-Bok Choi , Dong-Woo Shin
发明人： Dong-Sauk Kim , Ho-Seok Lee , Byung-Jun Park , Il-Young Kwon , Jong-Min Lee , Hyeong-Soo Kim , Jin-Woong Kim , Hyung-Bok Choi , Dong-Woo Shin
IPC分类号： H01L21/8242 , G11C8/02 , H01L21/82 , H01L27/02 , H01L27/10 , H01L27/108
CPC分类号： H01L27/10855 , H01L27/0207 , H01L27/10814
摘要： Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a plurality of capacitor plugs disposed in an orderly separation distance; and a plurality of lower electrodes used for a capacitor and disposed in an orderly separation distance to be respectively connected with the capacitor plugs.
摘要翻译：公开了半导体装置及其制造方法，其能够通过扩大有效的电容器面积来形成下部电极并且通过扩大电容器的足够的电容来防止由倾斜或提升现象引起的较短的下部电极。本发明的半导体器件包括：以有序的间隔距离设置的多个电容器插头; 以及多个用于电容器的下电极，并且以与电容器插头分别连接的有序分隔距离设置。

4. 发明授权

US07666738B2 Method for fabricating capacitor of semiconductor device 失效
标题翻译：制造半导体器件电容器的方法
公开(公告)号：US07666738B2
公开(公告)日：2010-02-23
申请号：US11952767
申请日：2007-12-07
申请人： Dong-Woo Shin , Hyung-Bok Choi , Jong-Min Lee , Jin-Woong Kim
发明人： Dong-Woo Shin , Hyung-Bok Choi , Jong-Min Lee , Jin-Woong Kim
IPC分类号： H01L21/8242
CPC分类号： H01L28/84 , H01L21/32155 , H01L28/91
摘要： The present invention relates to a method for fabricating a capacitor of a semiconductor device. The method includes the steps of: forming a first amorphous silicon layer doped with an impurity in a predetermined first doping concentration suppressing dopants from locally agglomerating; forming an impurity undoped second amorphous silicon layer on the first amorphous silicon layer in an in-situ condition; forming a storage node by patterning the first amorphous silicon layer and the second amorphous silicon layer; forming silicon grains on a surface of the storage node; and doping the impurity to the storage node and the silicon grains until reaching a second predetermined concentration for providing conductivity required by the storage node.
摘要翻译：本发明涉及半导体器件的电容器的制造方法。该方法包括以下步骤：在预定的第一掺杂浓度抑制掺杂剂中形成掺杂有杂质的第一非晶硅层局部凝聚; 在原位条件下在第一非晶硅层上形成杂质未掺杂的第二非晶硅层; 通过图案化所述第一非晶硅层和所述第二非晶硅层来形成存储节点; 在所述存储节点的表面上形成硅晶粒; 以及将杂质掺杂到存储节点和硅晶粒直到达到第二预定浓度以提供存储节点所需的导电性。

5. 发明授权

US07407854B2 Method for fabricating capacitor of semiconductor device 有权
标题翻译：制造半导体器件电容器的方法
公开(公告)号：US07407854B2
公开(公告)日：2008-08-05
申请号：US10749775
申请日：2003-12-30
申请人： Dong-Woo Shin , Hyung-Bok Choi , Jong-Min Lee , Jin-Woong Kim
发明人： Dong-Woo Shin , Hyung-Bok Choi , Jong-Min Lee , Jin-Woong Kim
IPC分类号： H01L21/8242
CPC分类号： H01L28/84 , H01L21/32155 , H01L28/91
摘要： The present invention relates to a method for fabricating a capacitor of a semiconductor device. The method includes the steps of: forming a first amorphous silicon layer doped with an impurity in a predetermined first doping concentration suppressing dopants from locally agglomerating; forming an impurity undoped second amorphous silicon layer on the first amorphous silicon layer in an in-situ condition; forming a storage node by patterning the first amorphous silicon layer and the second amorphous silicon layer; forming silicon grains on a surface of the storage node; and doping the impurity to the storage node and the silicon grains until reaching a second predetermined concentration for providing conductivity required by the storage node.
摘要翻译：本发明涉及半导体器件的电容器的制造方法。该方法包括以下步骤：在预定的第一掺杂浓度抑制掺杂剂中形成掺杂有杂质的第一非晶硅层局部凝聚; 在原位条件下在第一非晶硅层上形成杂质未掺杂的第二非晶硅层; 通过图案化所述第一非晶硅层和所述第二非晶硅层来形成存储节点; 在所述存储节点的表面上形成硅晶粒; 以及将杂质掺杂到存储节点和硅晶粒直到达到第二预定浓度以提供存储节点所需的导电性。

6. 发明授权

US07595526B2 Capacitor and method for fabricating the same 失效
标题翻译：电容器及其制造方法
公开(公告)号：US07595526B2
公开(公告)日：2009-09-29
申请号：US11201306
申请日：2005-08-11
申请人： Dong-Woo Shin , Hyung-Bok Choi
发明人： Dong-Woo Shin , Hyung-Bok Choi
IPC分类号： H01L29/94
CPC分类号： H01L28/84 , H01L27/10817 , H01L27/10852 , H01L28/90
摘要： A method for manufacturing a capacitor in a semiconductor device for securing capacitance without a merging phenomenon during a MPS grain growth process. The manufacturing step begins with a preparation of a substrate. The interlayer dielectric (ILD) layer is formed on the substrate and is etched to form conductive plug. Then, an etch barrier layer and a sacrifice insulating layer are formed on entire surface subsequently. A cylinder typed first electrode is formed over the conductive plug using the sacrifice insulating layer. Thereafter, first meta-stable poly silicon (MPS) grains are formed on inner wall of the first electrode except a bottom region thereof. However, second MPS grains with small sizes can be formed in the bottom region for increasing a storage area of the first electrode. Finally, a dielectric layer and a second electrode are formed on the first electrode subsequently.
摘要翻译：一种用于在MPS晶粒生长过程中用于在没有合并现象的情况下确保电容的半导体器件中的电容器的制造方法。制造步骤从制备基材开始。层间电介质层（ILD）层形成在衬底上并被蚀刻以形成导电插塞。然后，随后在整个表面上形成蚀刻阻挡层和牺牲绝缘层。使用牺牲绝缘层在导电插塞上形成圆筒型第一电极。此后，除了其底部区域之外，在第一电极的内壁上形成第一元稳定多晶硅（MPS）晶粒。然而，可以在底部区域中形成具有小尺寸的第二MPS晶粒，以增加第一电极的存储面积。最后，随后在第一电极上形成电介质层和第二电极。

7. 发明申请

US20050269618A1 Capacitor and method for fabricating the same 失效
标题翻译：电容器及其制造方法
公开(公告)号：US20050269618A1
公开(公告)日：2005-12-08
申请号：US11201306
申请日：2005-08-11
申请人： Dong-Woo Shin , Hyung-Bok Choi
发明人： Dong-Woo Shin , Hyung-Bok Choi
IPC分类号： H01L21/8242 , H01L21/02 , H01L27/108
CPC分类号： H01L28/84 , H01L27/10817 , H01L27/10852 , H01L28/90
摘要： A method for manufacturing a capacitor in a semiconductor device for securing capacitance without a merging phenomenon during a MPS grain growth process. The manufacturing step begins with a preparation of a substrate. The interlayer dielectric (ILD) layer is formed on the substrate and is etched to form conductive plug. Then, an etch barrier layer and a sacrifice insulating layer are formed on entire surface subsequently. A cylinder typed first electrode is formed over the conductive plug using the sacrifice insulating layer. Thereafter, first meta-stable poly silicon (MPS) grains are formed on inner wall of the first electrode except a bottom region thereof. However, second MPS grains with small sizes can be formed in the bottom region for increasing a storage area of the first electrode. Finally, a dielectric layer and a second electrode are formed on the first electrode subsequently.
摘要翻译：一种用于在MPS晶粒生长过程中用于在没有合并现象的情况下确保电容的半导体器件中的电容器的制造方法。制造步骤从制备基材开始。层间电介质层（ILD）层形成在衬底上并被蚀刻以形成导电插塞。然后，随后在整个表面上形成蚀刻阻挡层和牺牲绝缘层。使用牺牲绝缘层在导电插塞上形成圆筒型第一电极。此后，除了其底部区域之外，在第一电极的内壁上形成第一元稳定多晶硅（MPS）晶粒。然而，可以在底部区域中形成具有小尺寸的第二MPS晶粒，以增加第一电极的存储面积。最后，随后在第一电极上形成电介质层和第二电极。

8. 发明授权

US06946356B2 Capacitor and method for fabricating the same 失效
公开(公告)号：US06946356B2
公开(公告)日：2005-09-20
申请号：US10316898
申请日：2002-12-12
申请人： Dong-Woo Shin , Hyung-Bok Choi
发明人： Dong-Woo Shin , Hyung-Bok Choi
IPC分类号： H01L21/8242 , H01L21/02 , H01L27/108 , H01L21/20
CPC分类号： H01L28/84 , H01L27/10817 , H01L27/10852 , H01L28/90
摘要： A method for manufacturing a capacitor in a semiconductor device for securing capacitance without a merging phenomenon during a MPS grain growth process. The manufacturing step begins with a preparation of a substrate. The interlayer dielectric (ILD) layer is formed on the substrate and is etched to form conductive plug. Then, an etch barrier layer and a sacrifice insulating layer are formed on entire surface subsequently. A cylinder typed first electrode is formed over the conductive plug using the sacrifice insulating layer. Thereafter, first meta-stable poly silicon (MPS) grains are formed on inner wall of the first electrode except a bottom region thereof. However, second MPS grains with small sizes can be formed in the bottom region for increasing a storage area of the first electrode. Finally, a dielectric layer and a second electrode are formed on the first electrode subsequently.

9. 发明授权

US09054337B2 Display devices and methods of manufacturing display devices 有权
标题翻译：显示装置和制造显示装置的方法
公开(公告)号：US09054337B2
公开(公告)日：2015-06-09
申请号：US13137266
申请日：2011-08-02
申请人： Dong-Woo Shin , Seung-Wook Chang , Young-Hee Lee , Chun-Gi You , Pil-Soo Ahn , Byoung-Ki Choi
发明人： Dong-Woo Shin , Seung-Wook Chang , Young-Hee Lee , Chun-Gi You , Pil-Soo Ahn , Byoung-Ki Choi
IPC分类号： H01J1/62 , H01J63/04 , H01L51/52 , H01L51/50 , H01L27/32
CPC分类号： H01L51/5265 , H01L27/3244 , H01L27/3248 , H01L27/3258 , H01L51/5036 , H01L51/5206 , H01L51/5275 , H01L2251/558
摘要： A display device includes a first optical resonance layer on a substrate, a switching structure on the first optical resonance layer, a first electrode on the switching structure, a light emitting structure on the first electrode, and a second electrode on the emitting structure. The switching structure may include a switching device and an optical distance controlling insulation layer covering the switching device. A first optical resonance distance for an optical resonance of the light may be provided between an upper face of the first optical resonance layer and a bottom face of the second electrode.
摘要翻译：显示装置包括基板上的第一光谐振层，第一光谐振层上的开关结构，开关结构上的第一电极，第一电极上的发光结构和发光结构上的第二电极。开关结构可以包括覆盖开关装置的开关装置和光学距离控制绝缘层。可以在第一光学谐振层的上表面和第二电极的底面之间设置用于光的共振的第一光学共振距离。

10. 发明申请

US20120098412A1 Display devices and methods of manufacturing display devices 有权
标题翻译：显示装置和制造显示装置的方法
公开(公告)号：US20120098412A1
公开(公告)日：2012-04-26
申请号：US13137266
申请日：2011-08-02
申请人： Dong-Woo Shin , Seung-Wook Chang , Young-Hee Lee , Chun-Gi You , Pil-Soo Ahn , Byoung-Ki Choi
发明人： Dong-Woo Shin , Seung-Wook Chang , Young-Hee Lee , Chun-Gi You , Pil-Soo Ahn , Byoung-Ki Choi
IPC分类号： H01J1/62 , H01J9/24
CPC分类号： H01L51/5265 , H01L27/3244 , H01L27/3248 , H01L27/3258 , H01L51/5036 , H01L51/5206 , H01L51/5275 , H01L2251/558
摘要： A display device includes a first optical resonance layer on a substrate, a switching structure on the first optical resonance layer, a first electrode on the switching structure, a light emitting structure on the first electrode, and a second electrode on the emitting structure. The switching structure may include a switching device and an optical distance controlling insulation layer covering the switching device. A first optical resonance distance for an optical resonance of the light may be provided between an upper face of the first optical resonance layer and a bottom face of the second electrode.
摘要翻译：显示装置包括基板上的第一光谐振层，第一光谐振层上的开关结构，开关结构上的第一电极，第一电极上的发光结构和发光结构上的第二电极。开关结构可以包括覆盖开关装置的开关装置和光学距离控制绝缘层。可以在第一光学谐振层的上表面和第二电极的底面之间设置用于光的共振的第一光学共振距离。

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