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    • 3. 发明授权
    • Ammonia annealed and wet oxidized LPCVD oxide to replace ono films for
high integrated flash memory devices
    • 氨退火和湿氧化LPCVD氧化物以替代用于高集成闪存器件的膜
    • US6162684A
    • 2000-12-19
    • US266714
    • 1999-03-11
    • Kent Kuohua ChangDavid ChiChin-Yang Sun
    • Kent Kuohua ChangDavid ChiChin-Yang Sun
    • H01L21/28H01L21/314H01L29/51H01L21/336
    • H01L21/28202H01L21/28211H01L21/28273H01L21/3144H01L29/511H01L29/518
    • In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising an oxide layer made by low pressure chemical vapor deposition at a temperature from about 600.degree. C. to about 850.degree. C. using SiH.sub.4 and N.sub.2 O, annealing in an NH.sub.3 atmosphere at a temperature from about 800.degree. C. to about 900.degree. C., and wet oxidizing using O.sub.2 and H.sub.2 at a temperature from about 820.degree. C. to about 880.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.
    • 在一个实施例中,本发明涉及一种形成闪速存储器单元的方法,包括在衬底上形成隧道氧化物的步骤; 在隧道氧化物上形成第一多晶硅层; 在所述第一多晶硅层上形成绝缘层,所述绝缘层包括通过使用SiH 4和N 2 O在约600℃至约850℃的温度下由低压化学气相沉积制成的氧化物层,在NH 3气氛中退火 温度为约800℃至约900℃,并在约820℃至约880℃的温度下使用O 2和H 2进行湿氧化。 在所述绝缘层上形成第二多晶硅层; 至少蚀刻第一多晶硅层,第二多晶硅层和绝缘层,从而限定至少一个堆叠栅极结构; 以及在衬底中形成源区和漏区,由此形成至少一个存储单元。
    • 4. 发明授权
    • Nitrogen ion implanted amorphous silicon to produce oxidation resistant
and finer grain polysilicon based floating gates
    • 氮离子注入的非晶硅,以产生抗氧化和更细晶粒多晶硅的浮栅
    • US6114230A
    • 2000-09-05
    • US993443
    • 1997-12-18
    • Kent Kuohua ChangYuesong HeDavid Chi
    • Kent Kuohua ChangYuesong HeDavid Chi
    • H01L21/28H01L29/423H01L29/51H01L21/3205H01L21/44
    • H01L21/28273H01L29/42324H01L29/511
    • A polysilicon-based floating gate is formed so as to be resistant to oxidation that occurs during multiple thermo-cycles in fabrication. Accordingly, edge erase times in NOR-type memory devices may be minimized. Additionally, manufacture of oxidation resistant floating gates reduces variations in edge erase times among multiple NOR-type memory devices. A layer of amorphous silicon is deposited over a silicon substrate by directing a mixture of silane and a phosphene-helium gas mixture at the surface of the silicon substrate. Later, N+ ions are implanted into the amorphous silicon. The amorphous silicon layer is then etched so as to overlap slightly with regions that will later correspond to the source and drain regions. Next, a lower oxide layer of an ONO dielectric is deposited and the device is heated. A thermo-cycle is eliminated by heating the amorphous silicon during formation of the oxide layer rather than immediately following its deposition. Later, the nitride and oxide layers of the ONO dielectric, a second polysilicon layer, a tungsten silicide layer, and SiON layers are successively formed.
    • 形成基于多晶硅的浮栅,以便在制造中的多个热循环期间耐氧化。 因此,NOR型存储器件中的边沿擦除时间可以最小化。 此外,抗氧化浮动栅极的制造减少了多个NOR型存储器件之间的边缘擦除时间的变化。 通过在硅衬底的表面处引导硅烷和磷 - 氦气混合物的混合物,在硅衬底上沉积非晶硅层。 之后,将N +离子注入到非晶硅中。 然后蚀刻非晶硅层,以便稍后与稍后对应于源极和漏极区的区域重叠。 接下来,沉积ONO电介质的低氧化物层,并加热该器件。 通过在形成氧化物层期间加热非晶硅而不是在其沉积之后立即消除热循环。 随后,依次形成ONO电介质,第二多晶硅层,硅化钨层和SiON层的氮化物层和氧化物层。
    • 10. 发明授权
    • LPCVD oxide and RTA for top oxide of ONO film to improve reliability for
flash memory devices
    • LPCVD氧化物和RTA用于ONO膜的顶部氧化物,以提高闪存器件的可靠性
    • US6074917A
    • 2000-06-13
    • US189227
    • 1998-11-11
    • Kent Kuohua ChangDavid ChiChin-Yang Sun
    • Kent Kuohua ChangDavid ChiChin-Yang Sun
    • H01L21/28H01L21/314H01L29/423H01L29/51H01L21/336H01L21/31
    • H01L21/28273H01L21/28202H01L21/28211H01L21/3145H01L29/42324H01L29/511H01L29/518Y10S438/954
    • In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising a first oxide layer over the first polysilicon layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein the second oxide layer is made by forming the second oxide layer by low pressure chemical vapor deposition at a temperature from about 600.degree. C. to about 850.degree. C. using SiH.sub.4 and N.sub.2 O and annealing in an N.sub.2 O atmosphere at a temperature from about 700.degree. C. to about 950.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.
    • 在一个实施例中,本发明涉及一种形成闪速存储器单元的方法,包括在衬底上形成隧道氧化物的步骤; 在隧道氧化物上形成第一多晶硅层; 在所述第一多晶硅层上形成绝缘层,所述绝缘层包括所述第一多晶硅层上的第一氧化物层,所述第一氧化物层上的氮化物层和所述氮化物层上的第二氧化物层,其中所述第二氧化物层被制成 通过使用SiH 4和N 2 O在约600℃至约850℃的温度下通过低压化学气相沉积形成第二氧化物层,并在N2O气氛中在约700℃至约950℃的温度下退火 C。; 在所述绝缘层上形成第二多晶硅层; 至少蚀刻第一多晶硅层,第二多晶硅层和绝缘层,从而限定至少一个堆叠栅极结构; 以及在衬底中形成源区和漏区,由此形成至少一个存储单元。