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1. 发明授权

US07498242B2 Plasma pre-treating surfaces for atomic layer deposition 有权
标题翻译：用于原子层沉积的等离子体预处理表面
公开(公告)号：US07498242B2
公开(公告)日：2009-03-03
申请号：US11359884
申请日：2006-02-21
申请人： Devendra Kumar , Kamal Kishore Goundar , Nathanael R. C. Kemeling , Hideaki Fukuda , Hessel Sprey , Maarten Stokhof
发明人： Devendra Kumar , Kamal Kishore Goundar , Nathanael R. C. Kemeling , Hideaki Fukuda , Hessel Sprey , Maarten Stokhof
IPC分类号： H01L21/322
CPC分类号： H01L21/02063 , C23C14/02 , C23C16/02 , C23C16/36 , C23C16/45525 , C23C16/45531 , H01L21/28562 , H01L21/3105 , H01L21/76807 , H01L21/7681 , H01L21/76826 , H01L21/76831 , H01L21/76843 , H01L21/76846 , H01L21/76873
摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Preferred embodiments are directed to providing conformal lining over openings formed in porous materials. Trenches are formed in, preferably, insulating layers. The layers are then adequately treated with a particular plasma process. Following this plasma treatment a self-limiting, self-saturating atomic layer deposition (ALD) reaction can occur without significantly filling the pores forming improved interconnects.
摘要翻译：提供了集成电路中双镶嵌结构的保形衬里的方法和结构。优选实施例涉及在多孔材料中形成的开口上提供适形衬里。沟槽形成在，优选绝缘层中。然后用特定的等离子体工艺充分处理各层。在这种等离子体处理之后，可以发生自限制的自饱和原子层沉积（ALD）反应，而不显着填充形成改进的互连的孔。

2. 发明申请

US20060216932A1 Plasma pre-treating surfaces for atomic layer deposition 有权
公开(公告)号：US20060216932A1
公开(公告)日：2006-09-28
申请号：US11359884
申请日：2006-02-21
申请人： Devendra Kumar , Kamal Goundar , Nathanael Kemeling , Hideaki Fukuda , Hessel Sprey , Maarten Stokhof
发明人： Devendra Kumar , Kamal Goundar , Nathanael Kemeling , Hideaki Fukuda , Hessel Sprey , Maarten Stokhof
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/02063 , C23C14/02 , C23C16/02 , C23C16/36 , C23C16/45525 , C23C16/45531 , H01L21/28562 , H01L21/3105 , H01L21/76807 , H01L21/7681 , H01L21/76826 , H01L21/76831 , H01L21/76843 , H01L21/76846 , H01L21/76873
摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Preferred embodiments are directed to providing conformal lining over openings formed in porous materials. Trenches are formed in, preferably, insulating layers. The layers are then adequately treated with a particular plasma process. Following this plasma treatment a self-limiting, self-saturating atomic layer deposition (ALD) reaction can occur without significantly filling the pores forming improved interconnects.

3. 发明授权

US10854498B2 Wafer-supporting device and method for producing same 有权
公开(公告)号：US10854498B2
公开(公告)日：2020-12-01
申请号：US13184351
申请日：2011-07-15
申请人： Fumitaka Shoji , Hideaki Fukuda
发明人： Fumitaka Shoji , Hideaki Fukuda
IPC分类号： B05C13/00 , C23C16/458 , B05D5/00 , H01L21/3065 , H01L21/687 , C23C16/509 , C23C16/40
摘要： A wafer-supporting device for supporting a wafer thereon adapted to be installed in a semiconductor-processing apparatus includes: a base surface; and protrusions protruding from the base surface and having rounded tips for supporting a wafer thereon. The rounded tips are such that a reverse side of a wafer is supported entirely by the rounded tips by point contact. The protrusions are disposed substantially uniformly on an area of the base surface over which a wafer is placed, wherein the number (N) and the height (H [μm]) of the protrusions as determined in use satisfy the following inequities per area for a 300-mm wafer: (−0.5N+40)≤H≤53;5≤N≤100.

4. 发明授权

US08924606B2 Storage system and data transfer control method 有权
标题翻译：存储系统和数据传输控制方法
公开(公告)号：US08924606B2
公开(公告)日：2014-12-30
申请号：US13395807
申请日：2012-03-02
申请人： Koji Akiyama , Susumu Tsuruta , Hideaki Fukuda , Hiroshi Shimmura , Shoji Kato
发明人： Koji Akiyama , Susumu Tsuruta , Hideaki Fukuda , Hiroshi Shimmura , Shoji Kato
IPC分类号： G06F13/28 , G06F3/00
CPC分类号： G06F3/061 , G06F3/0659 , G06F3/0689
摘要： It is provided a storage system for inputting and outputting data in accordance with a request from a host computer, comprising: at least one processor for processing data requested to be input or output; a plurality of transfer controllers for transferring data between memories in the storage system; and at least one transfer sequencer for requesting a data transfer to the plurality of transfer controllers in accordance with an instruction from the processor. The processor transmits a series of data transfer requests to the at least one transfer sequencer. The at least one transfer sequencer requests a data transfer to each of the plurality of transfer controllers based on the series of data transfer requests. The each transfer controller transfers data between the memories in accordance with an instruction from the at least one transfer sequencer.
摘要翻译：提供了一种用于根据来自主计算机的请求输入和输出数据的存储系统，包括：用于处理请求输入或输出的数据的至少一个处理器; 用于在存储系统中的存储器之间传送数据的多个传送控制器; 以及至少一个传送定序器，用于根据来自处理器的指令向多个传送控制器请求数据传送。处理器向至少一个传送定序器发送一系列数据传送请求。所述至少一个传送定序器基于所述一系列数据传送请求来请求对所述多个传送控制器中的每一个的数据传送。每个传送控制器根据来自至少一个传送定序器的指令在存储器之间传送数据。

5. 发明授权

US08572342B2 Data transfer device with confirmation of write completion and method of controlling the same 有权
标题翻译：具有写入完成确认的数据传输设备及其控制方法
公开(公告)号：US08572342B2
公开(公告)日：2013-10-29
申请号：US12747086
申请日：2010-06-01
申请人： Masahiro Arai , Hiroshi Hirayama , Masanori Takada , Hiroshi Kanayama , Hideaki Fukuda
发明人： Masahiro Arai , Hiroshi Hirayama , Masanori Takada , Hiroshi Kanayama , Hideaki Fukuda
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G11C7/10 , G06F13/28 , G06F13/4282 , G06F2213/0026
摘要： A data transfer device that confirms completion of writing into a memory on transferring data to the memory via a bus through which a response indicating completion of data writing in the memory is not sent back includes an inter-memory data transfer control unit performing data transfer between the memories. When the inter-memory data transfer control unit detects switching of a write destination memory from a first memory to a second memory, in order to confirm that writing into the first memory is completed, the inter-memory data transfer control unit performs confirmation of write completion as to the first memory by a procedure different from writing into the memory. When a data transfer with a designated transfer length is completed, in order to confirm that writing is completed as to the write destination memory at the end of the data transfer, the inter-memory data transfer control unit performs confirmation of write completion as to the write destination memory at the end of the transfer by the procedure different from writing into the memory. The inter-memory data transfer control unit notifies the processor of completion of an inter-memory data transfer based on the confirmation of write completion.
摘要翻译：一种数据传送装置，其确认写入到存储器中的写入数据经由经由总线的数据传送到存储器，通过该总线不指示在存储器中写入数据的响应的响应不被发回包括存储器间数据传送控制单元，回忆当存储器间数据传送控制单元检测从第一存储器到第二存储器的写入目的地存储器的切换时，为了确认对第一存储器的写入完成，存储器间数据传送控制单元执行写入的确认通过不同于写入内存的过程来完成第一个内存。当具有指定传送长度的数据传输完成时，为了确认在数据传送结束时关于写入目的地存储器的写入完成，存储器间数据传送控制单元执行关于写入完成的确认通过与写入存储器不同的过程在传送结束时写入目标存储器。存储器间数据传送控制单元基于写入完成的确认通知处理器完成存储器间数据传送。

6. 发明申请

US20120164846A1 Method of Forming Metal Oxide Hardmask 有权
标题翻译：金属氧化物硬掩模的形成方法
公开(公告)号：US20120164846A1
公开(公告)日：2012-06-28
申请号：US13333420
申请日：2011-12-21
申请人： Jeongseok Ha , Hideaki Fukuda , Shintaro Kaido
发明人： Jeongseok Ha , Hideaki Fukuda , Shintaro Kaido
IPC分类号： H01L21/316
CPC分类号： H01L21/02153 , G03F1/00 , H01L21/0215 , H01L21/02186 , H01L21/02274 , H01L21/0228 , H01L21/0337
摘要： A method of forming a metal oxide hardmask on a template includes: providing a template constituted by a photoresist or amorphous carbon formed on a substrate; and depositing by atomic layer deposition (ALD) a metal oxide hardmask on the template constituted by a material having a formula SixM(1-x)Oy wherein M represents at least one metal element, x is less than one including zero, and y is approximately two or a stoichiometrically-determined number.
摘要翻译：在模板上形成金属氧化物硬掩模的方法包括：提供由形成在基板上的光致抗蚀剂或无定形碳构成的模板; 并通过原子层沉积（ALD）在由具有式SixM（1-x）Oy的材料构成的模板上沉积金属氧化物硬掩模，其中M表示至少一种金属元素，x小于包括0的一个，y是约两个或化学计量确定的数目。

7. 发明授权

US08103939B2 Storage system and data storage method 失效
标题翻译：存储系统和数据存储方法
公开(公告)号：US08103939B2
公开(公告)日：2012-01-24
申请号：US12155207
申请日：2008-05-30
申请人： Osamu Torigoe , Hideaki Fukuda
发明人： Osamu Torigoe , Hideaki Fukuda
IPC分类号： G06F11/00
CPC分类号： G06F11/108 , G06F2211/1009
摘要： The storage system includes a first memory device configured to store data sent from a host system, a first memory device controller configured to control read/write access of the data from/to the first memory device, an arithmetic circuit unit configured to calculate parity data based on the data, a second memory device configured to store the parity data, a second memory device controller configured to control read/write access of the parity data from/to the second memory device. With this storage system, read access speed of the first memory device is faster than read access speed of the second memory device.
摘要翻译：所述存储系统包括被配置为存储从主机系统发送的数据的第一存储器件，被配置为控制来自/到所述第一存储器件的数据的读/写访问的第一存储器件控制器，被配置为计算奇偶校验数据的算术电路单元基于所述数据，被配置为存储所述奇偶校验数据的第二存储器设备，被配置为控制来自/到所述第二存储器设备的奇偶校验数据的读/写访问的第二存储器设备控制器。利用该存储系统，第一存储器件的读取访问速度比第二存储器件的读取速度快。

8. 发明授权

US08099563B2 Storage device and access instruction sending method 有权
标题翻译：存储设备和访问指令发送方式
公开(公告)号：US08099563B2
公开(公告)日：2012-01-17
申请号：US12081902
申请日：2008-04-23
申请人： Masatomo Ohno , Hideaki Fukuda , Yasuhiro Igarashi
发明人： Masatomo Ohno , Hideaki Fukuda , Yasuhiro Igarashi
IPC分类号： G06F12/00
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0656 , G06F3/067 , G06F12/084 , G06F12/0866
摘要： A storage device for storing data sent from a host apparatus comprises a plurality of processors sending to a cache memory controller an access instruction relating to transmission of the data, based on an access request relating to the transmission of the data, the access request being sent from the host apparatus; and an access instruction sending unit exclusively sending to the cache memory the access instruction sent from the plurality of processors, wherein the access instruction sending unit includes a plurality of storage units for storing an access instruction which requires a response, and wherein when the access instruction which requires a response is stored in all of the storage units, the access instruction sending unit sends only an access instruction which requires a response to the cache memory controller.
摘要翻译：用于存储从主机设备发送的数据的存储设备包括多个处理器，根据与数据传输相关的访问请求向高速缓冲存储器控制器发送与数据传输相关的访问指令，所述访问请求被发送从主机; 以及访问指令发送单元，向所述高速缓存存储器发送从所述多个处理器发送的访问指令，其中所述访问指令发送单元包括用于存储需要响应的访问指令的多个存储单元，并且其中当所述访问指令这要求响应存储在所有存储单元中，访问指令发送单元仅发送需要对高速缓冲存储器控制器的响应的访问指令。

9. 发明授权

US07799134B2 Shower plate having projections and plasma CVD apparatus using same 有权
标题翻译：具有投影的淋浴板和使用其的等离子体CVD装置
公开(公告)号：US07799134B2
公开(公告)日：2010-09-21
申请号：US11061986
申请日：2005-02-18
申请人： Naoto Tsuji , Hideaki Fukuda , Hiroki Arai , Yoshinori Morisada , Tamihiro Kobayashi
发明人： Naoto Tsuji , Hideaki Fukuda , Hiroki Arai , Yoshinori Morisada , Tamihiro Kobayashi
IPC分类号： H01L21/00
CPC分类号： C23C16/45565 , C23C16/345 , C23C16/5096 , H01J37/32082 , H01J37/3244
摘要： A shower plate 122 has protrusions 22 formed on the front face used with a first electrode in a plasma CVD apparatus. A plane-surface portion 23 is left around apertures of gas inlet holes 21 formed in the shower plate 122. With protrusions 22 being formed, a surface area of the first electrode is increased.
摘要翻译：喷淋板122具有形成在等离子体CVD装置中与第一电极一起使用的正面上的突起22。平面表面部分23留在形成在喷淋板122中的气体入口孔21的孔周围。随着形成突起22，第一电极的表面积增加。

10. 发明申请

US20090155488A1 SHOWER PLATE ELECTRODE FOR PLASMA CVD REACTOR 审中-公开
标题翻译：用于等离子体CVD反应器的电极板
公开(公告)号：US20090155488A1
公开(公告)日：2009-06-18
申请号：US11959410
申请日：2007-12-18
申请人： Ryu Nakano , Hideaki Fukuda
发明人： Ryu Nakano , Hideaki Fukuda
IPC分类号： C23C16/513 , B08B7/00
CPC分类号： C23C16/45565 , C23C16/505
摘要： Methods and apparatuses for plasma chemical vapor deposition (CVD). In particular, a plasma CVD apparatus having a cleaning function, has an improved shower plate with holes having a uniform cross-sectional area to yield a high cleaning rate. The shower plate may serve as an electrode, and may have an electrically conductive extension connected to a power source. The shower plate, through which both cleaning gases and reaction source gases flow, may include a hole machined surface area with a size different than conventionally used to ensure a good film thickness uniformity during a deposition process. The size of the hole machined surface area may vary based on the size of a substrate to be processed, or the size of the entire surface of the shower plate.
摘要翻译：等离子体化学气相沉积（CVD）的方法和装置。特别地，具有清洁功能的等离子体CVD装置具有具有均匀横截面积的孔的改进的喷淋板，以产生高的清洗率。淋浴板可以用作电极，并且可以具有连接到电源的导电延伸部。两个清洁气体和反应源气体都流过的淋浴板可以包括孔加工的表面积，其尺寸不同于常规用于确保在沉积过程中良好的膜厚均匀性。孔加工表面积的尺寸可以根据待处理的基底的尺寸或淋浴板的整个表面的尺寸而变化。

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