专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080181012A1 Memory Device with Adaptive Sense Unit and Method of Reading a Cell Array 有权
标题翻译：具有自适应感知单元的存储器件和读取单元阵列的方法
公开(公告)号：US20080181012A1
公开(公告)日：2008-07-31
申请号：US11668753
申请日：2007-01-30
申请人： Detlev Richter , Mirko Reissmann , Volker Zipprich-Rasch , Gert Kobernik , Uwe Augustin , Konrad Seidel , Andreas Kux , Hans Heitzer , Daniel-Andre Lohr , Soren Irmer
发明人： Detlev Richter , Mirko Reissmann , Volker Zipprich-Rasch , Gert Kobernik , Uwe Augustin , Konrad Seidel , Andreas Kux , Hans Heitzer , Daniel-Andre Lohr , Soren Irmer
IPC分类号： G11C16/26
CPC分类号： G11C16/10 , G11C16/26
摘要： A memory device is provided including memory cells that are capable of switching between at least two states, where the threshold of a sense signal for detecting the current state depends on a data content of the memory cell. Parallel to a user data block, a primary control word including a predetermined number of bits of a first state is stored in a check section of the cell array. The check section is read by applying sense signals of different amplitudes, where in each case a secondary control word is obtained. By checking in each secondary control word the number of bits of the first state, the margins of the current sense signal amplitude towards the sense window limits may be checked and the sense signal amplitude may be adapted permanently to a sense window drift, so as to enhance the reliability of the memory device.
摘要翻译：提供了一种存储器件，其包括能够在至少两个状态之间切换的存储器单元，其中用于检测当前状态的检测信号的阈值取决于存储器单元的数据内容。平行于用户数据块，包括第一状态的预定位数的主控制字被存储在单元阵列的检查部分中。通过应用不同幅度的感测信号来读取检查部分，其中在每种情况下获得辅助控制字。通过检查每个辅助控制字中的第一状态的位数，可以检查当前感测信号向感应窗口极限的幅度的边缘，并且感测信号幅度可以永久地适应于感测窗漂移，从而增强存储设备的可靠性。

2. 发明授权

US07167395B1 Non-volatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US07167395B1
公开(公告)日：2007-01-23
申请号：US11181387
申请日：2005-07-13
申请人： Gert Kobernik , Uwe Augustin
发明人： Gert Kobernik , Uwe Augustin
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C16/0475
摘要： A method for determining a reading voltage for reading data out of a non-volatile semiconductor memory, wherein the semiconductor memory comprises a plurality of memory cells grouped in a first memory area and a second memory area. A given number of “0”s are stored into the second memory area, and an equal number of “0”s and “1”s are stored in the memory cells of the first memory area. The memory cells of the first memory area are read using an initial first reading voltage. The first reading voltage is adjusted and the memory cells of the first memory area are re-read until an equal number of “0”s and “1”s are read out of the memory cells of the first memory area, to thereby obtain a final first reading voltage. An initial second reading voltage is determined on the basis of the final first reading voltage. The memory cells of the second memory area are read using the initial second reading voltage. The second reading voltage is adjusted and the memory cells of the second memory area are re-read until the number of “0”s read is equal to the number of “0”s stored in the second memory area, thereby obtaining a final second reading voltage. The final second reading voltage is used as a reading voltage for reading the memory cells of the semiconductor memory.
摘要翻译：一种用于确定用于从非易失性半导体存储器读出数据的读取电压的方法，其中所述半导体存储器包括分组在第一存储区域和第二存储器区域中的多个存储器单元。给定数量的“0”被存储到第二存储器区域中，并且相等数目的“0”和“1”被存储在第一存储区域的存储单元中。使用初始的第一读取电压读取第一存储区的存储单元。调整第一读取电压，并且重新读取第一存储区域的存储单元，直到从第一存储区域的存储单元读出相等数量的“0”和“1”，从而获得最终读取电压。基于最终的一次读取电压来确定初始的二次读取电压。使用初始的第二读取电压读取第二存储区域的存储单元。调整第二读取电压，并且重新读取第二存储区域的存储单元，直到读取的数量“0”等于存储在第二存储器区域中的“0”的数量，从而获得最后的秒数读取电压。将最终的二次读取电压用作读取半导体存储器的存储单元的读取电压。

3. 发明申请

US20070014160A1 NON-VOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20070014160A1
公开(公告)日：2007-01-18
申请号：US11181387
申请日：2005-07-13
申请人： Gert Kobernik , Uwe Augustin
发明人： Gert Kobernik , Uwe Augustin
IPC分类号： G11C16/06 , G11C11/34
CPC分类号： G11C16/26 , G11C16/0475
摘要： A method for determining a reading voltage for reading data out of a non-volatile semiconductor memory, wherein the semiconductor memory comprises a plurality of memory cells grouped in a first memory area and a second memory area. A given number of “0”s are stored into the second memory area, and an equal number of “0”s and “1”s are stored in the memory cells of the first memory area. The memory cells of the first memory area are read using an initial first reading voltage. The first reading voltage is adjusted and the memory cells of the first memory area are re-read until an equal number of “0”s and “1”s are read out of the memory cells of the first memory area, to thereby obtain a final first reading voltage. An initial second reading voltage is determined on the basis of the final first reading voltage. The memory cells of the second memory area are read using the initial second reading voltage. The second reading voltage is adjusted and the memory cells of the second memory area are re-read until the number of “0”s read is equal to the number of “0”s stored in the second memory area, thereby obtaining a final second reading voltage. The final second reading voltage is used as a reading voltage for reading the memory cells of the semiconductor memory.
摘要翻译：一种用于确定用于从非易失性半导体存储器读出数据的读取电压的方法，其中所述半导体存储器包括分组在第一存储区域和第二存储器区域中的多个存储器单元。给定数量的“0”被存储到第二存储器区域中，并且相等数目的“0”和“1”被存储在第一存储区域的存储单元中。使用初始的第一读取电压读取第一存储区的存储单元。调整第一读取电压，并且重新读取第一存储区域的存储单元，直到从第一存储区域的存储单元读出相等数量的“0”和“1”，从而获得最终读取电压。基于最终的一次读取电压来确定初始的二次读取电压。使用初始的第二读取电压读取第二存储区域的存储单元。调整第二读取电压，并且重新读取第二存储区域的存储单元，直到读取的数量“0”等于存储在第二存储器区域中的“0”的数量，从而获得最后的秒数读取电压。将最终的二次读取电压用作读取半导体存储器的存储单元的读取电压。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式