专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120100688A1 Self-Aligned Electrode Phase Change Memory 审中-公开
标题翻译：自对准电极相变存储器
公开(公告)号：US20120100688A1
公开(公告)日：2012-04-26
申请号：US13343936
申请日：2012-01-05
申请人： DerChang Kau , Greg Atwood
发明人： DerChang Kau , Greg Atwood
IPC分类号： H01L21/8239
CPC分类号： H01L45/126 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/124 , H01L45/1691
摘要： A phase change memory may be formed with an upper electrode self-aligned to a phase change memory element. In some embodiments, patterning techniques may be used to form the elements of the memory. The memory element may be formed as a sidewall spacer formed on both opposed sides of an elongate strip of material. The resulting elongate strip of phase change memory element material may then be singulated in the same etching step that forms the upper electrodes extending in the column direction. Thus, the memory elements may be singulated in the row direction, while, at the same time, the top electrodes are defined to extend continuously in the column direction.
摘要翻译：相变存储器可以形成为与相变存储元件自对准的上电极。在一些实施例中，可以使用图案化技术来形成存储器的元件。存储元件可以形成为在细长材料条的两个相对侧上形成的侧壁间隔物。然后可以在形成沿列方向延伸的上电极的相同蚀刻步骤中将所得到的相变存储元件材料的细长带分割。因此，存储元件可以在行方向上被划分，同时，顶电极被限定为在列方向上连续延伸。

2. 发明申请

US20130256624A1 ELECTRODES FOR RESISTANCE CHANGE MEMORY DEVICES 有权
标题翻译：电阻变化存储器件电极
公开(公告)号：US20130256624A1
公开(公告)日：2013-10-03
申请号：US13993302
申请日：2011-09-14
申请人： DerChang Kau
发明人： DerChang Kau
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2427 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/1293 , H01L45/141 , H01L45/16
摘要： Embodiments of the present disclosure describe techniques and configurations for increasing thermal insulation in a resistance change memory device, also known as a phase change memory (PCM) device. In one embodiment, an apparatus includes a storage structure of a PCM device, the storage structure having a chalcogenide material, an electrode having an electrically conductive material, the electrode having a first surface that is directly coupled with the storage structure, and a dielectric film having a dielectric material, the dielectric film being directly coupled with a second surface of the electrode that is disposed opposite to the first surface. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了用于增加电阻变化存储器件（也称为相变存储器（PCM））器件中的热绝缘的技术和配置。在一个实施例中，一种装置包括PCM装置的存储结构，所述存储结构具有硫族化物材料，具有导电材料的电极，所述电极具有与所述存储结构直接耦合的第一表面，以及电介质膜具有电介质材料，所述电介质膜与所述电极的与所述第一表面相对设置的第二表面直接耦合。可以描述和/或要求保护其他实施例。

3. 发明授权

US08278641B2 Fabricating current-confining structures in phase change memory switch cells 有权
标题翻译：在相变存储器开关单元中制造电流限制结构
公开(公告)号：US08278641B2
公开(公告)日：2012-10-02
申请号：US12646267
申请日：2009-12-23
申请人： Jong-Won Sean Lee , DerChang Kau , Gianpaolo Spadini
发明人： Jong-Won Sean Lee , DerChang Kau , Gianpaolo Spadini
IPC分类号： H01L47/00
CPC分类号： H01L45/1675 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： In one or more embodiments, methods of fabricating current-confining stack structures in a phase change memory switch (PCMS) cell are provided. One embodiment shows a method of fabricating a PCMS cell with current in an upper chalcogenide confined in the row and column directions. In one embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension memory chalcogenide are shown. In another embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension middle electrode heaters are disclosed.
摘要翻译：在一个或多个实施例中，提供了在相变存储器开关（PCMS）单元中制造电流限制堆叠结构的方法。一个实施例示出了制造具有限制在行和列方向上的上硫属化物中的电流的PCMS电池的方法。在一个实施例中，示出了制造具有亚光刻临界尺度存储硫族化物的PCMS单元的方法。在另一个实施例中，公开了制造具有亚光刻临界尺寸中间电极加热器的PCMS单元的方法。

4. 发明申请

US20120236676A1 SINGLE TRANSISTOR DRIVER FOR ADDRESS LINES IN A PHASE CHANGE MEMORY AND SWITCH (PCMS) ARRAY 有权
标题翻译：单相存储器和交换机（PCMS）阵列中的地址线的单个晶体管驱动器
公开(公告)号：US20120236676A1
公开(公告)日：2012-09-20
申请号：US13051800
申请日：2011-03-18
申请人： Raymond W. Zeng , DerChang Kau
发明人： Raymond W. Zeng , DerChang Kau
IPC分类号： G11C8/08
CPC分类号： G11C16/06 , G11C8/08 , G11C8/18 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0069 , G11C16/08
摘要： The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, a single transistor may be used to drive each address line, either a wordline or a bitline. Both an inhibit voltage and a selection voltage may be driven through these single transistor devices, which may be achieved with the introduction of odd and even designations for the address lines. In one operating embodiment, a selected address line may be driven to a selection voltage, and the address lines of the odd or even designation which is the same as the selected address line are allowed to float. The address lines of the odd or even designation with is different from the selected address lines are driven to an inhibit voltage, wherein adjacent floating address lines may act as shielding lines to the selected address line.
摘要翻译：本公开涉及非易失性存储器件的制造。在至少一个实施例中，可以使用单个晶体管来驱动每个地址线，字线或位线。可以通过这些单晶体管器件驱动抑制电压和选择电压，这可以通过引入用于地址线的奇数和偶数名称来实现。在一个操作实施例中，可以将所选择的地址线驱动到选择电压，并且允许与所选择的地址线相同的奇数或偶数的地址行浮动。与选择的地址线不同的奇数或偶数名称的地址线被驱动到禁止电压，其中相邻的浮动地址线可以用作到所选地址线的屏蔽线。

5. 发明授权

US07986549B1 Apparatus and method for refreshing or toggling a phase-change memory cell 有权
标题翻译：用于刷新或切换相变存储器单元的装置和方法
公开(公告)号：US07986549B1
公开(公告)日：2011-07-26
申请号：US12345462
申请日：2008-12-29
申请人： Stephen Tang , DerChang Kau
发明人： Stephen Tang , DerChang Kau
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/0033 , G11C13/0064 , G11C13/0069 , G11C16/3418 , G11C2013/0076
摘要： An apparatus and a method for refreshing or toggling a phase-change memory cell are described. The apparatus includes a voltage ramp element coupled to the phase-change memory cell and provided for controlling voltage across the phase-change memory cell. A current control element is coupled to the phase-change memory cell and provided for controlling current through the phase-change memory cell. A current sensor element is coupled to the phase-change memory cell. A write-back timer and control element is coupled to the current sensor element and to the current control element.
摘要翻译：描述了用于刷新或切换相变存储器单元的装置和方法。该装置包括耦合到相变存储器单元并被提供用于控制跨相变存储器单元的电压的电压斜坡元件。电流控制元件耦合到相变存储器单元，并被提供用于控制通过相变存储单元的电流。电流传感器元件耦合到相变存储器单元。回写计时器和控制元件耦合到电流传感器元件和电流控制元件。

6. 发明授权

US08730755B2 Single transistor driver for address lines in a phase change memory and switch (PCMS) array 有权
标题翻译：单相晶体管驱动器，用于相变存储器和开关（PCMS）阵列中的地址线
公开(公告)号：US08730755B2
公开(公告)日：2014-05-20
申请号：US13893551
申请日：2013-05-14
申请人： Raymond W. Zeng , DerChang Kau
发明人： Raymond W. Zeng , DerChang Kau
IPC分类号： G11C8/00 , G11C16/06 , G11C16/08 , G11C8/08
CPC分类号： G11C16/06 , G11C8/08 , G11C8/18 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0069 , G11C16/08
摘要： The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, a single transistor may be used to drive each address line, either a wordline or a bitline. Both an inhibit voltage and a selection voltage may be driven through these single transistor devices, which may be achieved with the introduction of odd and even designations for the address lines. In one operating embodiment, a selected address line may be driven to a selection voltage, and the address lines of the odd or even designation which is the same as the selected address line are allowed to float. The address lines of the odd or even designation with is different from the selected address lines are driven to an inhibit voltage, wherein adjacent floating address lines may act as shielding lines to the selected address line.
摘要翻译：本公开涉及非易失性存储器件的制造。在至少一个实施例中，可以使用单个晶体管来驱动每个地址线，字线或位线。可以通过这些单晶体管器件驱动抑制电压和选择电压，这可以通过引入用于地址线的奇数和偶数名称来实现。在一个操作实施例中，可以将所选择的地址线驱动到选择电压，并且允许与所选择的地址线相同的奇数或偶数的地址行浮动。与选择的地址线不同的奇数或偶数名称的地址线被驱动到禁止电压，其中相邻的浮动地址线可以用作到所选地址线的屏蔽线。

7. 发明申请

US20130294152A1 APPARATUSES AND METHODS INCLUDING MEMORY ACCESS IN CROSS POINT MEMORY 有权
标题翻译：包含存储器访问的装置和方法在交叉点存储器中
公开(公告)号：US20130294152A1
公开(公告)日：2013-11-07
申请号：US13465579
申请日：2012-05-07
申请人： DerChang Kau , Gianpaolo Spadini
发明人： DerChang Kau , Gianpaolo Spadini
IPC分类号： G11C11/00 , H01L21/8239
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
摘要翻译：一些实施例包括具有存储器单元，被配置为访问存储单元的第一和第二导线以及被配置为向第一和第二导线中的一个施加信号的开关的装置和方法。在这样的实施例中的至少一个中，开关可以包括相变材料。描述包括附加装置和方法的其他实施例。

8. 发明申请

US20110128770A1 STORED MULTI-BIT DATA CHARACTERIZED BY MULTIPLE-DIMENSIONAL MEMORY STATES 有权
标题翻译：由多维存储器状态表征的存储的多位数据
公开(公告)号：US20110128770A1
公开(公告)日：2011-06-02
申请号：US12627234
申请日：2009-11-30
申请人： Johannes A. Kalb , DerChang Kau , Gianpaolo Spadini
发明人： Johannes A. Kalb , DerChang Kau , Gianpaolo Spadini
IPC分类号： G11C7/00 , G11C11/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0002 , G11C2013/0052 , G11C2013/0092
摘要： Subject matter disclosed herein relates to enhancing data storage density of a memory device.
摘要翻译：本文公开的主题涉及增强存储器件的数据存储密度。

9. 发明申请

US20130242686A1 SINGLE TRANSISTOR DRIVER FOR ADDRESS LINES IN A PHASE CHANGE MEMORY AND SWITCH (PCMS) ARRAY 有权
标题翻译：单相存储器和交换机（PCMS）阵列中的地址线的单个晶体管驱动器
公开(公告)号：US20130242686A1
公开(公告)日：2013-09-19
申请号：US13893551
申请日：2013-05-14
申请人： Raymond W. Zeng , DerChang Kau
发明人： Raymond W. Zeng , DerChang Kau
IPC分类号： G11C13/00
CPC分类号： G11C16/06 , G11C8/08 , G11C8/18 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0069 , G11C16/08
摘要： The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, a single transistor may be used to drive each address line, either a wordline or a bitline. Both an inhibit voltage and a selection voltage may be driven through these single transistor devices, which may be achieved with the introduction of odd and even designations for the address lines. In one operating embodiment, a selected address line may be driven to a selection voltage, and the address lines of the odd or even designation which is the same as the selected address line are allowed to float. The address lines of the odd or even designation with is different from the selected address lines are driven to an inhibit voltage, wherein adjacent floating address lines may act as shielding lines to the selected address line.
摘要翻译：本公开涉及非易失性存储器件的制造。在至少一个实施例中，可以使用单个晶体管来驱动每个地址线，字线或位线。可以通过这些单晶体管器件驱动抑制电压和选择电压，这可以通过引入用于地址线的奇数和偶数名称来实现。在一个操作实施例中，可以将所选择的地址线驱动到选择电压，并且允许与所选择的地址线相同的奇数或偶数的地址行浮动。与选择的地址线不同的奇数或偶数名称的地址线被驱动到禁止电压，其中相邻的浮动地址线可以用作到所选地址线的屏蔽线。

10. 发明授权

US08404514B2 Fabricating current-confining structures in phase change memory switch cells 有权
标题翻译：在相变存储器开关单元中制造电流限制结构
公开(公告)号：US08404514B2
公开(公告)日：2013-03-26
申请号：US13553948
申请日：2012-07-20
申请人： Jong-Won Sean Lee , DerChang Kau , Gianpaolo Spadini
发明人： Jong-Won Sean Lee , DerChang Kau , Gianpaolo Spadini
IPC分类号： H01L21/00
CPC分类号： H01L45/1675 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： In one or more embodiments, methods of fabricating current-confining stack structures in a phase-change memory switch (PCMS) cell are provided. One embodiment shows a method of fabricating a PCMS cell with current in an upper chalcogenide confined in the row and column directions. In one embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension memory chalcogenide are shown. In another embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension middle electrode heaters are disclosed.
摘要翻译：在一个或多个实施例中，提供了在相变存储器开关（PCMS）单元中制造电流限制堆叠结构的方法。一个实施例示出了制造具有限制在行和列方向上的上硫属化物中的电流的PCMS电池的方法。在一个实施例中，示出了制造具有亚光刻临界尺度存储硫族化物的PCMS单元的方法。在另一个实施例中，公开了制造具有亚光刻临界尺寸中间电极加热器的PCMS单元的方法。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式