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1. 发明授权

US07892445B1 Wafer electrical discharge control using argon free dechucking gas 有权
标题翻译：使用无氩脱胶气体进行晶圆放电控制
公开(公告)号：US07892445B1
公开(公告)日：2011-02-22
申请号：US11853968
申请日：2007-09-12
申请人： David Wei , Howard Dang , Masahiro Watanabe , Sean Kang , Kenji Takeshita , Mayumi Block , Stephen Sirard , Eric Hudson
发明人： David Wei , Howard Dang , Masahiro Watanabe , Sean Kang , Kenji Takeshita , Mayumi Block , Stephen Sirard , Eric Hudson
IPC分类号： B44C1/22
CPC分类号： H01L21/67069 , H01L21/6831
摘要： A method of dechucking a wafer, with a low-k dielectric layer, held onto an electrostatic chuck by an electrostatic charge in a plasma chamber is provided. The electrostatic clamping voltage is removed. An essentially argon free dechucking gas is provided into the plasma chamber. A dechucking plasma is formed from the dechucking gas in the plasma chamber. The dechucking plasma is stopped.
摘要翻译：提供了通过在等离子体室中的静电电荷将具有低k电介质层的晶片脱扣保持在静电卡盘上的方法。静电钳位电压被去除。在等离子体室中提供基本上无氩的脱扣气体。从等离子体室中的脱扣气体形成脱扣等离子体。脱扣等离子体停止。

2. 发明申请

US20090068767A1 TUNING VIA FACET WITH MINIMAL RIE LAG 审中-公开
标题翻译：通过最小的RIE LAG调整
公开(公告)号：US20090068767A1
公开(公告)日：2009-03-12
申请号：US11854038
申请日：2007-09-12
申请人： Stephen Sirard , Mikio Nagai , Kenji Takeshita , Sridharan Srivatsan , Jungmin Ko
发明人： Stephen Sirard , Mikio Nagai , Kenji Takeshita , Sridharan Srivatsan , Jungmin Ko
IPC分类号： H01L21/00
CPC分类号： H01L21/76804 , H01L21/76807 , H01L22/12 , H01L22/20
摘要： A method for designing an etch recipe is provided. An etch is performed, comprising providing an etch gas with a set halogen to carbon ratio, forming a plasma from the etch gas, and etching trenches over via. Via faceting is measured. The halogen to carbon ratio is reset according to the measured via faceting, where the halogen to carbon ratio is increased if too much faceting is measured and the halogen to carbon ratio is decreased if too little faceting is measured. The previous steps are repeated until a desired amount of faceting is obtained.
摘要翻译：提供了一种设计蚀刻配方的方法。执行蚀刻，包括提供具有设定的卤素与碳的比例的蚀刻气体，从蚀刻气体形成等离子体，以及蚀刻通过过孔的沟槽。测量通过面。卤素与碳的比例根据测量的通孔面重置，其中如果测量太多的小面积，则卤素与碳的比例将增加，并且如果测量的面积太小，则卤素与碳的比率降低。重复前面的步骤，直到获得所需的刻面数量。

3. 发明授权

US08114780B2 Method for dielectric material removal between conductive lines 有权
标题翻译：介电材料去除导线之间的方法
公开(公告)号：US08114780B2
公开(公告)日：2012-02-14
申请号：US12413159
申请日：2009-03-27
申请人： Mayumi Block , Robert C. Hefty , Stephen M. Sirard , Kenji Takeshita
发明人： Mayumi Block , Robert C. Hefty , Stephen M. Sirard , Kenji Takeshita
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76825 , H01L21/3105 , H01L21/31111 , H01L21/31116 , H01L21/7682 , H01L21/76826
摘要： A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with respect to the carbon doped silicon oxide and the metal contacts, which forms recess between the metal contacts.
摘要翻译：提供了一种在金属触点之间去除碳掺杂的氧化硅的方法。通过去除碳掺杂剂将碳掺杂的氧化硅层转化为氧化硅层。相对于碳掺杂的氧化硅和在金属触点之间形成凹陷的金属触点，氧化硅的转换层被选择性地湿蚀刻。

4. 发明申请

US20100248485A1 METHOD FOR DIELECTRIC MATERIAL REMOVAL BETWEEN CONDUCTIVE LINES 有权
标题翻译：导电线之间的电介质材料去除方法
公开(公告)号：US20100248485A1
公开(公告)日：2010-09-30
申请号：US12413159
申请日：2009-03-27
申请人： Mayumi Block , Robert C. Hefty , Stephen M. Sirard , Kenji Takeshita
发明人： Mayumi Block , Robert C. Hefty , Stephen M. Sirard , Kenji Takeshita
IPC分类号： H01L21/306
CPC分类号： H01L21/76825 , H01L21/3105 , H01L21/31111 , H01L21/31116 , H01L21/7682 , H01L21/76826
摘要： A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with respect to the carbon doped silicon oxide and the metal contacts, which forms recess between the metal contacts.
摘要翻译：提供了一种在金属触点之间去除碳掺杂的氧化硅的方法。通过去除碳掺杂剂将碳掺杂的氧化硅层转化为氧化硅层。相对于碳掺杂的氧化硅和在金属触点之间形成凹陷的金属触点，氧化硅的转换层被选择性地湿蚀刻。

5. 发明授权

US07521362B2 Methods for the optimization of ion energy control in a plasma processing system 有权
标题翻译：在等离子体处理系统中优化离子能量控制的方法
公开(公告)号：US07521362B2
公开(公告)日：2009-04-21
申请号：US10745846
申请日：2003-12-23
申请人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
发明人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
IPC分类号： H01L21/302
CPC分类号： H01L21/76811 , H01L21/31116 , H01L21/31144 , H01L21/76807
摘要： A method in a plasma processing system for etching a feature through a dielectric layer of a dual damascene stack on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method further includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the dielectric layer. The method additionally includes striking a plasma from the etchant source gas. The method also includes etching the feature through the dielectric layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 27 MHz and about 90 MHz. The bias RF signal further has a bias RF power component that is configured to cause the feature to be etched in accordance to predefined etch rate parameters and etch profile parameters at the bias RF frequency.
摘要翻译：公开了一种用于通过半镶嵌叠层的电介质层在半导体衬底上蚀刻特征的等离子体处理系统中的方法。该方法包括将基板放置在等离子体处理系统的等离子体处理室中。该方法还包括将蚀刻剂气体混合物流入等离子体处理室，蚀刻剂气体混合物被配置为蚀刻介电层。该方法还包括从蚀刻剂源气体冲击等离子体。该方法还包括通过介电层蚀刻特征，同时向衬底施加偏置RF信号，偏置RF信号具有在约27MHz和约90MHz之间的偏置RF频率。偏置RF信号还具有偏置RF功率分量，其被配置为根据预定的蚀刻速率参数和偏置RF频率处的蚀刻轮廓参数来蚀刻特征。

6. 发明申请

US20080113516A1 SELECTIVITY CONTROL IN A PLASMA PROCESSING SYSTEM 有权
标题翻译：等离子体处理系统中的选择性控制
公开(公告)号：US20080113516A1
公开(公告)日：2008-05-15
申请号：US11969833
申请日：2008-01-04
申请人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
发明人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
IPC分类号： H01L21/461
CPC分类号： H01L21/76811 , H01J37/32706 , H01L21/31116 , H01L21/31144
摘要： A method in a plasma processing system for etching a feature through a given layer on a semiconductor substrate. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method also includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the given layer. The method additionally includes striking a plasma from the etchant source gas. Furthermore, the method includes etching the feature at least partially through the given layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 45 MHz and about 75 MHz. The bias RF signal further has a bias RF power component that is configured to cause the etch feature to be etched with an etch selectivity to a second layer of the substrate that is higher than a predefined selectivity threshold.
摘要翻译：一种用于通过半导体衬底上的给定层蚀刻特征的等离子体处理系统中的方法。该方法包括将基板放置在等离子体处理系统的等离子体处理室中。该方法还包括将蚀刻剂气体混合物流动到等离子体处理室中，蚀刻剂气体混合物被配置为蚀刻给定层。该方法还包括从蚀刻剂源气体冲击等离子体。此外，该方法包括至少部分地通过给定层蚀刻特征，同时向衬底施加偏置RF信号，偏置RF信号具有在约45MHz和约75MHz之间的偏置RF频率。偏置RF信号还具有偏置RF功率分量，该偏置RF功率分量被配置为使得蚀刻特征被蚀刻以对于高于预定义的选择性阈值的衬底的第二层的蚀刻选择性。

7. 发明申请

US20060121729A1 Methods for the optimization of ion energy control in a plasma processing system 有权
公开(公告)号：US20060121729A1
公开(公告)日：2006-06-08
申请号：US10745846
申请日：2003-12-23
申请人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
发明人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
IPC分类号： H01L21/461
CPC分类号： H01L21/76811 , H01L21/31116 , H01L21/31144 , H01L21/76807
摘要： A method in a plasma processing system for etching a feature through a dielectric layer of a dual damascene stack on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method further includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the dielectric layer. The method additionally includes striking a plasma from the etchant source gas. The method also includes etching the feature through the dielectric layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 27 MHz and about 90 MHz. The bias RF signal further has a bias RF power component that is configured to cause the feature to be etched in accordance to predefined etch rate parameters and etch profile parameters at the bias RF frequency.

8. 发明授权

US08222155B2 Selectivity control in a plasma processing system 有权
标题翻译：等离子体处理系统中的选择性控制
公开(公告)号：US08222155B2
公开(公告)日：2012-07-17
申请号：US11969833
申请日：2008-01-04
申请人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
发明人： Kenji Takeshita , Odette Turmel , Felix Kozakevich , Eric Hudson
IPC分类号： H01L21/302
CPC分类号： H01L21/76811 , H01J37/32706 , H01L21/31116 , H01L21/31144
摘要： A method in a plasma processing system for etching a feature through a given layer on a semiconductor substrate. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method also includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the given layer. The method additionally includes striking a plasma from the etchant source gas. Furthermore, the method includes etching the feature at least partially through the given layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 45 MHz and about 75 MHz. The bias RF signal further has a bias RF power component that is configured to cause the etch feature to be etched with an etch selectivity to a second layer of the substrate that is higher than a predefined selectivity threshold.
摘要翻译：一种用于通过半导体衬底上的给定层蚀刻特征的等离子体处理系统中的方法。该方法包括将基板放置在等离子体处理系统的等离子体处理室中。该方法还包括将蚀刻剂气体混合物流动到等离子体处理室中，蚀刻剂气体混合物被配置为蚀刻给定层。该方法还包括从蚀刻剂源气体冲击等离子体。此外，该方法包括至少部分地通过给定层蚀刻特征，同时向衬底施加偏置RF信号，偏置RF信号具有在约45MHz和约75MHz之间的偏置RF频率。偏置RF信号还具有偏置RF功率分量，该偏置RF功率分量被配置为使得蚀刻特征被蚀刻以对于高于预定义的选择性阈值的衬底的第二层的蚀刻选择性。

9. 发明申请

US20120276747A1 PREVENTION OF LINE BENDING AND TILTING FOR ETCH WITH TRI-LAYER MASK 有权
标题翻译：使用三层面罩防止线弯曲和倾斜
公开(公告)号：US20120276747A1
公开(公告)日：2012-11-01
申请号：US13096697
申请日：2011-04-28
申请人： Youn-Jin Oh , Kenji Takeshita , Hitoshi Takahashi
发明人： Youn-Jin Oh , Kenji Takeshita , Hitoshi Takahashi
IPC分类号： H01L21/3065 , H01L21/308
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/31138
摘要： A method for etching features in an etch layer is provided. An organic mask layer is etched, using a hard mask as an etch mask. The hard mask is removed, by selectively etching the hard mask with respect to the organic mask and etch layer. Features are etched in the etch layer, using the organic mask as an etch mask.
摘要翻译：提供了一种用于蚀刻蚀刻层中的特征的方法。使用硬掩模作为蚀刻掩模蚀刻有机掩模层。通过相对于有机掩模和蚀刻层选择性地蚀刻硬掩模，去除硬掩模。在蚀刻层中蚀刻特征，使用有机掩模作为蚀刻掩模。

10. 发明申请

US20110097904A1 METHOD FOR REPAIRING LOW-K DIELECTRIC DAMAGE 审中-公开
标题翻译：修复低K电介质损伤的方法
公开(公告)号：US20110097904A1
公开(公告)日：2011-04-28
申请号：US12604224
申请日：2009-10-22
申请人： Stephen M. Sirard , Kenji Takeshita , Andrew D. Bailey, III
发明人： Stephen M. Sirard , Kenji Takeshita , Andrew D. Bailey, III
IPC分类号： H01L21/3065
CPC分类号： H01L21/3105 , H01L21/76814 , H01L21/76826
摘要： A method for repairing damage to a silicon based low-k dielectric layer with organic compounds, where damage replaces a methyl attached to silicon with a hydroxyl attached to silicon is provided. A repair gas comprising CH4 gas is provided. The repair gas is formed into a plasma, while maintaining a pressure below 50 mTorr. Hydroxyl attached to silicon is replaced with methyl from the plasma formed by the repair gas.
摘要翻译：提供了用有机化合物修复对基于硅的低k电介质层的损伤的方法，其中损伤用连接到硅上的羟基连接到硅上的甲基替代。提供了包含CH 4气体的修复气体。将修复气体形成为等离子体，同时保持低于50mTorr的压力。与由修复气体形成的等离子体中的被甲基取代的羟基被甲基取代。

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