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1. 发明申请

US20190108130A1 System, Apparatus And Method For Multi-Cacheline Small Object Memory Tagging 审中-公开
公开(公告)号：US20190108130A1
公开(公告)日：2019-04-11
申请号：US16205508
申请日：2018-11-30
申请人： David M. Durham , Ron Gabor , Rajat Agarwal
发明人： David M. Durham , Ron Gabor , Rajat Agarwal
IPC分类号： G06F12/0895
摘要： In one embodiment, a method includes: in response to a sub-cacheline memory access request, receiving a data-line from a memory coupled to a processor; receiving tag information included in metadata associated with the data-line from the memory; determining, in a memory controller, whether a first tag identifier of the tag information matches a tag portion of an address of the memory line associated with the sub-cacheline memory access request, and in response to determining a match, storing a first portion of the data-line associated with the first tag identifier in a cache line of a cache of the processor, the first portion a sub-cacheline width. This method allows data lines stored in memory associated with multiple different tag metadata to be divided into multiple cachelines comprising the sub-cacheline data associated with a particular metadata address tag. Other embodiments are described and claimed.

2. 发明申请

US20180091308A1 CRYPTOGRAPHIC SYSTEM MEMORY MANAGEMENT 审中-公开
公开(公告)号：US20180091308A1
公开(公告)日：2018-03-29
申请号：US15816901
申请日：2017-11-17
申请人： David M. Durham , Rajat Agarwal , Siddhartha Chhabra , Sergej Deutsch , Karanvir S. Grewal , Ioannis T. Schoinas
发明人： David M. Durham , Rajat Agarwal , Siddhartha Chhabra , Sergej Deutsch , Karanvir S. Grewal , Ioannis T. Schoinas
IPC分类号： H04L9/32 , G06F3/06 , H04L9/06 , G06F11/10 , G11C29/52
摘要： In one example, a system for managing encrypted memory comprises a processor to store a first MAC based on data stored in system memory in response to a write operation to the system memory. The processor can also detect a read operation corresponding to the data stored in the system memory, calculate a second MAC based on the data retrieved from the system memory, determine that the second MAC does not match the first MAC, and recalculate the second MAC with a correction operation, wherein the correction operation comprises an XOR operation based on the data retrieved from the system memory and a replacement value for a device of the system memory. Furthermore, the processor can decrypt the data stored in the system memory in response to detecting the recalculated second MAC matches the first MAC and transmit the decrypted data to cache thereby correcting memory errors.

3. 发明申请

US20140129767A1 APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY 有权
标题翻译：实现多层次记忆层次分析的装置和方法
公开(公告)号：US20140129767A1
公开(公告)日：2014-05-08
申请号：US13997189
申请日：2011-09-30
申请人： Raj K Ramanujan , Rajat Agarwal , Kai Cheng , Taarinya Polepeddi , Camille C. Raad , David J. Zimmerman , Muthukumar P. Swaminathan , Dimitrios Ziakas , Mohan J. Kumar , Bassam N. Coury , Glenn N. Hinton
发明人： Raj K Ramanujan , Rajat Agarwal , Kai Cheng , Taarinya Polepeddi , Camille C. Raad , David J. Zimmerman , Muthukumar P. Swaminathan , Dimitrios Ziakas , Mohan J. Kumar , Bassam N. Coury , Glenn N. Hinton
IPC分类号： G06F12/08 , G11C14/00 , G11C11/406
CPC分类号： G06F12/0811 , G06F12/0895 , G06F12/0897 , G06F2212/2024 , G06F2212/205 , G11C11/40615 , G11C14/009 , Y02D10/13
摘要： A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one embodiment, PCMS memory devices are used as one tier in the hierarchy, sometimes referred to as “far memory.” Higher performance memory devices such as DRAM placed in front of the far memory and are used to mask some of the performance limitations of the far memory. These higher performance memory devices are referred to as “near memory.”
摘要翻译：描述了用于集成包括计算机系统内的非易失性存储器层的存储器和存储层级的系统和方法。在一个实施例中，PCMS存储器件被用作层次结构中的一层，有时被称为“远存储器”。更高性能的存储器件例如放置在远存储器之前的DRAM，并用于掩盖某些性能限制远记忆这些更高性能的存储器件被称为“接近存储器”。

4. 发明申请

US20110036497A1 PUMPABLE EPOXY PASTE ADHESIVES RESISTANT TO WASH-OFF 有权
标题翻译：可渗透的环氧胶粘剂耐洗涤
公开(公告)号：US20110036497A1
公开(公告)日：2011-02-17
申请号：US12793786
申请日：2010-06-04
申请人： Olaf Lammerschop , Scott Hartsell , Rajat Agarwal
发明人： Olaf Lammerschop , Scott Hartsell , Rajat Agarwal
IPC分类号： B32B37/12 , C09J163/00 , B05D3/02 , B32B38/00
CPC分类号： C09J11/08 , C08F220/00 , C08K3/346 , C08L63/00 , C08L2666/02 , C08L2666/28 , C09J163/00
摘要： This invention relates to compositions useful as adhesives and more particularly to the preparation of heat-curable epoxy-based adhesive compositions that are capable of being easily pumped under high shear at temperatures around room temperature but are resistant to being washed off substrate surfaces prior to being cured.
摘要翻译：本发明涉及可用作粘合剂的组合物，更具体地说，涉及可热固化的环氧基粘合剂组合物的制备，该组合物能够在室温附近的温度下容易地在高剪切力下泵送，但耐受在基材表面之前被洗掉治愈

5. 发明申请

US20100169739A1 Poison bit error checking code scheme 有权
标题翻译：毒码错误检查码方案
公开(公告)号：US20100169739A1
公开(公告)日：2010-07-01
申请号：US12317849
申请日：2008-12-29
申请人： Rajat Agarwal , Scott Huddleston , Dennis Brzezinski
发明人： Rajat Agarwal , Scott Huddleston , Dennis Brzezinski
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F11/1012 , G06F11/1064
摘要： In one embodiment, a method provides determining one of an occurrence and a non-occurrence of an event, the one of the occurrence and the non-occurrence resulting in an event determination; and processing a code having an event bit, said processing in accordance with the determination and the code, by determining if the event bit corresponds to the event determination, and if the event bit does not correspond to the event determination, encoding the code to generate a poison bit that corresponds to the event determination.
摘要翻译：在一个实施例中，一种方法提供确定事件的发生和不发生之一，发生和不发生中的一个导致事件确定; 以及通过确定所述事件位是否对应于所述事件确定来处理具有事件位的代码，根据所述确定和所述代码的所述处理，以及如果所述事件位不对应于所述事件确定，则对所述代码进行编码以产生与事件确定相对应的毒物位。

6. 发明申请

US20090327596A1 MEMORY CONTROLLER USING TIME-STAGGERED LOCKSTEP SUB-CHANNELS WITH BUFFERED MEMORY 有权
标题翻译：使用具有缓冲存储器的时间延迟锁定子通道的存储器控制器
公开(公告)号：US20090327596A1
公开(公告)日：2009-12-31
申请号：US12163672
申请日：2008-06-27
申请人： Bruce A. Christenson , Rajat Agarwal
发明人： Bruce A. Christenson , Rajat Agarwal
IPC分类号： G06F12/00 , G06F9/46
CPC分类号： G06F13/1684
摘要： Memory control techniques for dual channel lockstep configurations are disclosed. In accordance with one example embodiment, a memory controller issues two burst-length 4 DRAM commands to two double-data-rate (DDR) DRAM sub-channels behind a memory buffer (e.g., FB-DIMM or buffer-on-board). The two commands are in time-staggered lockstep. The time-stagger allows data coming back from the two back-side DDR sub-channels to flow naturally on the host channel without conflict. Multiple DIMMs can be used to obtain chip-fail ECC capabilities and to reclaim at least some of the lost performance imposed by the burst-length of 4 s typically associated with dual channel lockstep memory controllers. The techniques can be implemented, for instance, with a buffered memory solution such as fully buffered DIMM (FB-DIMM) or buffer-on-board configurations.
摘要翻译：公开了用于双通道锁步配置的存储器控制技术。根据一个示例实施例，存储器控制器向存储器缓冲器（例如，FB-DIMM或板上缓冲器）后面的两个双数据速率（DDR）DRAM子通道发出两个突发长度的4个DRAM命令。这两个命令处于时间交错的锁定状态。时间错误允许从两个背面的DDR子通道返回的数据在主机通道上自然流动而没有冲突。可以使用多个DIMM来获得芯片故障ECC功能，并回收通常与双通道锁步存储器控制器相关联的4秒的突发长度所施加的至少一些丢失的性能。这些技术可以实现，例如使用缓冲存储器解决方案，例如完全缓冲的DIMM（FB-DIMM）或板载缓冲器配置。

7. 发明授权

US07587625B2 Memory replay mechanism 有权
标题翻译：内存重放机制
公开(公告)号：US07587625B2
公开(公告)日：2009-09-08
申请号：US11357492
申请日：2006-02-16
申请人： James W. Alexander , Rajat Agarwal , Joaquin B. Romera
发明人： James W. Alexander , Rajat Agarwal , Joaquin B. Romera
IPC分类号： G06F11/00
CPC分类号： G06F11/141 , G06F11/106 , G06F11/1666
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for memory replay mechanisms. In some embodiments, the replay logic includes reset logic to reset at least some of the links in a point-to-point memory interconnect. In addition, the replay logic may include a replay queue to store transaction data and a replay controller to initiate a reset if the transaction data indicates a defined transaction response error. Other embodiments are described and claimed.
摘要翻译：本发明的实施例一般涉及用于存储器重放机制的系统，方法和装置。在一些实施例中，重播逻辑包括复位逻辑以重置点对点存储器互连中的至少一些链路。此外，如果事务数据指示定义的事务响应错误，则重放逻辑可以包括用于存储事务数据的重播队列和重放控制器来启动复位。描述和要求保护其他实施例。

8. 发明申请

US20070226579A1 Memory replay mechanism 有权
标题翻译：内存重放机制
公开(公告)号：US20070226579A1
公开(公告)日：2007-09-27
申请号：US11357492
申请日：2006-02-16
申请人： James Alexander , Rajat Agarwal , Joaquin Romera
发明人： James Alexander , Rajat Agarwal , Joaquin Romera
IPC分类号： H03M13/00
CPC分类号： G06F11/141 , G06F11/106 , G06F11/1666
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for memory replay mechanisms. In some embodiments, the replay logic includes reset logic to reset at least some of the links in a point-to-point memory interconnect. In addition, the replay logic may include a replay queue to store transaction data and a replay controller to initiate a reset if the transaction data indicates a defined transaction response error. Other embodiments are described and claimed.
摘要翻译：本发明的实施例一般涉及用于存储器重放机制的系统，方法和装置。在一些实施例中，重播逻辑包括复位逻辑以重置点对点存储器互连中的至少一些链路。此外，如果事务数据指示定义的事务响应错误，则重放逻辑可以包括用于存储事务数据的重播队列和重放控制器来启动复位。描述和要求保护其他实施例。

9. 发明申请

US20060074783A1 Real-time pin disbursement system 审中-公开
标题翻译：实时针脚支付系统
公开(公告)号：US20060074783A1
公开(公告)日：2006-04-06
申请号：US10949047
申请日：2004-09-24
申请人： Rajat Agarwal , Asheem Aggarwal , Younes Oughla , Pankul Verma
发明人： Rajat Agarwal , Asheem Aggarwal , Younes Oughla , Pankul Verma
IPC分类号： G06Q40/00
CPC分类号： G06Q30/06 , G06Q40/00
摘要： An automated system and method of purchasing prepaid and other services against a deposit or a credit threshold. A server provisions requests for electronic PINs. This provisioning server maintains a record for each retail merchant, distributor, or third party processor. Depending on their credit worthiness, the control server either establishes a credit threshold retail merchant, distributor or third party processor or requires a cash deposit. A retail merchant or distributor or a third party processor may obtain an electronic PIN from the provisioning server in real-time or in batches against their credit threshold or deposit.
摘要翻译：一种针对存款或信用门槛购买预付费和其他服务的自动化系统和方法。服务器提供电子PIN的请求。该配置服务器维护每个零售商，分销商或第三方处理器的记录。根据其信誉值，控制服务器可以建立信用额度零售商，分销商或第三方处理器，或需要现金存款。零售商或分销商或第三方处理器可以从供应服务器实时或批量地根据其信用阈值或存款获得电子PIN。

10. 发明授权

US5807612A Method for coating metals by dip autopolymerization 失效
标题翻译：通过浸渍自聚合法涂覆金属的方法
公开(公告)号：US5807612A
公开(公告)日：1998-09-15
申请号：US692515
申请日：1996-08-06
申请人： James P. Bell , Xu Zhang , Rajat Agarwal
发明人： James P. Bell , Xu Zhang , Rajat Agarwal
IPC分类号： B05D1/18 , B05D7/14 , B05D7/24 , C08F2/44 , C09D4/00 , C09D157/00 , H05K3/00 , H05K3/34 , B05D3/02
CPC分类号： B05D7/142 , C09D4/00 , H05K3/0079 , H05K3/3452 , Y10T428/31692 , Y10T428/31699
摘要： A composition and method is described for providing conformal protective or decorative polymer coatings on metals such as aluminum, copper, iron, steel, zinc, and their by dip autopolymerization. In accordance with the present invention, an acidic solution of organic monomer undergoes autopolymerization upon contact with a metal substrate, thereby forming a polymeric coating on the substrate. The method comprises providing the acidic monomer solution, dipping the metal substrate to be coated for a prescribed period of time depending on the thickness of the coating desired, and then removing the substrate from the solution. Importantly, the polymerization requires no application of external driving force, such as thermal or electrical energy. The coatings thus formed are up to 50 microns thick, and conform to the shape of the substrate. These coatings further have uniform thickness, and excellent thermal stability and protective properties. In one preferred embodiment of the present invention, the composition comprises an acidic solution of an organic electron acceptor monomer that undergoes autopolymerization in contact with a metal substrate, thereby forming a polymeric coating on the substrate. In another preferred embodiment of the present invention, the composition comprises an acidic solution of an organic electron acceptor monomer and an organic electron donor monomer that undergo autopolymerization in contact with a metal substrate, thereby forming a polymeric coating on the substrate. Metal-polymer composites are also described.
摘要翻译：描述了一种组合物和方法，用于在诸如铝，铜，铁，钢，锌的金属上提供保形或装饰聚合物涂层，并通过浸渍自聚合来进行。根据本发明，有机单体的酸性溶液在与金属基材接触时经历自聚合，从而在基材上形成聚合物涂层。该方法包括提供酸性单体溶液，根据所需涂层的厚度将待涂覆的金属基材浸渍规定的时间，然后从溶液中除去基材。重要的是，聚合不需要外部驱动力，例如热或电能。如此形成的涂层最多达50微米厚，并且符合基材的形状。这些涂层还具有均匀的厚度，以及优异的热稳定性和保护性能。在本发明的一个优选实施方案中，组合物包含与金属基材接触的自聚合的有机电子受体单体的酸性溶液，从而在基材上形成聚合物涂层。在本发明的另一个优选实施方案中，组合物包含有机电子受体单体和有机电子供体单体的酸性溶液，其经历与金属基材接触的自聚合，从而在基材上形成聚合物涂层。还描述了金属 - 聚合物复合材料。

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