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1. 发明授权

US5430854A Simd with selective idling of individual processors based on stored conditional flags, and with consensus among all flags used for conditional branching 失效
标题翻译： Simd根据存储的条件标志对各个处理器进行选择性空闲，并在所有用于条件分支的标志之间保持一致
公开(公告)号：US5430854A
公开(公告)日：1995-07-04
申请号：US144219
申请日：1993-10-27
申请人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Michael Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
发明人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Michael Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
IPC分类号： G06F12/08 , G06F9/30 , G06F9/38 , G06F15/80 , G06T1/20
CPC分类号： G06F9/3885 , G06F9/30072 , G06F9/30149 , G06F9/3802 , G06F9/3863
摘要： A data processing system having execution units for executing instruction sequences determines at least two conditionals in accordance with the instructions and sets respective flags according to the determined conditionals. These flags are stored and later retrieved sequentially and the execution unit executes selected instructions of the instruction sequence according to the sequentially retrieved mask flags. These masked flags may be stored sequentially in a stack for sequential retrieval at a later time.
摘要翻译：具有用于执行指令序列的执行单元的数据处理系统根据指令确定至少两个条件，并根据确定的条件设置相应的标志。这些标志被依次存储和稍后检索，并且执行单元根据顺序检索的掩码标志来执行指令序列的所选择的指令。这些屏蔽的标志可以顺序地存储在堆栈中，以便在稍后的时间进行顺序检索。

2. 发明授权

US5517665A System for controlling arbitration using the memory request signal types generated by the plurality of datapaths having dual-ported local memory architecture for simultaneous data transmission 失效
标题翻译：用于使用由具有双端口本地存储器架构的多个数据路径生成的存储器请求信号类型来控制仲裁的系统，用于同时数据传输
公开(公告)号：US5517665A
公开(公告)日：1996-05-14
申请号：US230915
申请日：1994-04-21
申请人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Gregory M. Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
发明人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Gregory M. Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
IPC分类号： G06F9/30 , G06F9/38 , G06F15/16 , G06F13/00
CPC分类号： G06F9/3885 , G06F9/30072 , G06F9/30149 , G06F9/3802 , G06F9/3863 , G06F9/3887
摘要： A system and method for processing data. According to a preferred embodiment, the system comprises a global memory and a plurality of datapaths. Each datapath comprises a datapath processor for executing instructions of an instruction sequence and for providing a plurality of memory request signal types in accordance with the instructions, local memory, a global port for transferring data between the local memory and the global memory, and a dual port comprising first and second local ports for transferring data between the local memory and the datapath processor, wherein the first and second local ports permit simultaneous transfer of data between the local memory and the datapath processor. The system comprises a data bus coupled to the global memory for transferring data to and from the global memory, and a transfer controller for controlling block transfer and scalar data transfers between the local memory and the global memory over the data bus and for arbitrating among competing datapaths of the plurality of datapaths to gram to a selected datapath access to the data bus in accordance with the signal types of the memory request signals generated by datapaths of the plurality of datapaths.
摘要翻译：一种用于处理数据的系统和方法。根据优选实施例，系统包括全局存储器和多个数据路径。每个数据路径包括用于执行指令序列的指令并根据指令提供多个存储器请求信号类型的数据路径处理器，本地存储器，用于在本地存储器和全局存储器之间传送数据的全局端口，以及双重端口包括用于在本地存储器和数据路径处理器之间传送数据的第一和第二本地端口，其中第一和第二本地端口允许在本地存储器和数据路径处理器之间同时传输数据。该系统包括耦合到全局存储器的数据总线，用于将数据传送到全局存储器和从全局存储器传送数据;以及传输控制器，用于通过数据总线控制本地存储器和全局存储器之间的块传输和标量数据传输，并且用于在竞争中进行仲裁根据由多个数据路径的数据路径生成的存储器请求信号的信号类型，将多个数据路径的数据路径克化为对数据总线的选择的数据路径访问。

3. 发明授权

US5548793A System for controlling arbitration using the memory request signal types generated by the plurality of datapaths 失效
标题翻译：用于使用由多个数据路径生成的存储器请求信号类型来控制仲裁的系统
公开(公告)号：US5548793A
公开(公告)日：1996-08-20
申请号：US230899
申请日：1994-04-21
申请人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Gregory M. Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
发明人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Gregory M. Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
IPC分类号： G06F9/30 , G06F9/38 , G06F13/00 , G06F15/16
CPC分类号： G06F9/3885 , G06F9/30072 , G06F9/30149 , G06F9/3802 , G06F9/3863 , G06F9/3887
摘要： A system and method for arbitrating among memory requests. According to a preferred embodiment, the system comprises a global memory and a plurality of datapaths. Each datapath comprises a datapath processor for executing instructions of an instruction sequence and for providing a plurality of memory request signal types in accordance with the instructions, wherein the plurality of memory request signal types comprises instruction memory request signals, scalar memory request signals, first-in and first-out memory request signals, statistical decoder memory request signals, and block transfer memory request signals. Each datapath also comprises local memory, a global port for transferring data between the local memory and the global memory, and a dual port comprising first and second local ports for transferring data between the local memory and the datapath processor, wherein the first and second local ports permit simultaneous transfer of data between the local memory and the datapath processor. The system comprises a data bus coupled to the global memory for transferring data to and from the global memory, and a transfer controller for controlling block transfer and scalar data transfers between the local memory and the global memory over the data bus and for arbitrating among competing datapaths of the plurality of datapaths to grant to a selected datapath access to the data bus in accordance with the signal types of the memory request signals generated by datapaths of the plurality of datapaths.
摘要翻译：一种用于在存储器请求之间进行仲裁的系统和方法。根据优选实施例，系统包括全局存储器和多个数据路径。每个数据路径包括用于执行指令序列的指令并根据指令提供多个存储器请求信号类型的数据路径处理器，其中多个存储器请求信号类型包括指令存储器请求信号，标量存储器请求信号，输入和先出存储器请求信号，统计解码器存储器请求信号和块传送存储器请求信号。每个数据路径还包括本地存储器，用于在本地存储器和全局存储器之间传送数据的全局端口，以及包括用于在本地存储器和数据路口处理器之间传送数据的第一和第二本地端口的双端口，其中第一和第二本地端口允许在本地存储器和数据路径处理器之间同时传输数据。该系统包括耦合到全局存储器的数据总线，用于将数据传送到全局存储器和从全局存储器传送数据;以及传输控制器，用于通过数据总线控制本地存储器和全局存储器之间的块传输和标量数据传输，并且用于在竞争中进行仲裁根据由多个数据路径的数据路径生成的存储器请求信号的信号类型，多个数据路径的数据路径被授权给对数据总线的选择的数据路径访问。

4. 发明授权

US5530884A System with plurality of datapaths having dual-ported local memory architecture for converting prefetched variable length data to fixed length decoded data 失效
标题翻译：具有多个具有双端口本地存储器架构的数据路径的系统，用于将预取的可变长度数据转换为固定长度解码数据
公开(公告)号：US5530884A
公开(公告)日：1996-06-25
申请号：US230900
申请日：1994-04-21
申请人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Gregory M. Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
发明人： David L. Sprague , Kevin Harney , Eiichi Kowashi , Michael Keith , Allen H. Simon , Gregory M. Papadopoulos , Walter P. Hays , George F. Salem , Shih-Wei Shiue , Anthony P. Bertapelli , Vitaly H. Shilman
IPC分类号： G06F9/30 , G06F9/38 , G06F3/00 , G06F15/16
CPC分类号： G06F9/3885 , G06F9/30072 , G06F9/30149 , G06F9/3802 , G06F9/3863 , G06F9/3887
摘要： A method and apparatus for processing data. According to a preferred embodiment, the apparatus comprises a plurality of datapaths, each datapath comprising datapath processor, and a statistical decoder input channel device. The statistical decoder input channel device prefetches variable length encoded data from a variable length encoded data source in response to a request by a program running on a datapath processor of a datapath of the plurality of datapaths. The statistical decoder input channel device comprises a statistical decoder processor and memory for decoding the variable length encoded data to provide fixed length decoded data, and a transmission output channel for transmitting the fixed length decoded data to the datapath.
摘要翻译：一种处理数据的方法和装置。根据优选实施例，该装置包括多个数据路径，每个数据路径包括数据路径处理器和统计解码器输入通道设备。响应于在多个数据路径的数据通路的数据路径处理器上运行的程序的请求，统计解码器输入通道设备从可变长度编码数据源预取可变长度编码数据。统计解码器输入通道装置包括统计解码器处理器和用于解码可变长度编码数据以提供固定长度解码数据的存储器，以及用于将固定长度解码数据发送到数据路径的发送输出通道。

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