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    • 3. 发明授权
    • Portable phone having electro optic image projection system and orientation sensing device
    • 便携式电话机具有电光影像投影系统和方向感测装置
    • US08160653B2
    • 2012-04-17
    • US12470808
    • 2009-05-22
    • David A. Cathey, Jr.Steven HowellJames Cathey
    • David A. Cathey, Jr.Steven HowellJames Cathey
    • H04Q7/32
    • H04M1/0272G03B21/00G03B21/005G03B29/00H04M1/02H04M1/0202H04M1/0279H04M1/03H04M1/57H04N5/74
    • A portable phone includes a handset and a data projection system configured to form a visual image of data, such as caller waiting ID data, on a viewing surface viewable by a user during a two way conversation. The handset also includes a speaker, a microphone, conventional phone circuitry and a keyboard. The data projection system is configured to receive signals from the phone circuitry, to generate a pattern representative of the data, to process the pattern into a mirror image of the visual image, and to project the mirror image from a bottom end surface of the handset. The projection system includes an electro optic system for generating the pattern, and an optics system for projecting the mirror image onto the viewing surface. A method for projecting data in a portable phone includes the steps of: providing the handset with the data projection system, conducting a two way conversation with the handset held against the head of the user, and forming the visual image on the viewing surface during the two way conversation with the handset held against the head. The method can also include the steps of manipulating the handset and a body part to locate and focus the visual image, sensing an orientation of the handset during the two way conversation, and orienting the visual image as a function of the sensing step.
    • 便携式电话包括手机和数据投影系统,其被配置为在双向对话期间由用户可观看的观看表面上形成诸如呼叫者等待ID数据的数据的视觉图像。 手机还包括扬声器,麦克风,常规电话线路和键盘。 数据投影系统被配置为从电话电路接收信号,以产生表示数据的图案,将图案处理成视觉图像的镜像,并且从手机的底端表面投射镜像 。 投影系统包括用于产生图案的电光系统和用于将镜像投影到观察表面上的光学系统。 一种用于在便携式电话中投影数据的方法包括以下步骤:向手持机提供数据投影系统,与保持在用户头部的手持机进行双向通话,以及在视觉表面上形成视觉图像 与手机对抗的双向对话。 该方法还可以包括以下步骤:操纵手持机和身体部分以定位和聚焦视觉图像,在双向通话期间感测手机的定向,以及根据感测步骤定向视觉图像。
    • 4. 发明授权
    • Field emission control including different RC time constants for display
screen and grid
    • 场发射控制包括显示屏和电网的不同RC时间常数
    • US5721560A
    • 1998-02-24
    • US509501
    • 1995-07-28
    • David A. Cathey, Jr.William LewisGlen E. HushSteven Howell
    • David A. Cathey, Jr.William LewisGlen E. HushSteven Howell
    • G09G3/22H01J3/02H01J1/30H01J19/24
    • H01J3/022G09G3/22G09G2300/08G09G2330/026H01J2329/00
    • A method for controlling a field emission display to reduce emission to grid during turn on and turn off is provided. A field emission display (FED) includes emitter sites formed on a baseplate; a grid for controlling electron emission from the emitter sites; a display screen for collecting electrons to form an image and a power supply. In order to reduce emission to grid during turn on, the display screen is enabled by the power supply prior to enabling of the emitter sites. An anode-baseplate voltage differential is thus established prior to electron emission. For turn on, the method includes varying the capacitances of the control circuits for the display screen and grid such that a time constant (RC) for the grid is larger than a time constant (RC) for the display screen. Alternately the method of the invention can be implemented during turn on using software, using time delay circuit components, or using an emitter site control circuit to control electron flow to the emitter sites. During turn off, the electron emission and anode-baseplate voltage differential are eliminated while a path to ground is provided for the grid.
    • 提供一种用于控制场致发射显示以在打开和关闭期间减少到格栅的发射的方法。 场发射显示器(FED)包括形成在基板上的发射器位置; 用于控制来自发射器位点的电子发射的栅格; 用于收集电子以形成图像和电源的显示屏。 为了在接通电源时减少发射到电网,显示屏在启动发射器位置之前由电源启用。 因此,在电子发射之前建立阳极基板电压差。 为了打开,该方法包括改变用于显示屏和栅格的控制电路的电容,使得网格的时间常数(RC)大于显示屏幕的时间常数(RC)。 或者,本发明的方法可以在打开使用软件,使用时间延迟电路组件或使用发射器位置控制电路来控制到发射器位置的电子流的情况下实现。 在关闭期间,消除了电子发射和阳极基板电压差,同时为电网提供了接地的路径。
    • 5. 发明授权
    • Method for evacuating and sealing field emission displays
    • 排气和密封场发射显示器的方法
    • US5697825A
    • 1997-12-16
    • US538498
    • 1995-09-29
    • Danny DynkaDavid A. Cathey, Jr.Larry D. Kinsman
    • Danny DynkaDavid A. Cathey, Jr.Larry D. Kinsman
    • H01J9/02H01J9/26H01J9/385H01J9/39H01J9/40H01J31/12
    • H01J9/261H01J9/385H01J2329/00
    • A method for evacuating and sealing a field emission display package is provided. The method includes forming a cover plate, a backplate, and a peripheral seal therebetween. The backplate is formed as a sub-assembly which includes a seal ring and a getter material. The seal ring includes compressible protrusions for initially separating the cover plate from the seal ring to provide evacuation openings. During a sealing and evacuation process the packages are placed in the reaction chamber of a furnace. The pressure in the reaction chamber is then reduced and the temperature is increased in a staged sequence. During the evacuating and sealing process the evacuation openings formed by the compressible protrusions provide a flow path for evacuation. As the sealing and evacuation process continues, the compressible protrusions and seal ring flow and commingle to form the peripheral seal. At the same time the getter material is activated and pumps contaminants from the sealed spaced formed within the package.
    • 提供一种用于排放和密封场致发射显示包的方法。 该方法包括在其间形成盖板,背板和周边密封件。 背板形成为包括密封环和吸气材料的子组件。 密封环包括用于将盖板与密封环分开的可压缩突起,以提供抽空开口。 在密封和排空过程中,将包装物放置在炉的反应室中。 然后反应室中的压力降低,温度以分级顺序增加。 在排气和密封过程中,由可压缩突起形成的抽空开口提供用于抽空的流动路径。 随着密封和排气过程的继续,可压缩的突起和密封环流动并相互组合形成周边密封。 同时吸气剂材料被激活并从包装内形成的密封间隔中抽出污染物。
    • 6. 发明授权
    • Process for etching semiconductor devices
    • 半导体器件蚀刻工艺
    • US5185058A
    • 1993-02-09
    • US647262
    • 1991-01-29
    • David A. Cathey, Jr.
    • David A. Cathey, Jr.
    • H01L21/3213
    • H01L21/32139H01L21/32136
    • The subject invention is directed to a process for etching a semiconductor device to form a predetermined etched pattern therein. The semiconductor device which is provided herein typically has a plurality of layers. At least one of these layers comprises a metal-containing material having a metal content of at least about 80% by weight. Etching the semiconductor device with an etchant material forms a predetermined etched pattern therein. This pattern includes the formation of horizontal and upright sidewalls in the etched layers which comprise the metal-containing material. Thus, each of the upright sidewalls has a profile which is either substantially vertically sloped or is positively sloped. This is the case even though the chemical etchant composition, when employed by itself to etch the above-described metal-containing layers, forms sidewall profiles which are substantially negatively sloped configuration. The etchant material employed herein comprises a chemical etchant composition and a coating composition. In one preferred form of this invention the coating composition comprises a gaseous oxide of carbon, particularly carbon monoxide or carbon dioxide, and a silicon-containing compound, respectively. The etchant material is in a substantially gas phase during the etching of the semiconductor device and deposits a protective film on the upright sidewalls of the etched semiconductor device. The silicon-containing compound typically comprises a silicon tetrahalide, preferably comprising SiCl.sub.4, SiBr.sub.4, or SiF.sub.4. However, the most preferred compound being SiCl.sub.4.
    • 本发明涉及用于蚀刻半导体器件以在其中形成预定蚀刻图案的工艺。 本文提供的半导体器件通常具有多个层。 这些层中的至少一层包含金属含量为至少约80重量%的含金属材料。 用蚀刻剂材料蚀刻半导体器件在其中形成预定的蚀刻图案。 该图案包括在包含含金属材料的蚀刻层中形成水平和直立的侧壁。 因此,每个直立侧壁具有基本垂直倾斜或正向倾斜的轮廓。 即使化学蚀刻剂组合物本身用于蚀刻上述含金属层的情况也是这样,即形成基本呈负斜度构型的侧壁型材。 本文采用的蚀刻剂材料包括化学蚀刻剂组合物和涂料组合物。 在本发明的一个优选形式中,涂料组合物分别包含碳,特别是一氧化碳或二氧化碳的气态氧化物和含硅化合物。 在蚀刻半导体器件期间,蚀刻剂材料处于基本气相,并且在蚀刻的半导体器件的直立侧壁上沉积保护膜。 含硅化合物通常包含四卤化硅,优选包含SiCl 4,SiBr 4或SiF 4。 然而,最优选的化合物是SiCl 4。
    • 7. 发明授权
    • Method of preventing junction leakage in field emission displays
    • 防止场致发射显示器的结漏的方法
    • US06398608B1
    • 2002-06-04
    • US09723012
    • 2000-11-27
    • David A. Cathey, Jr.John Lee
    • David A. Cathey, Jr.John Lee
    • H01J924
    • H01J9/025H01J29/04H01J29/06H01J29/89H01J31/127H01J2201/319
    • A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.
    • 提供了一种制造具有改善的结漏电特性的场发射显示(FED)的方法。 该方法包括在FED的阴极发光显示屏和形成在FED的底板上的半导体结之间形成遮光元件。 光阻挡元件保护接点免受在显示屏上形成的光和在环境中产生的光的撞击。 因此,结的电气特性保持恒定,并且提高结漏电。 遮光元件可以形成为不透明的光吸收或光反射层。 此外,遮光元件可以被图案化以保护基板的预定区域并且可以提供诸如互连层的其它电路功能。
    • 9. 发明授权
    • High resistance resistors for limiting cathode current in field emmision
displays
    • 用于限制场致发射显示器中阴极电流的高电阻电阻
    • US5712534A
    • 1998-01-27
    • US688098
    • 1996-07-29
    • John Kichul LeeDavid A. Cathey, Jr.Kevin Tjaden
    • John Kichul LeeDavid A. Cathey, Jr.Kevin Tjaden
    • H01J1/304H01J9/02H01J29/04H01J31/12H01L21/02H01L21/822H01L27/04H01J1/30
    • H01L28/24H01J9/025H01L28/20H01J2201/319
    • A high resistance resistor for regulating current in a field emission display is integrated into circuitry of the field emission display. The resistor is in electrical communication with emitter sites for the field emission display and with other circuit components such as ground. The high resistance resistor can be formed as a layer of a high resistivity material, such as intrinsic polycrystalline silicon, polycrystalline silicon doped with a conductivity-degrading dopant, lightly doped polysilicon, titanium oxynitride, tantalum oxynitride or a glass type material deposited on a baseplate of the field emission display. Contacts are formed in the high resistivity material to establish electrical communication between the resistor and the emitter sites and between the resistor and the other circuit components. The contacts can be formed as low resistance contacts (e.g., ohmic contacts) or as high resistance contacts (e.g., Schottky contacts).
    • 用于调节场发射显示器中的电流的高电阻电阻器被集成到场致发射显示器的电路中。 电阻器与发射器位置电气连通,用于场发射显示器和其他电路部件,例如接地。 高电阻电阻器可以形成为高电阻率材料的层,例如本征多晶硅,掺杂有导电性降解掺杂剂的多晶硅,轻掺杂多晶硅,氮氧化钛,氮氧化钽或沉积在基板上的玻璃类型材料 的场发射显示。 在高电阻率材料中形成触点,以在电阻器和发射极部位之间以及电阻器和其它电路部件之间建立电连通。 触点可以形成为低电阻触点(例如欧姆接触)或作为高电阻触点(例如肖特基触点)。
    • 10. 发明授权
    • Process for etching semiconductor devices
    • 半导体器件蚀刻工艺
    • US5344525A
    • 1994-09-06
    • US996480
    • 1992-12-23
    • David A. Cathey, Jr.
    • David A. Cathey, Jr.
    • H01L21/3213H01L21/00
    • H01L21/32136
    • A process for etching a semiconductor device having a plurality of layers to form a predetermined etched pattern therein is provided. At least one of the layers of the semiconductor device comprise a layer formed of a low reactivity material. A low reactivity material is one which, when chemically reacted with an chemical etchant material, typically in gas phase, at a temperature of up to about 200 degrees C., does not form a substantial amount of volatile by-products from the chemical reaction. The temperature of the low reactivity material layer is therefore elevated, generally in a controllable and uniform manner, to a level which, upon reaction with the chemical etchant material in gas phase, will form a substantial amount of volatile gaseous by-products from the chemical reaction. Then, the semiconductor device is etched with an etchant material to form a predetermined pattern therein. In this way, the chemical etching reaction produces a substantial amount of volatile gaseous by-products. Since a substantial amount of volatile gaseous by-products is formed, the gaseous material can be readily removed from the etching area.
    • 提供了一种用于蚀刻具有多个层以在其中形成预定蚀刻图案的半导体器件的工艺。 半导体器件的至少一层包括由低反应性材料形成的层。 低反应性材料是当与化学蚀刻剂材料化学反应时,典型地在气相中,在高达约200℃的温度下,不会形成大量来自化学反应的挥发性副产物。 因此,低反应性材料层的温度通常以可控和均匀的方式升高到与气相中的化学蚀刻剂材料反应将从化学品形成大量挥发性气态副产物的水平 反应。 然后,用蚀刻剂材料蚀刻半导体器件,以在其中形成预定图案。 以这种方式,化学蚀刻反应产生大量的挥发性气态副产物。 由于形成了大量的挥发性气态副产物,气体材料可以容易地从蚀刻区域移除。