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1. 发明授权

US4098089A Method of laying subsoil membranes 失效
标题翻译：铺设底土膜的方法
公开(公告)号：US4098089A
公开(公告)日：1978-07-04
申请号：US734174
申请日：1976-10-20
申请人： Dan Zaslavsky , Gideon Sinai , Giora Biran
发明人： Dan Zaslavsky , Gideon Sinai , Giora Biran
IPC分类号： A01G15/00 , A01G25/00 , A01G25/06 , E02B11/02 , E02B13/00 , E02D19/18 , E02F5/10
CPC分类号： A01G25/00 , A01B13/08 , A01B17/00 , A01G15/00 , A01G25/06 , E01C3/06 , E02B3/00 , E02B3/16 , E02D19/18 , E02D3/10 , E02D3/12 , E02D31/00 , E02F5/102 , A01G2025/003
摘要： A method for laying subsoil membranes includes dragging a hollow cutting blade through the soil at a predetermined depth, providing a supply of sheeting to the interior of the blade and feeding the sheeting from the interior of the blade through an opening therein. The hollow blade has a cutting edge, a rear edge and an upper section having an upwardly sloping front portion and a downwardly sloping rear portion connected by a center portion. The bottom portion of the blade slopes in an upward direction from its front to form a release angle. The sheet material is fed out of an opening in the rear of the blade.
摘要翻译：用于铺设底土膜的方法包括将中空切割刀片以预定深度拖动穿过土壤，从而向叶片的内部提供片材供应，并且通过其中的开口将片材从叶片的内部供给。中空叶片具有切割边缘，后边缘和上部，其具有通过中心部分连接的向上倾斜的前部和向下倾斜的后部。叶片的底部从其前部向上方倾斜以形成释放角度。片材从叶片后部的开口中送出。

2. 发明授权

US4154549A Method of sealing soil and other materials against the leakage of liquids and gases 失效
标题翻译：密封土壤和其他材料以防止液体和气体泄漏的方法
公开(公告)号：US4154549A
公开(公告)日：1979-05-15
申请号：US896984
申请日：1978-04-17
申请人： Dan Zaslavsky , Giora Biran , Gideon Sinai
发明人： Dan Zaslavsky , Giora Biran , Gideon Sinai
IPC分类号： A01G1/00 , A01G25/00 , A01G25/06 , E02B3/12 , E02D19/06 , E02D19/18 , E02B13/00
CPC分类号： E02D19/06 , A01G1/00 , A01G25/06 , E02B3/12 , E02D19/18 , A01G2025/003
摘要： Seepage of water through soil is considerably reduced by providing plural layers of adjacent, thin impermeable strips wherein the strips of an overlayer are staggered by a half strip's width with regard to the strips of the underlayer, and the widths of the strips are substantially greater than the gaps between adjacent strips and the space between layers.
摘要翻译：通过提供多层相邻的薄的不可渗透的带，其中水的渗透通过提供多层相邻的薄的不可渗透的条，其中相对于底层的条带，覆盖层的条与半条的宽度交错，并且条的宽度基本上大于相邻条带之间的间隙和层之间的空间。

3. 发明授权

US09037770B2 Accelerator engine emulation over an interconnect link 有权
标题翻译：通过互连链路加速器引擎仿真
公开(公告)号：US09037770B2
公开(公告)日：2015-05-19
申请号：US13101215
申请日：2011-05-05
申请人： Giora Biran , Ilya Granovsky
发明人： Giora Biran , Ilya Granovsky
IPC分类号： G06F13/36
CPC分类号： G06F13/36 , G06F13/4022
摘要： An apparatus and method of emulating a hardware accelerator engine over an interconnect link such as PCI Express (PCIe) link. In one embodiment, the accelerator emulation mechanism is implemented inside a PCIe Host Bridge which is integrated into a host IC or chipset. The accelerator emulation mechanism provides an interface compatible with other integrated accelerators thereby eliminating the overhead of maintaining different programming models for local and remote accelerators. Co-processor requests issued by threads requesting a service (client threads) targeting remote accelerator are queued and sent to a PCIe adapter and remote accelerator engine over a PCIe link. The remote accelerator engine performs the requested processing task, delivers results back to host memory and the PCIe Host Bridge performs co-processor request completion sequence (status update, write to flag, interrupt) include in the co-processor command.
摘要翻译：在诸如PCI Express（PCIe）链路的互连链路上仿真硬件加速器引擎的装置和方法。在一个实施例中，加速器仿真机制在集成到主机IC或芯片组中的PCIe主机桥内部实现。加速器仿真机制提供了与其他集成加速器兼容的接口，从而消除了为本地和远程加速器维护不同编程模型的开销。请求针对远程加速器的服务（客户端线程）的线程发出的协处理器请求排队，并通过PCIe链路发送到PCIe适配器和远程加速器引擎。远程加速器引擎执行所请求的处理任务，将结果传回主机存储器，并且PCIe主机桥执行协处理器请求完成序列（状态更新，写入标志，中断）包括在协处理器命令中。

4. 发明授权

US08806292B2 Method of hybrid compression acceleration utilizing special and general purpose processors 有权
标题翻译：使用特殊和通用处理器的混合压缩加速方法
公开(公告)号：US08806292B2
公开(公告)日：2014-08-12
申请号：US13327111
申请日：2011-12-15
申请人： Giora Biran , Amit Golander , Kiyoshi Nishino , Nobuyoshi Tanaka
发明人： Giora Biran , Amit Golander , Kiyoshi Nishino , Nobuyoshi Tanaka
IPC分类号： H03M13/00
CPC分类号： H03M7/30 , H03M7/3086 , H03M13/09 , H03M13/6312
摘要： A hybrid mechanism whereby hardware acceleration is combined with software such that the compression rate achieved is significantly increased while maintaining the original compression ratio (e.g., using full DHT and not SHT or an approximation). The compression acceleration mechanism is applicable to a hardware accelerator tightly coupled with the general purpose processor. The compression task is divided and parallelized between hardware and software wherein each compression task is split into two acceleration requests: a first request that performs SHT encoding using hardware acceleration and provides post-LZ frequency statistics; and a second request that performs SHT decoding and DHT encoding using the DHT generated in software.
摘要翻译：一种混合机制，其硬件加速度与软件组合，使得实现的压缩率显着增加，同时保持原始压缩比（例如，使用完全DHT而不是SHT或近似）。压缩加速机制适用于与通用处理器紧密耦合的硬件加速器。压缩任务在硬件和软件之间进行分割和并行化，其中每个压缩任务分为两个加速请求：使用硬件加速执行SHT编码并提供后LZ频率统计的第一请求; 以及使用在软件中生成的DHT来执行SHT解码和DHT编码的第二请求。

5. 发明授权

US08635180B2 Multiple hash scheme for use in a pattern matching accelerator 失效
标题翻译：用于模式匹配加速器的多个哈希方案
公开(公告)号：US08635180B2
公开(公告)日：2014-01-21
申请号：US13021757
申请日：2011-02-06
申请人： Giora Biran , Christoph Hagleitner , Timothy Hume Heil , Jan Van Lunteren
发明人： Giora Biran , Christoph Hagleitner , Timothy Hume Heil , Jan Van Lunteren
IPC分类号： G06N5/04
CPC分类号： G06N5/047 , G06N5/025
摘要： A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using regular expressions that are compiled into a data structure comprised of rules subsequently processed by the PMA. The patterns to be searched in the input stream are defined by the user as a set of regular expressions. The patterns to be searched are grouped in pattern context sets. The sets of regular expressions which define the pattern context sets are compiled to generate a rules structure used by the PMA hardware. The rules are compiled before search run time and stored in main memory, in rule cache memory within the PMA or a combination thereof. For each input character, the PMA executes the search and returns the search results.
摘要翻译：模式匹配加速器（PMA），用于帮助软件线程查找匹配给定模式的输入数据流中字符串的存在和位置。使用正则表达式定义模式，该正则表达式被编译成由PMA随后处理的规则组成的数据结构。在输入流中要搜索的模式由用户定义为一组正则表达式。要搜索的模式分组在模式上下文集中。定义模式上下文集的正则表达式集合被编译为生成由PMA硬件使用的规则结构。该规则在搜索运行时间之前被编译并存储在主存储器中，在PMA内的规则高速缓冲存储器中或其组合中。对于每个输入字符，PMA执行搜索并返回搜索结果。

6. 发明申请

US20130321180A1 METHOD OF ACCELERATING DYNAMIC HUFFMAN DECOMPACTION WITHIN THE INFLATE ALGORITHM 有权
标题翻译：在加速算法中加速动态失效分解的方法
公开(公告)号：US20130321180A1
公开(公告)日：2013-12-05
申请号：US13484296
申请日：2012-05-31
申请人： Giora Biran , Amit Golander , Shai Ishaya Tahar
发明人： Giora Biran , Amit Golander , Shai Ishaya Tahar
IPC分类号： H03M7/40
CPC分类号： H03M7/425 , H03M7/40 , H03M7/405
摘要： A system and method of accelerating dynamic Huffman decompaction within the inflate algorithm. To improve the performance of a decompression engine during the inflate/decompression process, Huffman trees decompacted a priori are used thus eliminating the requirement of decompacting the DHT for each input stream. The Huffman tree in the input stream is matched prior to decompaction. If a match is found, the stored decompacted Huffman tree is used which reduces the required decompression time.
摘要翻译：在充气算法中加速动态霍夫曼分解的系统和方法。为了在充气/解压缩过程中提高解压缩引擎的性能，使用先验解压缩的霍夫曼树，从而消除了对每个输入流解码DHT的要求。输入流中的霍夫曼树在分解前进行匹配。如果找到匹配，则使用存储的分解的霍夫曼树，这降低了所需的减压时间。

7. 发明授权

US08438265B2 Method of offloading iSCSI PDU corruption-detection digest generation from a host processing unit, and related iSCSI offload engine 失效
标题翻译：从主机处理单元卸载iSCSI PDU损坏检测摘要生成的方法以及相关的iSCSI卸载引擎
公开(公告)号：US08438265B2
公开(公告)日：2013-05-07
申请号：US11163958
申请日：2005-11-04
申请人： Giora Biran , Vadim Makhervaks , Leah Shalev
发明人： Giora Biran , Vadim Makhervaks , Leah Shalev
IPC分类号： G06F15/173
CPC分类号： H04L69/16 , H04L69/163 , H04L69/166
摘要： A method of offloading, from a host data processing unit (205), the generation of data corruption-detection digests for iSCSI PDUs to be transmitted as TCP segments over respective TCP connections. An iSCSI layer processing software (310) executed by the host data processing unit provides a command descriptor list (320) containing command descriptors adapted to identify portions of at least one iSCSI PDU to be transmitted, and data corruption-detection digest descriptors (CRC DESC(PDUa); CRC DESC(PDUb)), each one associated with a respective PDU data corruption-detection digest. An iSCSI processing offload engine (223) transmits the iSCSI PDU over the respective TCP connection, based on the descriptors in the command descriptor list; during the transmission, the iSCSI PDU data corruption-detection digest are calculated, and the calculated data corruption-detection digest is saved in the corresponding data corruption-detection digest descriptor in the command descriptor list.
摘要翻译：从主机数据处理单元（205）卸载要通过各个TCP连接作为TCP段发送的iSCSI PDU的数据损坏检测摘要的方法。由主机数据处理单元执行的iSCSI层处理软件（310）提供包含适于识别要发送的至少一个iSCSI PDU的部分的命令描述符的命令描述符列表（320）和数据损坏检测摘要描述符（CRC DESC （PDUa）; CRC DESC（PDUb）），每个与相应的PDU数据损坏检测摘要相关联。 iSCSI处理卸载引擎（223）基于命令描述符列表中的描述符通过相应的TCP连接发送iSCSI PDU; 在传输过程中，计算出iSCSI PDU数据损坏检测摘要，并将计算出的数据损坏检测摘要保存在命令描述符列表中相应的数据损坏检测摘要描述符中。

8. 发明授权

US08402003B2 Performance monitoring mechanism for use in a pattern matching accelerator 失效
标题翻译：用于模式匹配加速器的性能监视机制
公开(公告)号：US08402003B2
公开(公告)日：2013-03-19
申请号：US13022904
申请日：2011-02-08
申请人： Giora Biran , Christoph Hagleitner , Timothy H. Heil , Jan Van Lunteren
发明人： Giora Biran , Christoph Hagleitner , Timothy H. Heil , Jan Van Lunteren
IPC分类号： G06F17/30
CPC分类号： G06F17/30985
摘要： A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using regular expressions that are compiled into a data structure comprised of rules subsequently processed by the PMA. The patterns to be searched in the input stream are defined by the user as a set of regular expressions. The patterns to be searched are grouped in pattern context sets. The sets of regular expressions which define the pattern context sets are compiled to generate a rules structure used by the PMA hardware. The rules are compiled before search run time and stored in main memory, in rule cache memory within the PMA or a combination thereof. For each input character, the PMA executes the search and returns the search results.
摘要翻译：模式匹配加速器（PMA），用于帮助软件线程查找匹配给定模式的输入数据流中字符串的存在和位置。使用正则表达式定义模式，该正则表达式被编译成由PMA随后处理的规则组成的数据结构。在输入流中要搜索的模式由用户定义为一组正则表达式。要搜索的模式分组在模式上下文集中。编译定义模式上下文集的正则表达式集合，以生成PMA硬件使用的规则结构。该规则在搜索运行时间之前被编译并存储在主存储器中，在PMA内的规则高速缓冲存储器中或其组合中。对于每个输入字符，PMA执行搜索并返回搜索结果。

9. 发明申请

US20120254587A1 ACCELERATOR ENGINE COMMANDS SUBMISSION OVER AN INTERCONNECT LINK 有权
标题翻译：加速器发动机命令通过互连链路提交
公开(公告)号：US20120254587A1
公开(公告)日：2012-10-04
申请号：US13077804
申请日：2011-03-31
申请人： Giora Biran , Ilya Granovsky
发明人： Giora Biran , Ilya Granovsky
IPC分类号： G06F15/76 , G06F9/30
CPC分类号： G06F9/3877 , G06F9/547 , G06F13/38 , G06F13/4022 , G06F13/4282 , G06F15/167 , G06F2213/0026
摘要： An apparatus and method of submitting hardware accelerator engine commands over an interconnect link such as a PCI Express (PCIe) link. In one embodiment, the mechanism is implemented inside a PCIe Host Bridge which is integrated into a host IC or chipset. The mechanism provides an interface compatible with other integrated accelerators thereby eliminating the overhead of maintaining different programming models for local and remote accelerators. Co-processor requests issued by threads requesting a service (client threads) targeting remote accelerator are queued and sent to a PCIe adapter and remote accelerator engine over a PCIe link. The remote accelerator engine performs the requested processing task, delivers results back to host memory and the PCIe Host Bridge performs co-processor request completion sequence (status update, write to flag, interrupt) include in the co-processor command.
摘要翻译：通过诸如PCI Express（PCIe）链路的互连链路提交硬件加速器引擎命令的装置和方法。在一个实施例中，该机制在集成到主机IC或芯片组中的PCIe主机桥内部实现。该机制提供了与其他集成加速器兼容的接口，从而消除了为本地和远程加速器维护不同编程模型的开销。请求针对远程加速器的服务（客户端线程）的线程发出的协处理器请求排队，并通过PCIe链路发送到PCIe适配器和远程加速器引擎。远程加速器引擎执行所请求的处理任务，将结果传回主机存储器，并且PCIe主机桥执行协处理器请求完成序列（状态更新，写入标志，中断）包括在协处理器命令中。

10. 发明授权

US08131881B2 Completion coalescing by TCP receiver 失效
标题翻译：完成由TCP接收器合并
公开(公告)号：US08131881B2
公开(公告)日：2012-03-06
申请号：US11839185
申请日：2007-08-15
申请人： Giora Biran , Vadim Makhervaks
发明人： Giora Biran , Vadim Makhervaks
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L49/90 , H04L69/161 , H04L69/163
摘要： A method and system for completion coalescing by a Transmission Control Protocol (TCP) receiver (e.g., in a TCP/IP offload engine (TOE)). The method comprises: processing inbound TCP segments; and performing completion processing of received TCP ACKS and/or RDMA Read Requests independently of the processing of the inbound TCP segments.
摘要翻译：用于由传输控制协议（TCP）接收机（例如，在TCP / IP卸载引擎（TOE）中）完成合并的方法和系统。该方法包括：处理入站TCP段; 并且独立于入站TCP段的处理执行接收的TCP ACKS和/或RDMA读取请求的完成处理。

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