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1. 发明申请

US20150036426A1 NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAM VERIFYING THE SAME 有权
标题翻译：非易失性存储器件及其验证方法
公开(公告)号：US20150036426A1
公开(公告)日：2015-02-05
申请号：US14284031
申请日：2014-05-21
申请人： DONGHUN KWAK , HYUN-WOOK PARK , KITAE PARK
发明人： DONGHUN KWAK , HYUN-WOOK PARK , KITAE PARK
IPC分类号： G11C16/10 , G11C16/34 , G11C16/26
CPC分类号： G11C16/3459 , G11C16/0483 , G11C16/10 , G11C16/26
摘要： A program method of a three-dimensional nonvolatile memory device is provided which includes executing at least one program loop including an operation of programming selected memory cells of a selected string turned on by a selected string selection transistor and an operation of verifying whether programming of the memory cells is passed; and applying a negative counter voltage to a selected word line connected to the selected memory cells of the selected string at least once during an interval of the verify operation where there are turned on string selection transistors of unselected strings connected through the same bit line as that of the selected string.
摘要翻译：提供了一种三维非易失性存储器件的编程方法，包括执行至少一个程序循环，该程序循环包括对由所选择的字符串选择晶体管导通的所选字符串的选定存储单元进行编程的操作，以及验证是否对记忆细胞通过; 以及在验证操作的间隔期间至少一次将连接到所选字符串的所选择的存储单元的选定字线施加负的反电压，其中通过与该相同的位线连接的未选择的串连接的串选择晶体管，的选定字符串。

2. 发明申请

US20140219020A1 MEMORY SYSTEM COMPRISING NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF 有权
标题翻译：包含非易失性存储器件的存储器系统及其程序方法
公开(公告)号：US20140219020A1
公开(公告)日：2014-08-07
申请号：US14161886
申请日：2014-01-23
申请人： DONGHUN KWAK , KITAE PARK
发明人： DONGHUN KWAK , KITAE PARK
IPC分类号： G11C16/10
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/22
摘要： A memory system includes a nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device such that memory cells connected with a selected row of the nonvolatile memory device are programmed by one of a first program mode and a second program mode. At the first program mode, a plurality of logical pages corresponding in number to a maximum page number is stored at the memory cells, and at the second program mode, one or more logical pages the number of which is less than the maximum page number are stored at the memory cells using a bias condition that is different from that used in the first program mode.
摘要翻译：存储器系统包括非易失性存储器设备和配置成控制非易失性存储器件的存储器控制器，使得与非易失性存储器件的选定行连接的存储单元通过第一程序模式和第二程序模式之一进行编程。在第一编程模式下，存储器单元中存储有多个对应于最大页号的逻辑页，并且在第二编程模式下，一个或多个逻辑页数小于最大页数，使用与第一程序模式中使用的偏差条件不同的偏置条件存储在存储器单元。

3. 发明申请

US20150332777A1 STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND READ METHOD THEREOF 审中-公开
标题翻译：包含非易失性存储器件的存储器件及其读取方法
公开(公告)号：US20150332777A1
公开(公告)日：2015-11-19
申请号：US14692494
申请日：2015-04-21
申请人： SANGYONG YOON , DONGHUN KWAK , KITAE PARK , MYUNG-HOON CHOI , SEUNG-CHEOL HAN
发明人： SANGYONG YOON , DONGHUN KWAK , KITAE PARK , MYUNG-HOON CHOI , SEUNG-CHEOL HAN
IPC分类号： G11C16/26 , G06F11/10 , G11C29/52 , G11C16/04
CPC分类号： G11C16/26 , G06F11/1068 , G06F11/1072 , G11C11/5642 , G11C16/0466 , G11C16/0483 , G11C29/52 , G11C2013/0057
摘要： A read method of a nonvolatile memory device includes reading data from a selected memory area of the nonvolatile memory device according to a first read voltage; detecting and correcting an error of the read data; and deciding a second read voltage for reading the selected memory area when an error of the read data is uncorrectable. The second read voltage is decided according to either the number of logical 0s or 1s included in the read data, or a ratio of logical 1s to logical 0s in the read data.
摘要翻译：非易失性存储器件的读取方法包括根据第一读取电压从非易失性存储器件的选定存储区读取数据; 检测和校正读取数据的错误; 以及当读取的数据的错误是不可校正时，决定用于读取所选择的存储区域的第二读取电压。第二读取电压根据读取数据中包括的逻辑0或1的数量，或读取数据中的逻辑1与逻辑0的比率来决定。

4. 发明申请

US20150340099A1 OPERATING METHOD OF STORAGE DEVICE 有权
标题翻译：存储设备的操作方法
公开(公告)号：US20150340099A1
公开(公告)日：2015-11-26
申请号：US14668086
申请日：2015-03-25
申请人： DONGHUN KWAK
发明人： DONGHUN KWAK
IPC分类号： G11C16/34 , G11C16/16 , G06F12/02
CPC分类号： G11C16/34 , G11C11/5628 , G11C11/5642 , G11C16/12 , G11C16/16 , G11C29/021 , G11C29/028
摘要： An operating method of a storage device which includes a nonvolatile memory is provided. The operating method includes performing a first program operation on selected memory cells of the nonvolatile memory and storing a first time when the first program operation is performed; and adjusting a program parameter according to a difference between the first time and a second time, and performing a second program operation on the selected memory cells using the adjusted program parameter, the second time being a time when the second program operation is performed.
摘要翻译：提供一种包括非易失性存储器的存储装置的操作方法。所述操作方法包括对所述非易失性存储器的所选择的存储器单元执行第一程序操作，并且在执行所述第一程序操作时第一次存储; 以及根据第一时间和第二时间之间的差异来调整节目参数，以及使用所调整的节目参数对所选择的存储器单元执行第二编程操作，第二时间是执行第二编程操作的时间。

5. 发明申请

US20140204684A1 NONVOLATILE MEMORY DEVICES, MEMORY SYSTEMS AND RELATED CONTROL METHODS 有权
标题翻译：非易失性存储器件，存储器系统和相关控制方法
公开(公告)号：US20140204684A1
公开(公告)日：2014-07-24
申请号：US14153627
申请日：2014-01-13
申请人： DONGHUN KWAK , HYUN JUN YOON , DONGKYO SHIM
发明人： DONGHUN KWAK , HYUN JUN YOON , DONGKYO SHIM
IPC分类号： G11C7/10
CPC分类号： G11C7/22 , G11C7/10 , G11C7/1063 , G11C16/0483 , G11C16/26
摘要： A nonvolatile memory device includes a cell array including a plurality of cell strings extending on a substrate in a vertical direction, a page buffer connected to a plurality of bit lines and configured to store sensing data of the cell array in a sensing operation, a voltage generator configured to provide voltages to a plurality of word lines and the plurality of bit lines, and an input/output buffer configured to temporarily store the sensing data received in a data dump from the page buffer and to output the temporarily stored data to an external device. The nonvolatile memory device further includes control logic configured to set a status of the nonvolatile memory device to a ready state after the sensing data is dumped to the input/output buffer and before recovery of the cell array from a bias voltage of the sensing operation is complete.
摘要翻译：一种非易失性存储器件，包括一个单元阵列，该单元阵列包括在垂直方向上在基片上延伸的多个单元串，连接到多个位线的一个页缓冲器，并且被配置为在感测操作中存储该单元阵列的感测数据，发生器，其被配置为向多个字线和所述多个位线提供电压;以及输入/输出缓冲器，被配置为临时存储从所述页缓冲器接收的数据转储中的感测数据，并将所述临时存储的数据输出到外部设备。非易失性存储装置还包括控制逻辑，其被配置为在将感测数据转储到输入/输出缓冲器之后并且在从感测操作的偏置电压恢复单元阵列之前将非易失性存储器件的状态设置为就绪状态完成。

6. 发明申请

US20150331627A1 NONVOLATILE MEMORY DEVICE AND OPERATION METHOD OF STORAGE DEVICE INCLUDING THE NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件和包含非易失性存储器件的存储器件的操作方法
公开(公告)号：US20150331627A1
公开(公告)日：2015-11-19
申请号：US14606252
申请日：2015-01-27
申请人： DONGHUN KWAK
发明人： DONGHUN KWAK
IPC分类号： G06F3/06
CPC分类号： G06F3/06 , G06F3/0619 , G06F3/065 , G06F3/0655 , G06F3/0688 , G06F12/00 , G11C11/5628 , G11C11/5635 , G11C16/16 , G11C16/20 , G11C16/3418 , G11C16/3427 , G11C2211/5648
摘要： A method of operating a storage device having a nonvolatile memory including at least one memory block having a plurality of sub-blocks includes reading backup data of backup memory cells having a highest program state among a plurality of memory cells connected to at least one word line of a sub-block which is not erase-requested adjacent to an erase-requested sub-block among the sub-blocks. The method includes storing the backup data, erasing the erase-requested sub-block, and reprogramming the backup memory cells having the highest program state on the basis of the backup data.
摘要翻译：一种操作具有非易失性存储器的存储装置的方法，所述非易失性存储器包括具有多个子块的至少一个存储块，包括在连接到至少一个字线的多个存储单元中读取具有最高编程状态的备份存储单元的备份数据在子块之间不与擦除请求子块相邻的擦除请求的子块。该方法包括存储备份数据，擦除擦除请求的子块，以及基于备份数据重新编程具有最高程序状态的备份存储单元。

7. 发明申请

US20140043901A1 NONVOLATILE MEMORY DEVICE AND OPERATING METHOD WITH VARIABLE MEMORY CELL STATE DEFINITIONS 审中-公开
标题翻译：非易失性存储器件和具有可变存储器单元状态定义的操作方法
公开(公告)号：US20140043901A1
公开(公告)日：2014-02-13
申请号：US13727757
申请日：2012-12-27
申请人： DONGHUN KWAK
发明人： DONGHUN KWAK
IPC分类号： G11C16/14 , G11C16/10 , G11C16/06
CPC分类号： G11C16/14 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C2211/5641 , G11C2213/71
摘要： A method operating a nonvolatile memory device includes successively programming a memory cell without physically erasing the memory cell. Each successive programming of the memory cell uses a different erase state region to indicate an erase state for the memory cell.
摘要翻译：操作非易失性存储器件的方法包括在不物理擦除存储器单元的情况下连续编程存储器单元。存储单元的每个连续编程使用不同的擦除状态区域来指示存储器单元的擦除状态。

8. 发明申请

US20140164685A1 NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOEF 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US20140164685A1
公开(公告)日：2014-06-12
申请号：US14091382
申请日：2013-11-27
申请人： DONGHUN KWAK
发明人： DONGHUN KWAK
IPC分类号： G06F12/02
CPC分类号： G11C29/82 , G11C16/0483 , G11C16/344
摘要： An operating method is for operating a memory controller which controls a non-volatile memory device. The non-volatile memory device includes a plurality of memory cells arranged in a direction perpendicular to a substrate. The operating method includes erasing the plurality of memory cells, reading memory cells connected with a first word line using a first word line voltage to search string address information corresponding to memory cells being at an off state, and programming memory cells corresponding to the string address information to a particular program state based on the string address information to store mapping information.
摘要翻译：操作方法是操作控制非易失性存储器件的存储器控制器。非易失性存储器件包括沿垂直于衬底的方向布置的多个存储单元。操作方法包括擦除多个存储器单元，使用第一字线电压读取与第一字线连接的存储单元，以搜索与处于关闭状态的存储器单元相对应的字符串地址信息，以及编程与字符串地址对应的存储器单元基于字符串地址信息来存储映射信息到特定程序状态的信息。

9. 发明申请

US20170011799A1 NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件
公开(公告)号：US20170011799A1
公开(公告)日：2017-01-12
申请号：US14996249
申请日：2016-01-15
申请人： JI-SANG LEE , DONGHUN KWAK , DAESEOK BYEON , CHIWEON YOON
发明人： JI-SANG LEE , DONGHUN KWAK , DAESEOK BYEON , CHIWEON YOON
IPC分类号： G11C16/10 , G11C16/24 , G11C16/04 , G11C16/30 , G11C16/08 , G11C16/26
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/24 , G11C16/26
摘要： A nonvolatile memory includes a memory cell array, a row decoder circuit, and a page buffer circuit. The row decoder circuit applies a turn-on voltage to string selection lines, which are connected to string selection transistors of a selected memory block, at a first precharge operation in response to a write command received from an external device. The page buffer circuit applies, in response to the write command, a first voltage to bit lines, which are connected to the string selection transistors, through a first precharge circuit at the first precharge operation regardless of loaded data and applies the first voltage and a second voltage to the bit lines through a second precharge circuit at a second precharge operation based on the loaded data. During the first precharge operation, write data is loaded onto the page buffer circuit.
摘要翻译：非易失性存储器包括存储单元阵列，行解码器电路和页缓冲电路。行解码器电路响应于从外部设备接收到的写入命令，在第一预充电操作时，对连接到所选存储块的串选择晶体管的串选择线施加导通电压。页缓冲器电路响应于写入命令，在第一预充电操作下，连接到串选择晶体管的第一电压至位线，而不管加载数据如何，并施加第一电压和基于所加载的数据，在第二预充电操作中通过第二预充电电路对位线施加第二电压。在第一预充电操作期间，写数据被加载到页缓冲电路。

10. 发明申请

US20150301941A1 SYSTEM AND METHOD INCLUDING THREE DIMENSIONAL NONVOLATILE MEMORY DEVICE AND RANDOM ACCESS MEMORY 审中-公开
标题翻译：包括三维非易失性存储器件和随机访问存储器的系统和方法
公开(公告)号：US20150301941A1
公开(公告)日：2015-10-22
申请号：US14755912
申请日：2015-06-30
申请人： BYUNG HEI JUN , DONGHUN KWAK
发明人： BYUNG HEI JUN , DONGHUN KWAK
IPC分类号： G06F12/06 , G06F12/02
CPC分类号： G06F3/0605 , G06F3/061 , G06F3/064 , G06F3/0656 , G06F3/0679 , G06F12/0246 , G06F12/0292 , G06F12/0638 , G06F2212/1016 , G06F2212/1041 , G06F2212/205 , G11C7/10 , G11C11/5628 , G11C16/06 , G11C16/10 , G11C16/3454
摘要： A program method for a memory system including a three-dimensional nonvolatile memory having multi-level memory cells and a random access memory. The method uses the random access memory to variously store selected bits of multi-bit data during the programming of a row of memory cells in the three-dimensional nonvolatile memory.
摘要翻译：一种包括具有多级存储器单元的三维非易失性存储器和随机存取存储器的存储器系统的编程方法。该方法在三维非易失性存储器中的一行存储器单元的编程期间使用随机存取存储器来各种存储多位数据的选定位。

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