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    • 3. 发明授权
    • Apparatus and method for large hardware finite state machine with embedded equivalence classes
    • 具有嵌入式等价类的大型硬件有限状态机的装置和方法
    • US07180328B2
    • 2007-02-20
    • US10850978
    • 2004-05-21
    • Stephen GouldErnest PeltzerRobert Matthew BarrieMichael FlanaganDarren Williams
    • Stephen GouldErnest PeltzerRobert Matthew BarrieMichael FlanaganDarren Williams
    • H03K19/173G06F7/38
    • G06F9/4498
    • A programmable finite state machine (FSM) includes, in part, a first address calculation logic block, a first lookup table, a second address calculation logic block, and a second lookup table. The first address calculation logic block generates an address for the first lookup table based on the received input symbol and the current state. The data stored in first look-up table at the generated address is used by the second address calculation logic block to compute an address for the second lookup table. Data stored in the second lookup table is the next state to which the FSM transitions. The programmable FSMs uses redundant information of the transition table to compress these transitions and thus requires a smaller memory while maintaining a high data throughput. The data in the first and second lookup tables are coded and supplied by a compiler. The FSM operation may optionally be pipelined.
    • 可编程有限状态机(FSM)部分地包括第一地址计算逻辑块,第一查找表,第二地址计算逻辑块和第二查找表。 第一地址计算逻辑块基于接收到的输入符号和当前状态生成第一查找表的地址。 存储在生成地址的第一查找表中的数据由第二地址计算逻辑块用于计算第二查找表的地址。 存储在第二查找表中的数据是FSM转换到的下一个状态。 可编程FSM使用过渡表的冗余信息来压缩这些转换,因此需要较小的存储器,同时保持较高的数据吞吐量。 第一和第二查找表中的数据由编译器编码和提供。 FSM操作可以可选地被流水线化。
    • 5. 发明授权
    • Apparatus and method for generating state transition rules for memory efficient programmable pattern matching finite state machine hardware
    • 用于产生存储器有效可编程模式匹配有限状态机硬件的状态转换规则的装置和方法
    • US07219319B2
    • 2007-05-15
    • US11422520
    • 2006-06-06
    • Stephen GouldRobert Matthew BarrieDarren WilliamsNicholas de Jong
    • Stephen GouldRobert Matthew BarrieDarren WilliamsNicholas de Jong
    • G06F17/50
    • H04L63/12
    • A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
    • 可编程有限状态机(FSM)部分地包括第一和第二存储器,以及耦合到每个存储器的选择电路。 当接收到表示k位输入符号和m位当前状态的(k + m)位字时,第一存储器提供存储在其中的一个或多个匹配转换规则。 选择电路选择最具体的提供的规则。 过渡规则以一般性的排序顺序存储在第一存储器中。 第二个存储器接收所选择的转移规则并提供FSM的下一个状态。 第一存储器可以是三进制内容可寻址存储器,并且第二存储器可以是静态随机存取存储器。 内容可寻址存储器和静态随机存储器的内容由最小化表示下一状态转换功能所需的术语数量的算法确定。