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1. 发明授权

US4920287A Output buffer having reduced electric field degradation 失效
标题翻译：具有降低的电场退化的输出缓冲器
公开(公告)号：US4920287A
公开(公告)日：1990-04-24
申请号：US265660
申请日：1988-11-01
申请人： Cornelis D. Hartgring , Jan Dikken , Tiemen Poorter
发明人： Cornelis D. Hartgring , Jan Dikken , Tiemen Poorter
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/78 , H03K17/10 , H03K19/003 , H03K19/0948
CPC分类号： H03K19/00361 , H03K19/00315
摘要： A digital circuit with a 5 V power supply voltage in which NMOS transistors constructed in sub-micron technology are protected against excessive field strengths by means of additional transistors in order to prevent so-called "hot carrier stress" for this purpose the additional transistors have a greater channel length and/or a higher threshold voltage.

2. 发明申请

US20080259657A1 Boosting Technique for a Bi-Directional Switch in a Power Converter 有权
标题翻译：电力转换器双向开关升压技术
公开(公告)号：US20080259657A1
公开(公告)日：2008-10-23
申请号：US11995599
申请日：2006-07-19
申请人： Jan Dikken , Peter T. J. Degen
发明人： Jan Dikken , Peter T. J. Degen
IPC分类号： H02M3/335
CPC分类号： H02M3/33584
摘要： A bi-directional switch for a power converter comprises first and second transistors (SW1, SW2) and a floating supply capacitor (C2) associated with the second transistor (SW2). The drive circuit and/or gate of the first transistor (SW1) is charged by the floating supply capacitor (C2) of the second transistor (SW2). The charging takes place at a predetermined moment in the switching cycle, and in particular at a moment in the switching cycle when the voltage across the bi-directional switch is substantially a minimum.
摘要翻译：用于功率转换器的双向开关包括与第二晶体管（SW 2）相关联的第一和第二晶体管（SW 1，SW 2）和浮置电源电容器（C 2）。第一晶体管（SW 1）的驱动电路和/或栅极由第二晶体管（SW 2）的浮置电源电容器（C 2）充电。充电在开关周期中的预定时刻进行，特别是当双向开关上的电压基本上是最小时，在开关周期中的时刻。

3. 发明授权

US5047657A Integrated circuit comprising a signal level converter 失效
标题翻译：集成电路包括信号电平转换器
公开(公告)号：US5047657A
公开(公告)日：1991-09-10
申请号：US402002
申请日：1989-09-01
申请人： Evert Seevinck , Jan Dikken , Hans-Jurgen O. Schumacher
发明人： Evert Seevinck , Jan Dikken , Hans-Jurgen O. Schumacher
IPC分类号： G11C11/417 , H03K5/02 , H03K19/003 , H03K19/017 , H03K19/0185
CPC分类号： H03K19/00384 , H03K19/01707
摘要： An integrated circuit which includes a converter for converting a logic input signal of a first logic type into a logic output signal of a second logic type, for example, from ECL to CMOS level. The converter comprises a buffer, including a controllable load and a driver transistor, and a control circuit. The load is controlled as a function of a control voltage and a reference voltage which are externally applied so that the output signal is substantially equal to the reference voltage if the input signal is substantially equal to the control voltage. In one embodiment the control circuit is a copy of the buffer and receives the control voltage at its input. Its load is controlled by a differential amplifier whose inputs receive the reference voltage and the output voltage of the control circuit. A CMOS-SRAM comprising ECL/CMOS level converters of the above kind communicates with fast ECL circuits and has a low energy consumption.

4. 发明授权

US4992755A Transistor circuit 失效
标题翻译：晶体管电路
公开(公告)号：US4992755A
公开(公告)日：1991-02-12
申请号：US467340
申请日：1990-01-19
申请人： Evert Seevinck , Jan Dikken , Hans-Jurgen Schumacher
发明人： Evert Seevinck , Jan Dikken , Hans-Jurgen Schumacher
IPC分类号： H03K5/02 , H03F1/32 , H03F3/45 , H03K19/003 , H03K19/0185
CPC分类号： H03K19/00361 , H03F1/3211 , H03F3/4565 , H03F3/45654 , H03F3/45659 , H03K19/018521 , H03F2203/45394
摘要： A transistor circuit comprising a first differential amplifier which is composed of a differential pair and a current mirror. The transistor circuit further comprises a second differential amplifier which measures a differential offset voltage in the first differential amplifier and reduces this offset voltage by means of common mode current feedback. The transistor circuit thus provides a stable amplifier having a high speed and a low offset voltage which can be used advantageously in a logic output buffer so that, for example, an ECL output buffer can be realized in CMOS.

5. 发明授权

US07183756B1 Current monitoring system using bi-directional current sensor 有权
标题翻译：电流监测系统采用双向电流传感器
公开(公告)号：US07183756B1
公开(公告)日：2007-02-27
申请号：US10545186
申请日：2004-02-06
申请人： Jan Dikken , Ferry Nieuwhoff
发明人： Jan Dikken , Ferry Nieuwhoff
IPC分类号： G05F1/40
CPC分类号： G05F3/262 , G01R19/0092
摘要： A power management system (100) comprising a power generator (1) for providing a supply signal (Vchg) to a load (2), a floating controllable bi-directional current sensor (N1) coupled via a first connection (10) to the power generator and via a second connection (20) to the load (2) for detecting a positive current (pos) flowing from the power generator (1) to the load (2) and a negative current (neg) from the load (2) to the power generator (3). In accordance with the invention, the floating controllable bi-directional current sensor (N1) is controlled by a current management block (3) coupled to a control terminal (G) of the floating controllable bi-directional current sensor (N1) and to the first and second connections (10, 20) for controlling an equivalent voltage between the first connection (10) and the second connection (20), for providing a first current (Ipos), which is proportional with the positive current (pos), and for providing a second current (Ineg), which is proportional with the negative current (neg).
摘要翻译：一种电力管理系统（100），包括用于向负载（2）提供电源信号（Vchg）的功率发生器（1），经由第一连接（10）耦合到所述第一连接（10）的浮动可控双向电流传感器所述发电机并且经由与所述负载（2）的第二连接（20），用于检测从所述发电机（1）流向所述负载（2）的正电流（pos），以及负载（负） 2）发电机（3）。根据本发明，浮动可控双向电流传感器（N 1）由耦合到浮动可控双向电流传感器（N 1）的控制端（G）的电流管理块（3）和到用于控制第一连接（10）和第二连接（20）之间的等效电压的第一和第二连接（10,20），用于提供与正电流（pos）成比例的第一电流（Ipos）并且用于提供与负电流（neg）成比例的第二电流（Ineg）。

6. 发明申请

US20060164867A1 Dead time control in a switching circuit 有权
标题翻译：开关电路中的死区时间控制
公开(公告)号：US20060164867A1
公开(公告)日：2006-07-27
申请号：US10561735
申请日：2005-06-10
申请人： Jan Dikken , Philip Rutter , Kuldeep Kanwar
发明人： Jan Dikken , Philip Rutter , Kuldeep Kanwar
IPC分类号： H02M7/00
CPC分类号： H02M1/38 , H02M3/1588 , H03F3/217 , H03K17/0822 , Y02B70/1466
摘要： A dc-to-dc converter has two field effect transistors (35, 36) connected in series between an input terminal (37) and a ground terminal (38). Adjustment of the dead time when both transistors (35, 36) are off is carried out by providing Kelvin feedback connections (71, 72, 67, 68) directly across the drain (39, 44) and source (43, 40) of one or both of the transistors (35, 36), so bypassing signal line resistance and inductances.
摘要翻译： DC-DC转换器具有串联连接在输入端子（37）和接地端子（38）之间的两个场效应晶体管（35,36）。两个晶体管（35,36）关闭时的死区时间的调整是通过直接跨越漏极（39,44）和源极（43,40）之间提供开尔文反馈连接（71,72,67,68）来实现的或两个晶体管（35,36），因此绕过信号线电阻和电感。

7. 发明申请

US20080278975A1 Switched Mode Power Converter and Method of Operation Thereof 有权
标题翻译：开关电源转换器及其操作方法
公开(公告)号：US20080278975A1
公开(公告)日：2008-11-13
申请号：US11908670
申请日：2006-03-09
申请人： Peter Degen , Humphrey De Groot , Jan Dikken
发明人： Peter Degen , Humphrey De Groot , Jan Dikken
IPC分类号： H02M3/335
CPC分类号： H02M3/33523
摘要： The invention relates to a switched mode power converter and a method of operating such a converter A switched mode power converter according to the invention includes a transformer (2) having a primary winding (2a) and at least one secondary winding (2b) and a secondary side rectifier circuit including an output filter (6, 10) coupled to the at least one secondary winding (2b), and a secondary side active switch device (S3) coupled between the at least one secondary winding and the output filter. The converter further includes primary side and secondary side control means (12, 16, 18) for regulating the switching of the primary side and secondary side switches, respectively, and configured so as to reduce the duty cycle of the primary side switch device (S1) during a lower power mode of operation of the converter, the reduction of the duty cycle of the primary side switch being determined with reference to the duty cycle of the secondary side switch (S3). This leads to a substantial increase in the efficiency of operation in the low power mode.
摘要翻译：本发明涉及开关式功率转换器和操作这种转换器的方法。根据本发明的开关式功率转换器包括具有初级绕组（2a）和至少一个次级绕组（2b）的变压器（2）以及次级侧整流器电路，包括耦合到所述至少一个次级绕组（b）的输出滤波器（6,10）和耦合在所述至少一个次级绕组和所述输出端之间的次级侧有源开关装置（S 3）过滤。转换器还包括用于分别调节初级侧和次级侧开关的开关的初级侧和次级侧控制装置（12,16,18），并被构造成减小初级侧开关装置的占空比（S 1）在转换器的较低功率工作模式下，参考次级侧开关的占空比确定初级侧开关的占空比的减小（S 3）。这导致在低功率模式下的操作效率的显着提高。

8. 发明申请

US20060043499A1 Bi-directional double nmos switch 有权
标题翻译：双向双nmos开关
公开(公告)号：US20060043499A1
公开(公告)日：2006-03-02
申请号：US10532922
申请日：2003-09-22
申请人： Guillaume De Cremoux , Insun Van Loo , Jan Dikken , Ferry Nieuwhoff , Yovgos Christoforou , Aykut Kenc , Wilhelmusn Johannes Willemsen
发明人： Guillaume De Cremoux , Insun Van Loo , Jan Dikken , Ferry Nieuwhoff , Yovgos Christoforou , Aykut Kenc , Wilhelmusn Johannes Willemsen
IPC分类号： H01L29/76
CPC分类号： H03K17/6874 , H03K17/063
摘要： A semiconductor switch comprises two NMOS transistors coupled in an anti-series arrangement, and a gate control circuit coupled to both gates of the NMOS transistors. Both drains of the NMOS transistors are interconnected, and the gate control circuit is coupled to the drains interconnection. The required chip area is halved compared to prior art switches. Pumping the gates to higher voltages may cause a further reduction of the sizes of the NMOS transistors. In addition advantageously a large range of input and output voltages can be allowed between the sources of the NMOS transistors, whereby the sources act as input and output respectively of the switch, thus allowing application of the switch in a broad technical field.
摘要翻译：半导体开关包括以反串联方式耦合的两个NMOS晶体管，以及耦合到NMOS晶体管的两个栅极的栅极控制电路。 NMOS晶体管的两个漏极互连，并且栅极控制电路耦合到漏极互连。与现有技术的开关相比，所需的芯片面积减半。将栅极泵入较高电压可能会导致NMOS晶体管的尺寸进一步减小。另外有利的是，可以在NMOS晶体管的源极之间允许大范围的输入和输出电压，由此源分别用作开关的输入和输出，从而允许开关在广泛的技术领域中应用。

9. 发明授权

US4967103A Integrated logic circuit with protector transistor 失效
标题翻译：集成逻辑电路与保护晶体管
公开(公告)号：US4967103A
公开(公告)日：1990-10-30
申请号：US295714
申请日：1989-01-10
申请人： Jan Dikken , Roelof H. W. Salters
发明人： Jan Dikken , Roelof H. W. Salters
IPC分类号： H03K19/0185 , H03K17/16 , H03K17/687 , H03K19/003 , H03K19/0175 , H03K19/0944 , H03K19/0948
CPC分类号： H03K19/00315
摘要： The invention relates to an additional transistor which is connected in cascode with a sub-circuit of a logic circuit in order to protect further transistors of the sub-circuit against hot carrier stress and hot carrier degradation. In a logic circuit having transistors of a first conductivity type, an additional transistor of the second conductivity type is arranged in cascode. This additional transistor is connected as a diode or as a current source in dependence on an output voltage of the circuit. Further aspects of the invention concern the switching means for switching the additional transistor and the location where the additional transistor is to be inserted.

10. 发明授权

US07906953B2 Boosting technique for a bi-directional switch in a power converter 有权
标题翻译：电力转换器双向开关升压技术
公开(公告)号：US07906953B2
公开(公告)日：2011-03-15
申请号：US11995599
申请日：2006-07-19
申请人： Jan Dikken , Peter T. J. Degen
发明人： Jan Dikken , Peter T. J. Degen
IPC分类号： G05F1/00 , H02M7/217 , H02M3/335
CPC分类号： H02M3/33584
摘要： A bi-directional switch for a power converter comprises first and second transistors (SW1, SW2) and a floating supply capacitor (C2) associated with the second transistor (SW2). The drive circuit and/or gate of the first transistor (SW1) is charged by the floating supply capacitor (C2) of the second transistor (SW2). The charging takes place at a predetermined moment in the switching cycle, and in particular at a moment in the switching cycle when the voltage across the bi-directional switch is substantially a minimum.
摘要翻译：用于功率转换器的双向开关包括与第二晶体管（SW2）相关联的第一和第二晶体管（SW1，SW2）和浮置电源电容器（C2）。第一晶体管（SW1）的驱动电路和/或栅极由第二晶体管（SW2）的浮置电源电容器（C2）充电。充电在开关周期中的预定时刻进行，特别是当双向开关上的电压基本上是最小时，在开关周期中的时刻。

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