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1. 发明授权

US09626981B2 Systems and methods for compressing a digital signal 有权
公开(公告)号：US09626981B2
公开(公告)日：2017-04-18
申请号：US14745795
申请日：2015-06-22
申请人： Cirrus Logic, Inc.
发明人： Brian Parker Chesney
IPC分类号： H04N1/405 , H04N1/407 , H04N1/00 , G10L19/04 , H03M3/00
CPC分类号： G10L19/032 , G10L19/005 , G10L19/04 , G10L25/78 , H03M3/424 , H03M3/428 , H03M3/458 , H03M3/466 , H03M3/468 , H03M5/04
摘要： A system may include a delta-sigma analog-to-digital converter and a digital compression circuit. The delta-sigma analog-to-digital converter may include a loop filter having a loop filter input configured to receive an input signal and generate an intermediate signal responsive to the input signal, a multi-bit quantizer configured to quantize the intermediate signal into an uncompressed digital output signal, and a feedback digital-to-analog converter having a feedback output configured to generate a feedback output signal responsive to the uncompressed digital output signal in order to combine the input signal and the feedback output signal at the loop filter input. The digital compression circuit may be configured to receive the uncompressed digital output signal and compress the uncompressed digital output signal into a compressed digital output signal having fewer quantization levels than that of the uncompressed digital output signal.

2. 发明授权

US10453465B2 Systems and methods for compressing a digital signal 有权
公开(公告)号：US10453465B2
公开(公告)日：2019-10-22
申请号：US15466624
申请日：2017-03-22
申请人： Cirrus Logic, Inc.
发明人： Brian Parker Chesney
IPC分类号： G10L19/032 , H03M5/04 , G10L19/005 , G10L19/04 , H03M3/00 , G10L25/78
摘要： A system may include a delta-sigma analog-to-digital converter and a digital compression circuit. The delta-sigma analog-to-digital converter may include a loop filter having a loop filter input configured to receive an input signal and generate an intermediate signal responsive to the input signal, a multi-bit quantizer configured to quantize the intermediate signal into an uncompressed digital output signal, and a feedback digital-to-analog converter having a feedback output configured to generate a feedback output signal responsive to the uncompressed digital output signal in order to combine the input signal and the feedback output signal at the loop filter input. The digital compression circuit may be configured to receive the uncompressed digital output signal and compress the uncompressed digital output signal into a compressed digital output signal having fewer quantization levels than that of the uncompressed digital output signal.

3. 发明申请

US20150380005A1 SYSTEMS AND METHODS FOR COMPRESSING A DIGITAL SIGNAL 有权
标题翻译：用于压缩数字信号的系统和方法
公开(公告)号：US20150380005A1
公开(公告)日：2015-12-31
申请号：US14745795
申请日：2015-06-22
申请人： Cirrus Logic, Inc.
发明人： Brian Parker Chesney
IPC分类号： G10L19/04 , H03M3/00
CPC分类号： G10L19/032 , G10L19/005 , G10L19/04 , G10L25/78 , H03M3/424 , H03M3/428 , H03M3/458 , H03M3/466 , H03M3/468 , H03M5/04
摘要： A system may include a delta-sigma analog-to-digital converter and a digital compression circuit. The delta-sigma analog-to-digital converter may include a loop filter having a loop filter input configured to receive an input signal and generate an intermediate signal responsive to the input signal, a multi-bit quantizer configured to quantize the intermediate signal into an uncompressed digital output signal, and a feedback digital-to-analog converter having a feedback output configured to generate a feedback output signal responsive to the uncompressed digital output signal in order to combine the input signal and the feedback output signal at the loop filter input. The digital compression circuit may be configured to receive the uncompressed digital output signal and compress the uncompressed digital output signal into a compressed digital output signal having fewer quantization levels than that of the uncompressed digital output signal.
摘要翻译：系统可以包括delta-sigma模数转换器和数字压缩电路。 Δ-Σ模数转换器可以包括具有环路滤波器输入的环路滤波器，该环路滤波器输入被配置为接收输入信号并响应于输入信号产生中间信号;多位量化器，被配置为将中间信号量化为未压缩的数字输出信号以及具有反馈输出的反馈数模转换器，所述反馈输出被配置为响应于未压缩的数字输出信号产生反馈输出信号，以便在环路滤波器输入处组合输入信号和反馈输出信号。数字压缩电路可以被配置为接收未压缩的数字输出信号并将未压缩的数字输出信号压缩成具有比未压缩的数字输出信号的量化级的量化级的压缩数字输出信号。

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