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    • 1. 发明申请
    • TRIPLE POLY-SI REPLACEMENT SCHEME FOR MEMORY DEVICES
    • 用于存储器件的三重多重替换方案
    • US20080268650A1
    • 2008-10-30
    • US11742003
    • 2007-04-30
    • Chungho LeeHuaqiang WuWai LoHiroyuki Kinoshita
    • Chungho LeeHuaqiang WuWai LoHiroyuki Kinoshita
    • H01L21/302
    • H01L27/11573H01L21/28282
    • A method of replacing a top oxide around a storage element of a memory device is provided. The method can involve removing a core first poly and core first top oxide in a core region while not removing a periphery first poly in a periphery region on a semiconductor substrate; forming a second top oxide around a storage element in the core region and on the periphery first poly in the periphery region; forming a second poly over the semiconductor substrate in both the core and periphery regions; removing the second poly and second top oxide in the periphery region; and forming a third poly on the semiconductor substrate in both the core and periphery regions.
    • 提供了替换存储器件的存储元件周围的顶部氧化物的方法。 该方法可以包括在核心区域中去除核心的第一多核和第一顶部氧化物,而不去除半导体衬底上的外围区域中的周边第一多晶硅; 在所述芯区域中的存储元件周围和所述周边区域的所述外围第一聚四氟乙烯上形成第二顶部氧化物; 在所述芯和外围区域中在所述半导体衬底上形成第二聚合物; 去除所述周边区域中的所述第二聚合物和第二顶部氧化物; 以及在所述芯和外围区域中在所述半导体衬底上形成第三聚合物。
    • 2. 发明授权
    • Triple poly-si replacement scheme for memory devices
    • 存储器件的三重多晶硅替代方案
    • US07807580B2
    • 2010-10-05
    • US11742003
    • 2007-04-30
    • Chungho LeeHuaqiang WuWai LoHiroyuki Kinoshita
    • Chungho LeeHuaqiang WuWai LoHiroyuki Kinoshita
    • H01L21/302
    • H01L27/11573H01L21/28282
    • A method of replacing a top oxide around a storage element of a memory device is provided. The method can involve removing a core first poly and core first top oxide in a core region while not removing a periphery first poly in a periphery region on a semiconductor substrate; forming a second top oxide around a storage element in the core region and on the periphery first poly in the periphery region; forming a second poly over the semiconductor substrate in both the core and periphery regions; removing the second poly and second top oxide in the periphery region; and forming a third poly on the semiconductor substrate in both the core and periphery regions.
    • 提供了替换存储器件的存储元件周围的顶部氧化物的方法。 该方法可以包括在核心区域中去除核心的第一多核和第一顶部氧化物,而不去除半导体衬底上的外围区域中的周边第一多晶硅; 在所述芯区域中的存储元件周围和所述周边区域的所述外围第一聚四氟乙烯上形成第二顶部氧化物; 在所述芯和外围区域中在所述半导体衬底上形成第二聚合物; 去除所述周边区域中的所述第二聚合物和第二顶部氧化物; 以及在所述芯和外围区域中在所述半导体衬底上形成第三聚合物。
    • 7. 发明申请
    • SPLIT CHARGE STORAGE NODE OUTER SPACER PROCESS
    • 分离式充电储存节点外部间隔过程
    • US20090108330A1
    • 2009-04-30
    • US11924169
    • 2007-10-25
    • Minghao ShenChungho LeeHiroyuki KinoshitaHuaqiang Wu
    • Minghao ShenChungho LeeHiroyuki KinoshitaHuaqiang Wu
    • H01L29/792H01L21/3205
    • H01L29/7923H01L21/0337H01L21/0338H01L21/32139H01L27/115H01L27/11568
    • Memory cells containing two split sub-lithographic charge storage nodes on a semiconductor substrate and methods for making the memory cells are provided. The methods can involve forming two split sub-lithographic charge storage nodes by using spacer formation techniques. By removing an exposed portion of a fist poly layer between sloping side surfaces or outer surfaces of spacers while leaving portions of the first poly layer protected by the spacers, the method can provide two split sub-lithographic first poly gates. Further, by removing an exposed portion of a charge storage layer between sloping side surfaces or outer surfaces of spacers, the method can provide two split, narrow portions of the charge storage layer, which subsequently form two split sub-lithographic charge storage nodes.
    • 提供了包含半导体衬底上的两个分裂子光刻电荷存储节点的存储单元以及用于制造存储单元的方法。 这些方法可以包括通过使用间隔物形成技术形成两个分裂的亚光刻电荷存储节点。 通过在间隔物的倾斜侧表面或外表面之间除去第一多晶硅层的暴露部分,同时留下被间隔物保护的第一多晶硅层的部分,该方法可以提供两个分裂的次光刻的第一多晶硅栅极。 此外,通过去除间隔物的倾斜侧表面或外表面之间的电荷存储层的暴露部分,该方法可以提供电荷存储层的两个分开的窄部分,其随后形成两个分裂的亚光刻电荷存储节点。