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1. 发明授权

US09022392B2 Chuck and semiconductor process using the same 有权
标题翻译：夹头和半导体工艺使用相同
公开(公告)号：US09022392B2
公开(公告)日：2015-05-05
申请号：US13600231
申请日：2012-08-31
申请人： Chung-Sung Jang , Ming-Tse Lin , Yung-Chang Lin
发明人： Chung-Sung Jang , Ming-Tse Lin , Yung-Chang Lin
IPC分类号： H01L21/683
CPC分类号： H01L22/20 , G03F7/20 , G03F7/707 , G03F7/70783 , H01L21/6836 , H01L21/6838 , H01L22/12 , Y10T29/49764 , Y10T279/11
摘要： An apparatus of semiconductor process including a chuck and a vacuum source is provided. The chuck has a plurality of holes for holding a semiconductor substrate, and the vacuum source is used for providing vacuum suction through the holes to make the semiconductor substrate be subjected to varied suction intensities according to a warpage level thereof.
摘要翻译：提供一种包括卡盘和真空源的半导体工艺装置。卡盘具有用于保持半导体衬底的多个孔，并且真空源用于通过孔提供真空吸力，以使半导体衬底根据其翘曲程度受到各种抽吸强度。

2. 发明申请

US20130140688A1 Through Silicon Via and Method of Manufacturing the Same 审中-公开
标题翻译：通过硅胶及其制造方法
公开(公告)号：US20130140688A1
公开(公告)日：2013-06-06
申请号：US13309566
申请日：2011-12-02
申请人： Chun-Hung Chen , Ming-Tse Lin , Yung-Chang Lin
发明人： Chun-Hung Chen , Ming-Tse Lin , Yung-Chang Lin
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76898 , H01L24/11 , H01L24/13 , H01L2224/11011 , H01L2224/11462 , H01L2224/13009 , H01L2224/13147 , H01L2224/13184 , H01L2224/14131 , H01L2924/12042 , H01L2924/13091 , H01L2924/1461 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： The present invention discloses a through silicon via and method of manufacturing the same comprising the steps of providing a substrate, forming a plurality of through silicon via (TSV) holes in said substrate, forming a seed layer on the surface of said substrate and said a plurality of TSV holes, forming a patterned mask on said substrate, wherein said patterned mask comprises a plurality of first openings corresponding to said TSV holes and a plurality of second openings adjacent to or surrounding said a plurality of first openings, forming a material layer on said substrate, wherein said material layer is filled into said TSV holes and said first openings to form a plurality of through silicon vias, and said material layer is filled into said second openings to form a plurality of dummy bumps.
摘要翻译：本发明公开了一种硅通孔及其制造方法，包括以下步骤：提供衬底，在所述衬底中形成多个通孔（TSV）孔，在所述衬底的表面上形成种子层，多个TSV孔，在所述衬底上形成图案化掩模，其中所述图案化掩模包括对应于所述TSV孔的多个第一开口和邻近或围绕所述多个第一开口的多个第二开口，形成材料层所述衬底，其中所述材料层被填充到所述TSV孔和所述第一开口中以形成多个通孔硅通孔，并且所述材料层被填充到所述第二开口中以形成多个虚拟凸块。

3. 发明授权

US08692359B2 Through silicon via structure having protection ring 有权
标题翻译：通过具有保护环的硅通孔结构
公开(公告)号：US08692359B2
公开(公告)日：2014-04-08
申请号：US13309559
申请日：2011-12-02
申请人： Yung-Chang Lin , Chien-Li Kuo , Ming-Tse Lin , Sun-Chieh Chien
发明人： Yung-Chang Lin , Chien-Li Kuo , Ming-Tse Lin , Sun-Chieh Chien
IPC分类号： H01L29/40
CPC分类号： H01L21/76898 , H01L21/76232 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device includes the following steps. A semiconductor substrate having a first side and a second side facing to the first side is provided. At least an opening is disposed in the semiconductor substrate of a protection region defined in the first side. A first material layer is formed on the first side and the second side, and the first material layer partially fills the opening. Subsequently, a part of the first material layer on the first side and outside the protection region is removed. A second material layer is formed on the first side and the second side, and the second material layer fills the opening. Then, a part of the second material layer on the first side and outside the protection region is removed. Finally, the remaining first material layer and the remaining second material layer on the first side are planarized.
摘要翻译：制造半导体器件的方法包括以下步骤。提供了具有面向第一面的第一面和第二面的半导体衬底。至少一个开口设置在第一侧限定的保护区域的半导体衬底中。在第一侧和第二侧上形成第一材料层，第一材料层部分地填充开口。随后，去除第一侧的第一材料层和保护区域外部的一部分。在第一侧和第二侧上形成第二材料层，并且第二材料层填充开口。然后，去除保护区域的第一侧和外侧的第二材料层的一部分。最后，剩余的第一材料层和第一侧的剩余的第二材料层被平坦化。

4. 发明申请

US20130140708A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130140708A1
公开(公告)日：2013-06-06
申请号：US13309559
申请日：2011-12-02
申请人： Yung-Chang Lin , Chien-Li Kuo , Ming-Tse Lin , Sun-Chieh Chien
发明人： Yung-Chang Lin , Chien-Li Kuo , Ming-Tse Lin , Sun-Chieh Chien
IPC分类号： H01L23/498 , H01L21/76
CPC分类号： H01L21/76898 , H01L21/76232 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device includes the following steps. A semiconductor substrate having a first side and a second side facing to the first side is provided. At least an opening is disposed in the semiconductor substrate of a protection region defined in the first side. A first material layer is formed on the first side and the second side, and the first material layer partially fills the opening. Subsequently, a part of the first material layer on the first side and outside the protection region is removed. A second material layer is formed on the first side and the second side, and the second material layer fills the opening. Then, a part of the second material layer on the first side and outside the protection region is removed. Finally, the remaining first material layer and the remaining second material layer on the first side are planarized.
摘要翻译：制造半导体器件的方法包括以下步骤。提供了具有面向第一面的第一面和第二面的半导体衬底。至少一个开口设置在第一侧限定的保护区域的半导体衬底中。在第一侧和第二侧上形成第一材料层，第一材料层部分地填充开口。随后，去除第一侧的第一材料层和保护区域外部的一部分。在第一侧和第二侧上形成第二材料层，并且第二材料层填充开口。然后，去除保护区域的第一侧和外侧的第二材料层的一部分。最后，剩余的第一材料层和第一侧的剩余的第二材料层被平坦化。

5. 发明授权

US08441134B2 Chip stacking structure 有权
标题翻译：芯片堆叠结构
公开(公告)号：US08441134B2
公开(公告)日：2013-05-14
申请号：US13228549
申请日：2011-09-09
申请人： Chien-Li Kuo , Yung-Chang Lin , Ming-Tse Lin
发明人： Chien-Li Kuo , Yung-Chang Lin , Ming-Tse Lin
IPC分类号： H01L23/52 , H01L23/48 , H01L27/146 , H01L27/148
CPC分类号： H01L23/12 , H01L21/563 , H01L25/0657 , H01L2225/06513 , H01L2225/06565 , H01L2924/0002 , H01L2924/00
摘要： A chip stacking structure includes a first chip and a second chip. The first chip includes a surface having a first group of pads formed thereon, and the second chip includes a surface having a second group of pads formed thereon. The second group of pads is bonded onto the first group of pads to define a plurality of capillary passages extending in a same direction. The chip stacking structure further includes an underfill filling up interspaces between the first chip and the second chip. The chip stacking structure is capable of avoiding chip deformation and cracking during a bonding process.
摘要翻译：芯片堆叠结构包括第一芯片和第二芯片。第一芯片包括具有形成在其上的第一组焊盘的表面，并且第二芯片包括具有形成在其上的第二组焊盘的表面。第二组垫被粘合到第一组垫上以限定沿相同方向延伸的多个毛细通道。芯片堆叠结构还包括在第一芯片和第二芯片之间的底部填充填充间隙。芯片堆叠结构能够在焊接过程中避免芯片变形和开裂。

6. 发明申请

US20130062780A1 CHIP STACKING STRUCTURE 有权
标题翻译：芯片堆叠结构
公开(公告)号：US20130062780A1
公开(公告)日：2013-03-14
申请号：US13228549
申请日：2011-09-09
申请人： Chien-Li KUO , Yung-Chang Lin , Ming-Tse Lin
发明人： Chien-Li KUO , Yung-Chang Lin , Ming-Tse Lin
IPC分类号： H01L23/12
CPC分类号： H01L23/12 , H01L21/563 , H01L25/0657 , H01L2225/06513 , H01L2225/06565 , H01L2924/0002 , H01L2924/00
摘要： A chip stacking structure includes a first chip and a second chip. The first chip includes a surface having a first group of pads formed thereon, and the second chip includes a surface having a second group of pads formed thereon. The second group of pads is bonded onto the first group of pads to define a plurality of capillary passages extending in a same direction. The chip stacking structure further includes an underfill filling up interspaces between the first chip and the second chip. The chip stacking structure is capable of avoiding chip deformation and cracking during a bonding process.
摘要翻译：芯片堆叠结构包括第一芯片和第二芯片。第一芯片包括具有形成在其上的第一组焊盘的表面，并且第二芯片包括具有形成在其上的第二组焊盘的表面。第二组垫被粘合到第一组垫上以限定沿相同方向延伸的多个毛细通道。芯片堆叠结构还包括在第一芯片和第二芯片之间的底部填充填充间隙。芯片堆叠结构能够在焊接过程中避免芯片变形和开裂。

7. 发明授权

US08377829B2 Method of manufacturing a capacitor deep trench and of etching a deep trench opening 有权
标题翻译：制造电容器深沟槽并蚀刻深沟槽开口的方法
公开(公告)号：US08377829B2
公开(公告)日：2013-02-19
申请号：US11871166
申请日：2007-10-12
申请人： Ta-Chuan Yeh , Ni-Min Chung , Kao-Su Huang , Yung-Chang Lin , Ruey-Chyr Lee , Chien-Kuo Wang
发明人： Ta-Chuan Yeh , Ni-Min Chung , Kao-Su Huang , Yung-Chang Lin , Ruey-Chyr Lee , Chien-Kuo Wang
IPC分类号： H01L21/302 , H01L21/461 , B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00
CPC分类号： H01L27/1087 , H01L21/76205
摘要： A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.
摘要翻译：提供了具有氧化物层，第一氮化硅 - 硅，STI和第二氮化硅 - 硅的衬底。蚀刻第二氮化硅 - 硅层上的图案多晶硅层以形成深沟槽开口。蚀刻图案多晶硅层也加深了深沟槽开口。然后，在深沟槽开口中填充导电层。

8. 发明授权

US08227890B2 Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse 有权
标题翻译：形成电熔丝和金属栅晶体管及相关电熔丝的方法
公开(公告)号：US08227890B2
公开(公告)日：2012-07-24
申请号：US12641322
申请日：2009-12-18
申请人： Yung-Chang Lin , Kuei-Sheng Wu , Chang-Chien Wong
发明人： Yung-Chang Lin , Kuei-Sheng Wu , Chang-Chien Wong
IPC分类号： H01L29/00
CPC分类号： H01L23/5256 , H01L21/823807 , H01L21/823814 , H01L27/0629 , H01L27/112 , H01L27/11206 , H01L29/7843 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of integrating an electrical fuse process into a high-k/metal gate process. The method simultaneously forms a dummy gate stack of a transistor and a dummy gate stack of an e-fuse; and simultaneously removes the polysilicon of the dummy gate stack in the transistor region and the polysilicon of the dummy gate stack in the e-fuse region. Thereafter, the work function metal layer disposed in the opening of the e-fuse region is removed; and the opening in the transistor region and the opening in the e-fuse region with metal conductive structures are filled to form an e-fuse and a metal gate of a transistor.
摘要翻译：本发明提供了一种将电熔丝工艺集成到高k /金属栅极工艺中的方法。该方法同时形成晶体管的虚拟栅极堆叠和电子熔丝的虚拟栅极堆叠; 并且同时去除晶体管区域中的虚拟栅极堆叠的多晶硅和电子熔丝区域中的伪栅极堆叠的多晶硅。此后，去除设置在电熔丝区域的开口中的功函数金属层; 并且晶体管区域中的开口和具有金属导电结构的e熔丝区域中的开口被填充以形成晶体管的电熔丝和金属栅极。

9. 发明申请

US20120075218A1 TOUCH PANEL AND TOUCH DISPLAY DEVICE USING THE SAME 审中-公开
标题翻译：触摸面板和触摸显示设备使用它
公开(公告)号：US20120075218A1
公开(公告)日：2012-03-29
申请号：US13238255
申请日：2011-09-21
申请人： MING-CHUAN LIN , Tien-Nan Wang , Ying-Chi Wang , Yung-Chang Lin , Lin Lin , Wen-Hung Wang , Pei-Fang Tsai , Shyh-Jeng Chen
发明人： MING-CHUAN LIN , Tien-Nan Wang , Ying-Chi Wang , Yung-Chang Lin , Lin Lin , Wen-Hung Wang , Pei-Fang Tsai , Shyh-Jeng Chen
IPC分类号： G06F3/041
CPC分类号： G06F3/044 , G06F3/0418 , G06F2203/04107
摘要： A touch panel comprising a substrate, a touch element, a first grounding electrode, an insulation layer and a second grounding electrode is disclosed. The touch element is disposed on a first surface of the substrate. The first grounding electrode is disposed on the first surface to surround the touch element. The insulation layer is disposed on the first surface to cover the touch element and the first grounding electrode. The second grounding electrode is disposed on the first insulation layer or on a second surface of the substrate opposite to the first surface. Therefore, the ESD can be conducted to the grounding end G of the circuit component through the enclosed first grounding electrode, and the signal interference between the touch panel and display can be shielded by the second grounding electrode to enhance anti-ESD and anti-noise abilities of the touch panel.
摘要翻译：公开了一种包括基板，触摸元件，第一接地电极，绝缘层和第二接地电极的触摸面板。触摸元件设置在基板的第一表面上。第一接地电极设置在第一表面上以围绕触摸元件。绝缘层设置在第一表面上以覆盖触摸元件和第一接地电极。第二接地电极设置在与第一表面相对的第一绝缘层或第二表面上。因此，ESD可以通过封闭的第一接地电极传导到电路部件的接地端G，并且可以通过第二接地电极屏蔽触摸面板和显示器之间的信号干扰，以增强抗ESD和抗噪声触摸屏的能力。

10. 发明申请

US20120001813A1 USB Antenna with a Bottle Opener 审中-公开
标题翻译： USB天线与开瓶器
公开(公告)号：US20120001813A1
公开(公告)日：2012-01-05
申请号：US12883403
申请日：2010-09-16
申请人： Yung-Chang Lin
发明人： Yung-Chang Lin
IPC分类号： H01Q1/00 , B67B7/44
CPC分类号： B67B7/16 , H01Q1/2275 , H01Q1/44
摘要： The present invention discloses an USB antenna device with a bottle opener, which comprises a main body being a casing; a connector being mounted on an end of the main body; a bottle opener being concavely disposed on a side of the main body; and a wireless antenna for transmitting and receiving wireless signals or microwaves. In the present invention, the available limited space in the USB antenna device can be used efficiently because the wireless antenna occupying a certain area in the traditional USB antenna device is disposed corresponding to a bottle opener structure. That is, the USB antenna device of the present invention not only is easy to carry, but can also provide a function of opening the bottle.
摘要翻译：本发明公开了一种具有开瓶器的USB天线装置，其包括：主体，其为壳体; 连接器，其安装在所述主体的端部上; 开瓶器凹入地设置在主体的一侧; 以及用于发送和接收无线信号或微波的无线天线。在本发明中，由于在传统的USB天线装置中占据一定区域的无线天线对应于开瓶器结构而设置在USB天线装置中的有限空间可以有效地使用。也就是说，本发明的USB天线装置不仅容易携带，而且还可以提供打开瓶子的功能。

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