专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07218176B2 Digital phase-locked loop circuit 有权
标题翻译：数字锁相环电路
公开(公告)号：US07218176B2
公开(公告)日：2007-05-15
申请号：US10935863
申请日：2004-09-08
申请人： Chun-Wei Lin , Hsueh-Kun Liao , Chih-Ching Chen
发明人： Chun-Wei Lin , Hsueh-Kun Liao , Chih-Ching Chen
IPC分类号： H03L7/00
CPC分类号： H03L7/181 , H03L7/0805 , H03L7/107 , H03L7/1075
摘要： A digital phase-locked loop circuit includes a counter for outputting a count value corresponding to an output frequency outputted by a voltage controlled oscillator in response to a control voltage signal, a comparator for comparing the count value from the counter with a target value associated with a target frequency output and for outputting a comparison signal according to a comparison result therebetween, a digital reference value generator for outputting a digital reference value according to the comparison signal from the comparator and including a register for storing the digital reference value therein, and a digital-to-analog converter for generating the control voltage signal based on the digital reference value received from the digital reference value generator.
摘要翻译：数字锁相环电路包括：计数器，用于响应于控制电压信号输出与压控振荡器输出的输出频率对应的计数值;比较器，用于将来自计数器的计数值与与目标频率输出，并根据比较结果输出比较信号;数字参考值发生器，用于根据来自比较器的比较信号输出数字参考值，并包括用于存储数字参考值的寄存器，以及数模转换器，用于基于从数字参考值发生器接收的数字参考值产生控制电压信号。

2. 发明申请

US20050062549A1 Digital phase-locked loop circuit 有权
标题翻译：数字锁相环电路
公开(公告)号：US20050062549A1
公开(公告)日：2005-03-24
申请号：US10935863
申请日：2004-09-08
申请人： Chun-Wei Lin , Hsueh-Kun Liao , Chih-Ching Chen
发明人： Chun-Wei Lin , Hsueh-Kun Liao , Chih-Ching Chen
IPC分类号： H03L7/00 , H03L7/06 , H03L7/107 , H03L7/181
CPC分类号： H03L7/181 , H03L7/0805 , H03L7/107 , H03L7/1075
摘要： A digital phase-locked loop circuit includes a counter for outputting a count value corresponding to an output frequency outputted by a voltage controlled oscillator in response to a control voltage signal, a comparator for comparing the count value from the counter with a target value associated with a target frequency output and for outputting a comparison signal according to a comparison result therebetween, a digital reference value generator for outputting a digital reference value according to the comparison signal from the comparator and including a register for storing the digital reference value therein, and a digital-to-analog converter for generating the control voltage signal based on the digital reference value received from the digital reference value generator.
摘要翻译：数字锁相环电路包括：计数器，用于响应于控制电压信号输出与压控振荡器输出的输出频率对应的计数值;比较器，用于将来自计数器的计数值与与目标频率输出，并根据比较结果输出比较信号;数字参考值发生器，用于根据来自比较器的比较信号输出数字参考值，并包括用于存储数字参考值的寄存器，以及数模转换器，用于基于从数字参考值发生器接收的数字参考值产生控制电压信号。

3. 发明授权

US07715303B2 Recording apparatus for optical data 有权
标题翻译：光学数据记录装置
公开(公告)号：US07715303B2
公开(公告)日：2010-05-11
申请号：US11235369
申请日：2005-09-27
申请人： Hsiang-Ji Hsieh , Hsueh-Kun Liao , Yu-Kai Chou , Yu-Hsin Lin
发明人： Hsiang-Ji Hsieh , Hsueh-Kun Liao , Yu-Kai Chou , Yu-Hsin Lin
IPC分类号： G11B7/00
CPC分类号： G11B7/13
摘要： A recording apparatus for optical data includes a photo detection IC for producing a plurality of phase signals; a plurality of sample/hold (S/H) circuits electrically connected to the photo detection IC; a plurality of limiter circuits electrically connected to the photo detection IC; a channel signal generator connected to the S/H circuits; and a level shift circuit connected to an output of the channel signal generator. The recording apparatus for optical data prevents the interference of servo signal during high speed operation and ensures normal operation of S/H circuits thereof.
摘要翻译：用于光学数据的记录装置包括用于产生多个相位信号的光检测IC; 电连接到光检测IC的多个采样/保持（S / H）电路; 电连接到光检测IC的多个限幅器电路; 连接到S / H电路的信道信号发生器; 以及连接到信道信号发生器的输出的电平移位电路。用于光学数据的记录装置防止伺服信号在高速操作期间的干扰，并确保其S / H电路的正常工作。

4. 发明申请

US20060188268A1 OPTICAL DRIVE FOR CONTROLLING OUTPUT POWER OF A PICK-UP HEAD USING APC LOOP 审中-公开
标题翻译：用于控制使用APC环路的拾取头的输出功率的光学驱动
公开(公告)号：US20060188268A1
公开(公告)日：2006-08-24
申请号：US11381539
申请日：2006-05-04
申请人： Hsueh-Kun Liao , Hseang-Ji Hsieh
发明人： Hsueh-Kun Liao , Hseang-Ji Hsieh
IPC分类号： H04B10/04
CPC分类号： G11B7/1263
摘要： An optical drive includes a comparator for comparing a first input signal with a second input signal to generate a first output signal at a first node; a signal source coupled to a second node, the signal source outputting a second output signal; and a switch for outputting a third output signal at a third node, the third output signal controlling a laser power of the optical drive, wherein when the switch is switched to the first node, the first output signal is transmitted to the third node and serves as the third output signal, and when the switch is switched to the second node, the second output signal is transmitted to the third node and serves as the third output signal.
摘要翻译：光驱包括比较器，用于比较第一输入信号和第二输入信号，以在第一节点产生第一输出信号; 耦合到第二节点的信号源，所述信号源输出第二输出信号; 以及用于在第三节点输出第三输出信号的开关，所述第三输出信号控制所述光驱动器的激光功率，其中当所述开关切换到所述第一节点时，所述第一输出信号被发送到所述第三节点作为第三输出信号，并且当开关切换到第二节点时，第二输出信号被发送到第三节点并用作第三输出信号。

5. 发明授权

US07795975B2 Class AB amplifier 有权
标题翻译： AB类放大器
公开(公告)号：US07795975B2
公开(公告)日：2010-09-14
申请号：US12038122
申请日：2008-02-27
申请人： Yu-Hsin Lin , Hsueh-Kun Liao
发明人： Yu-Hsin Lin , Hsueh-Kun Liao
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/3022 , H03F2203/30084 , H03F2203/30117 , H03F2203/45668
摘要： An amplifier is disclosed. An input transistor receives an input voltage. An impedance unit is coupled to a first electrode of the input transistor. A current source is coupled to a second electrode of the input transistor. A push-pull output circuit comprises a PMOS transistor and a NMOS transistor electrically connected in series to output an output voltage. The first electrode of the input transistor is coupled to a control terminal of the NMOS transistor. A level shifting unit is coupled between the first electrode of the input transistor and the push-pull output circuit, for shifting a voltage of the first electrode of the input transistor and providing a shifted voltage corresponding to the voltage of the first electrode of the input transistor to the control terminal of the PMOS transistor.
摘要翻译：公开了放大器。输入晶体管接收输入电压。阻抗单元耦合到输入晶体管的第一电极。电流源耦合到输入晶体管的第二电极。推挽输出电路包括串联电连接以输出输出电压的PMOS晶体管和NMOS晶体管。输入晶体管的第一电极耦合到NMOS晶体管的控制端。电平移位单元耦合在输入晶体管的第一电极和推挽输出电路之间，用于移位输入晶体管的第一电极的电压，并提供与输入的第一电极的电压相对应的移位电压晶体管连接到PMOS晶体管的控制端。

6. 发明申请

US20090212866A1 CLASS AB AMPLIFIER 有权
标题翻译： AB类放大器
公开(公告)号：US20090212866A1
公开(公告)日：2009-08-27
申请号：US12038122
申请日：2008-02-27
申请人： Yu-Hsin Lin , Hsueh-Kun Liao
发明人： Yu-Hsin Lin , Hsueh-Kun Liao
IPC分类号： H03F3/18 , H03F3/16
CPC分类号： H03F3/45183 , H03F3/3022 , H03F2203/30084 , H03F2203/30117 , H03F2203/45668
摘要： An amplifier is disclosed. An input transistor receives an input voltage. An impedance unit is coupled to a first electrode of the input transistor. A current source is coupled to a second electrode of the input transistor. A push-pull output circuit comprises a PMOS transistor and a NMOS transistor electrically connected in series to output an output voltage. The first electrode of the input transistor is coupled to a control terminal of the NMOS transistor. A level shifting unit is coupled between the first electrode of the input transistor and the push-pull output circuit, for shifting a voltage of the first electrode of the input transistor and providing a shifted voltage corresponding to the voltage of the first electrode of the input transistor to the control terminal of the PMOS transistor.
摘要翻译：公开了放大器。输入晶体管接收输入电压。阻抗单元耦合到输入晶体管的第一电极。电流源耦合到输入晶体管的第二电极。推挽输出电路包括串联电连接以输出输出电压的PMOS晶体管和NMOS晶体管。输入晶体管的第一电极耦合到NMOS晶体管的控制端。电平移位单元耦合在输入晶体管的第一电极和推挽输出电路之间，用于移位输入晶体管的第一电极的电压，并提供与输入的第一电极的电压相对应的移位电压晶体管连接到PMOS晶体管的控制端。

7. 发明授权

US07957698B2 Demodulator with output level calibration 有权
标题翻译：具有输出电平校准的解调器
公开(公告)号：US07957698B2
公开(公告)日：2011-06-07
申请号：US12045707
申请日：2008-03-11
申请人： Tsung-Ling Li , Hsiang-Hui Chang , Chia-Huang Fu , En-Hsiang Yeh , Hsueh-Kun Liao , Chieh-Hung Chen
发明人： Tsung-Ling Li , Hsiang-Hui Chang , Chia-Huang Fu , En-Hsiang Yeh , Hsueh-Kun Liao , Chieh-Hung Chen
IPC分类号： H04B17/00 , H04B1/16
CPC分类号： H04B17/0085 , H04B17/20 , H04B17/21 , H04B17/318
摘要： A calibration circuit for calibrating an output level of a demodulator includes a test signal generator, an RSSI module and a calibration module. The test signal generator generates a test signal, and the RSSI module detects the test signal to generate a control signal, wherein the control signal controls the demodulator to process the test signal to generate a determined output signal. The calibration module then calibrates the RSSI module according to the output signal in order to calibrate the output level of the demodulator. When the control signal is utilized to selectively enable or disable a soft-mute function of the demodulator, the calibration module can be utilized to calibrate or determine the soft-mute function of the demodulator.
摘要翻译：用于校准解调器的输出电平的校准电路包括测试信号发生器，RSSI模块和校准模块。测试信号发生器产生测试信号，RSSI模块检测测试信号以产生控制信号，其中控制信号控制解调器处理测试信号以产生确定的输出信号。然后校准模块根据输出信号校准RSSI模块，以校准解调器的输出电平。当使用控制信号来选择性地启用或禁用解调器的软静音功能时，校准模块可用于校准或确定解调器的软静音功能。

8. 发明授权

US07894170B2 ESD protection device 有权
标题翻译： ESD保护装置
公开(公告)号：US07894170B2
公开(公告)日：2011-02-22
申请号：US11081705
申请日：2005-03-17
申请人： Hsueh-Kun Liao , Tao Cheng
发明人： Hsueh-Kun Liao , Tao Cheng
IPC分类号： H02H9/00
CPC分类号： H01L27/0266
摘要： For maintaining the regular operating current in an inner circuit under electrostatic discharge (ESD) event, an ESD protection device is provided to control an ESD path switch in the turned-on condition by employing a MOS device and a latch-detected turned-on circuit. The MOS device has a self-aligned silicidation (Salicide) therein. The ESD protection device is used to stabilize operation efficiency and reduce the area of an ESD protection device without a silicide block disposed therein for enhancing the ESD protection capability.
摘要翻译：为了在静电放电（ESD）事件下保持内部电路中的常规工作电流，提供ESD保护装置，以通过采用MOS器件和锁存检测的导通电路来控制导通状态下的ESD路径开关。 MOS器件中具有自对准硅化物（Salicide）。 ESD保护装置用于稳定运行效率并减小ESD保护装置的面积，而不会在其中设置硅化物块，以增强ESD保护能力。

9. 发明授权

US07532446B2 Protection circuit for electro static discharge 有权
标题翻译：静电放电保护电路
公开(公告)号：US07532446B2
公开(公告)日：2009-05-12
申请号：US10838272
申请日：2004-05-05
申请人： Tao Cheng , Hsueh-Kun Liao
发明人： Tao Cheng , Hsueh-Kun Liao
IPC分类号： H02H9/00
CPC分类号： H01L27/0285 , H01L27/0255 , H01L2924/0002 , H01L2924/00
摘要： An electro static discharge (ESD) protection circuit employing a field-effect transistor (FET) having no silicide block disposed thereon. It is connected with an internal circuit so as to prevent the internal circuit from the influence of an ESD event, wherein the internal circuit has at least a signal input end. The ESD protection circuit includes: an ESD clamp circuit for providing an ESD grounding path as an ESD occurs; and at least a pair of p-n junction diodes. The p-n junction diodes are stacked so that one of the p-n junction diodes has a n-type end coupled to the signal input end and the other one has a p-type end coupled to the signal input end as well. The ESD clamp circuit has at least a FET, whose drain has no silicide block disposed thereon.
摘要翻译：采用不设置硅化物块的场效应晶体管（FET）的静电放电（ESD）保护电路。与内部电路连接，以防止内部电路受到ESD事件的影响，其中内部电路至少具有信号输入端。 ESD保护电路包括：用于提供ESD接地路径作为ESD发生的ESD钳位电路; 和至少一对p-n结二极管。 p-n结二极管被堆叠，使得p-n结二极管中的一个具有耦合到信号输入端的n型端，另一端具有耦合到信号输入端的p型端。 ESD钳位电路至少具有FET，其漏极没有设置在其上的硅化物块。

10. 发明申请

US20070070840A1 Recording apparatus for optical data 有权
标题翻译：光学数据记录装置
公开(公告)号：US20070070840A1
公开(公告)日：2007-03-29
申请号：US11235369
申请日：2005-09-27
申请人： Hsiang-Ji Hsieh , Hsueh-Kun Liao , Yu-Kai Chou , Yu-Hsin Lin
发明人： Hsiang-Ji Hsieh , Hsueh-Kun Liao , Yu-Kai Chou , Yu-Hsin Lin
IPC分类号： G11B7/00
CPC分类号： G11B7/13
摘要： A recording apparatus for optical data includes a photo detection IC for producing a plurality of phase signals; a plurality of sample/hold (S/H) circuits electrically connected to the photo detection IC; a plurality of limiter circuits electrically connected to the photo detection IC; a channel signal generator connected to the S/H circuits; and a level shift circuit connected to an output of the channel signal generator. The recording apparatus for optical data prevents the interference of servo signal during high speed operation and ensures normal operation of S/H circuits thereof.
摘要翻译：用于光学数据的记录装置包括用于产生多个相位信号的光检测IC; 电连接到光检测IC的多个采样/保持（S / H）电路; 电连接到光检测IC的多个限幅器电路; 连接到S / H电路的信道信号发生器; 以及连接到信道信号发生器的输出的电平移位电路。用于光学数据的记录装置防止伺服信号在高速操作期间的干扰，并确保其S / H电路的正常工作。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式