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1. 发明申请

US20120229174A1 OUTPUT STAGE CIRCUIT FOR OUTPUTTING A DRIVING CURRENT VARYING WITH A PROCESS 有权
标题翻译：用于输出驱动电流变化的输出电路
公开(公告)号：US20120229174A1
公开(公告)日：2012-09-13
申请号：US13099380
申请日：2011-05-03
申请人： Chun Shiah , Hao-Jan Yang , Ching-Ying Hsu
发明人： Chun Shiah , Hao-Jan Yang , Ching-Ying Hsu
IPC分类号： H03K3/00
CPC分类号： H03K19/018521 , H03K19/09482
摘要： An output stage circuit includes a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, an N-type metal-oxide-semiconductor transistor, and a current source. A voltage of a third terminal of the first P-type metal-oxide-semiconductor transistor is a first voltage minus a voltage drop between a first terminal and a second terminal of the first P-type metal-oxide-semiconductor transistor. The N-type metal-oxide-semiconductor transistor is coupled between the third terminal of the first P-type metal-oxide-semiconductor transistor and the current source. A second terminal of the second P-type metal-oxide-semiconductor transistor is coupled to the third terminal of the first P-type metal-oxide-semiconductor transistor. When a second terminal of the N-type metal-oxide-semiconductor transistor receives a kick signal, a driving current flowing through the second P-type metal-oxide-semiconductor transistor is relevant to the voltage of the third terminal of the first P-type metal-oxide-semiconductor transistor.
摘要翻译：输出级电路包括第一P型金属氧化物半导体晶体管，第二P型金属氧化物半导体晶体管，N型金属氧化物半导体晶体管和电流源。第一P型金属氧化物半导体晶体管的第三端子的电压是第一电压减去第一P型金属氧化物半导体晶体管的第一端子和第二端子之间的电压降。 N型金属氧化物半导体晶体管耦合在第一P型金属氧化物半导体晶体管的第三端子与电流源之间。第二P型金属氧化物半导体晶体管的第二端子耦合到第一P型金属氧化物半导体晶体管的第三端子。当N型金属氧化物半导体晶体管的第二端子接收到反冲信号时，流过第二P型金属氧化物半导体晶体管的驱动电流与第一P型金属氧化物半导体晶体管的第三端子的电压相关，型金属氧化物半导体晶体管。

2. 发明授权

US08536903B2 Output stage circuit for outputting a driving current varying with a process 有权
标题翻译：用于输出随工艺变化的驱动电流的输出级电路
公开(公告)号：US08536903B2
公开(公告)日：2013-09-17
申请号：US13099380
申请日：2011-05-03
申请人： Chun Shiah , Hao-Jan Yang , Ching-Ying Hsu
发明人： Chun Shiah , Hao-Jan Yang , Ching-Ying Hsu
IPC分类号： H03B19/06
CPC分类号： H03K19/018521 , H03K19/09482
摘要： An output stage circuit includes a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, an N-type metal-oxide-semiconductor transistor, and a current source. A voltage of a third terminal of the first P-type metal-oxide-semiconductor transistor is a first voltage minus a voltage drop between a first terminal and a second terminal of the first P-type metal-oxide-semiconductor transistor. The N-type metal-oxide-semiconductor transistor is coupled between the third terminal of the first P-type metal-oxide-semiconductor transistor and the current source. A second terminal of the second P-type metal-oxide-semiconductor transistor is coupled to the third terminal of the first P-type metal-oxide-semiconductor transistor. When a second terminal of the N-type metal-oxide-semiconductor transistor receives a kick signal, a driving current flowing through the second P-type metal-oxide-semiconductor transistor is relevant to the voltage of the third terminal of the first P-type metal-oxide-semiconductor transistor.
摘要翻译：输出级电路包括第一P型金属氧化物半导体晶体管，第二P型金属氧化物半导体晶体管，N型金属氧化物半导体晶体管和电流源。第一P型金属氧化物半导体晶体管的第三端子的电压是第一电压减去第一P型金属氧化物半导体晶体管的第一端子和第二端子之间的电压降。 N型金属氧化物半导体晶体管耦合在第一P型金属氧化物半导体晶体管的第三端子与电流源之间。第二P型金属氧化物半导体晶体管的第二端子耦合到第一P型金属氧化物半导体晶体管的第三端子。当N型金属氧化物半导体晶体管的第二端子接收到反冲信号时，流过第二P型金属氧化物半导体晶体管的驱动电流与第一P型金属氧化物半导体晶体管的第三端子的电压相关，型金属氧化物半导体晶体管。

3. 发明申请

US20130033250A1 POWER-UP INITIAL CIRCUIT 有权
标题翻译：上电初始电路
公开(公告)号：US20130033250A1
公开(公告)日：2013-02-07
申请号：US13557235
申请日：2012-07-25
申请人： Yen-An Chang , Hao-Jan Yang , Chun Shiah
发明人： Yen-An Chang , Hao-Jan Yang , Chun Shiah
IPC分类号： G05F3/02
CPC分类号： H03K17/162 , H03K2217/0081
摘要： A power-up initial circuit includes a power-up control unit, a first switch and a second switch. The power-up control unit is used for receiving a high voltage start-up signal, and generating a first power-up control signal. The first switch has a first terminal for receiving an external voltage, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal. The second switch has a first terminal coupled to the third terminal of the first switch, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal for coupling to a high voltage generator.
摘要翻译：上电初始电路包括上电控制单元，第一开关和第二开关。上电控制单元用于接收高电压启动信号，并产生第一上电控制信号。第一开关具有用于接收外部电压的第一端子，用于耦合到用于接收第一上电控制信号的上电控制电路的第二端子和第三端子。第二开关具有耦合到第一开关的第三端子的第一端子，用于耦合到用于接收第一上电控制信号的上电控制电路的第二端子，以及用于耦合到高电压发生器的第三端子。

4. 发明授权

US09065444B2 Power-up initial circuit 有权
标题翻译：上电初始电路
公开(公告)号：US09065444B2
公开(公告)日：2015-06-23
申请号：US13557235
申请日：2012-07-25
申请人： Yen-An Chang , Hao-Jan Yang , Chun Shiah
发明人： Yen-An Chang , Hao-Jan Yang , Chun Shiah
IPC分类号： G05F1/00 , H03K17/16
CPC分类号： H03K17/162 , H03K2217/0081
摘要： A power-up initial circuit includes a power-up control unit, a first switch and a second switch. The power-up control unit is used for receiving a high voltage start-up signal, and generating a first power-up control signal. The first switch has a first terminal for receiving an external voltage, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal. The second switch has a first terminal coupled to the third terminal of the first switch, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal for coupling to a high voltage generator.
摘要翻译：上电初始电路包括上电控制单元，第一开关和第二开关。上电控制单元用于接收高电压启动信号，并产生第一上电控制信号。第一开关具有用于接收外部电压的第一端子，用于耦合到用于接收第一上电控制信号的上电控制电路的第二端子和第三端子。第二开关具有耦合到第一开关的第三端子的第一端子，用于耦合到用于接收第一上电控制信号的上电控制电路的第二端子，以及用于耦合到高电压发生器的第三端子。

5. 发明授权

US08823446B2 Current mirror with immunity for the variation of threshold voltage and the generation method thereof 有权
标题翻译：用于阈值电压变化的电流反射镜及其产生方法
公开(公告)号：US08823446B2
公开(公告)日：2014-09-02
申请号：US12471403
申请日：2009-05-24
申请人： Chun Shiah , Hao-Jan Yang , Ho-Yin Chen , Kuo-Chen Lai
发明人： Chun Shiah , Hao-Jan Yang , Ho-Yin Chen , Kuo-Chen Lai
IPC分类号： G05F1/10 , G05F1/56 , G05F3/26
CPC分类号： G05F3/262 , G05F1/561
摘要： A current mirror with immunity for the variation of threshold voltage includes raising the voltage difference between the gate and the source of a MOS in the current source, and increasing the channel length of the MOS for limiting the generated reference current.
摘要翻译：具有用于阈值电压变化的抗扰度的电流镜包括提高电流源中MOS的栅极和源极之间的电压差，以及增加用于限制所生成的参考电流的MOS的沟道长度。

6. 发明申请

US20100052646A1 CURRENT MIRROR WITH IMMUNITY FOR THE VARIATION OF THRESHOLD VOLTAGE AND THE GENERATION METHOD THEREOF 有权
标题翻译：电流电压变化的电流方法及其产生方法
公开(公告)号：US20100052646A1
公开(公告)日：2010-03-04
申请号：US12471403
申请日：2009-05-24
申请人： Chun Shiah , Hao-Jan Yang , Ho-Yin Chen , Kuo-Chen Lai
发明人： Chun Shiah , Hao-Jan Yang , Ho-Yin Chen , Kuo-Chen Lai
IPC分类号： G05F3/16
CPC分类号： G05F3/262 , G05F1/561
摘要： A current mirror with immunity for the variation of threshold voltage includes raising the voltage difference between the gate and the source of a MOS in the current source, and increasing the channel length of the MOS for limiting the generated reference current.
摘要翻译：具有用于阈值电压变化的抗扰度的电流镜包括提高电流源中MOS的栅极和源极之间的电压差，以及增加用于限制所生成的参考电流的MOS的沟道长度。

7. 发明授权

US08742836B2 Double-swing clock generator and charge pump 有权
标题翻译：双摆时钟发生器和电荷泵
公开(公告)号：US08742836B2
公开(公告)日：2014-06-03
申请号：US13556182
申请日：2012-07-23
申请人： Yen-An Chang , Hao-Jan Yang
发明人： Yen-An Chang , Hao-Jan Yang
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/076 , H03K5/003
摘要： A double-swing clock generator includes a first double-swing clock generation circuit and a second double-swing clock generation circuit. The first double-swing clock generation circuit is used for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock. The second double-swing clock generation circuit is used for receiving a fourth voltage, the second voltage, the first clock, the inverse first clock, and the third voltage, and outputting a second double-swing clock.
摘要翻译：双摆时钟发生器包括第一双摆时钟发生电路和第二双摆时钟产生电路。第一双摆时钟产生电路用于接收第一电压，第二电压，第一时钟，反相第一时钟和第三电压，并输出第一双摆时钟。第二双摆时钟产生电路用于接收第四电压，第二电压，第一时钟，反相第一时钟和第三电压，并输出第二双摆时钟。

8. 发明申请

US20130033298A1 DOUBLE-SWING CLOCK GENERATOR AND CHARGE PUMP 有权
标题翻译：双重时钟发生器和充电泵
公开(公告)号：US20130033298A1
公开(公告)日：2013-02-07
申请号：US13556182
申请日：2012-07-23
申请人： Yen-An Chang , Hao-Jan Yang
发明人： Yen-An Chang , Hao-Jan Yang
IPC分类号： H03K3/57 , G05F3/02
CPC分类号： H02M3/073 , H02M2003/076 , H03K5/003
摘要： A double-swing clock generator includes a first double-swing clock generation circuit and a second double-swing clock generation circuit. The first double-swing clock generation circuit is used for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock. The second double-swing clock generation circuit is used for receiving a fourth voltage, the second voltage, the first clock, the inverse first clock, and the third voltage, and outputting a second double-swing clock.
摘要翻译：双摆时钟发生器包括第一双摆时钟发生电路和第二双摆时钟产生电路。第一双摆时钟产生电路用于接收第一电压，第二电压，第一时钟，反相第一时钟和第三电压，并输出第一双摆时钟。第二双摆时钟产生电路用于接收第四电压，第二电压，第一时钟，反相第一时钟和第三电压，并输出第二双摆时钟。

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