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1. 发明授权

US09377802B1 Dynamic configuration of equivalent series resistance 有权
标题翻译：等效串联电阻的动态配置
公开(公告)号：US09377802B1
公开(公告)日：2016-06-28
申请号：US13414387
申请日：2012-03-07
申请人： Christopher P. Wyland , Romi Mayder , Paul Y. Wu
发明人： Christopher P. Wyland , Romi Mayder , Paul Y. Wu
IPC分类号： G05F1/652 , G05F1/63 , G05F1/44 , G05F1/12
CPC分类号： G05F1/652 , G05F1/12 , G05F1/44 , G05F1/63
摘要： In one embodiment, an integrated circuit (IC) includes a power distribution network having a first set of power distribution lines connected to a source voltage and a second set of power distribution lines connected to a ground voltage, and a first capacitor. A first variable resistive element is electrically coupled in series with the first capacitor between the first and second sets of power lines of the power distribution network. A control circuit is coupled to the variable resistive element and is configured and arranged to adjust a level of resistance of the first variable resistive element in response to an input signal. The adjustment of the level of resistance adjusts an equivalent series resistance of the power distribution network.
摘要翻译：在一个实施例中，集成电路（IC）包括配电网络，该配电网络具有连接到源极电压的第一组配电线路和连接到接地电压的第二组配电线路以及第一电容器。第一可变电阻元件与配电网络的第一和第二组电力线之间的第一电容器串联电耦合。控制电路耦合到可变电阻元件，并且被配置和布置成响应于输入信号调整第一可变电阻元件的电阻电平。电阻水平的调整调整配电网的等效串联电阻。

2. 发明授权

US08410579B2 Power distribution network 有权
标题翻译：配电网络
公开(公告)号：US08410579B2
公开(公告)日：2013-04-02
申请号：US12962613
申请日：2010-12-07
申请人： Atul V. Ghia , Christopher P. Wyland , Ketan Sodha , Paul T. Sasaki , Jian Tan , Paul Y. Wu , Romi Mayder
发明人： Atul V. Ghia , Christopher P. Wyland , Ketan Sodha , Paul T. Sasaki , Jian Tan , Paul Y. Wu , Romi Mayder
IPC分类号： H01L23/64 , H01L21/02
CPC分类号： H01L23/5223 , H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： In one embodiment, an integrated circuit (IC) is presented. The IC includes first and second sets of power distribution lines formed in the IC. The IC includes first and second capacitors formed in one or more layers of the IC. A first plurality of vias couple a first input of the first and second capacitors to the first set of power distribution lines, and a second plurality of vias couple a second input of the first and second capacitors to the second set of power distribution lines. The first capacitor and the first plurality of vias and the second plurality of vias coupled thereto having an equivalent series resistance greater than an equivalent series resistance of the second capacitor and the first plurality of vias and the second plurality of vias coupled thereto.
摘要翻译：在一个实施例中，呈现集成电路（IC）。 IC包括形成在IC中的第一组和第二组配电线。 IC包括形成在IC的一个或多个层中的第一和第二电容器。第一多个通孔将第一和第二电容器的第一输入耦合到第一组配电线，以及第二多个通孔将第一和第二电容器的第二输入端耦合到第二组配电线路。第一电容器和第一多个通孔以及耦合到其上的第二多个通孔具有大于第二电容器和第一多个通孔和第二多个通孔耦合的等效串联电阻的等效串联电阻。

3. 发明申请

US20120139083A1 POWER DISTRIBUTION NETWORK 有权
标题翻译：功率分配网络
公开(公告)号：US20120139083A1
公开(公告)日：2012-06-07
申请号：US12962613
申请日：2010-12-07
申请人： Atul V. Ghia , Christopher P. Wyland , Ketan Sodha , Paul T. Sasaki , Jian Tan , Paul Y. Wu , Romi Mayder
发明人： Atul V. Ghia , Christopher P. Wyland , Ketan Sodha , Paul T. Sasaki , Jian Tan , Paul Y. Wu , Romi Mayder
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L23/5223 , H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： In one embodiment, an integrated circuit (IC) is presented. The IC includes first and second sets of power distribution lines formed in the IC. The IC includes first and second capacitors formed in one or more layers of the IC. A first plurality of vias couple a first input of the first and second capacitors to the first set of power distribution lines, and a second plurality of vias couple a second input of the first and second capacitors to the second set of power distribution lines. The first capacitor and the first plurality of vias and the second plurality of vias coupled thereto having an equivalent series resistance greater than an equivalent series resistance of the second capacitor and the first plurality of vias and the second plurality of vias coupled thereto.
摘要翻译：在一个实施例中，呈现集成电路（IC）。 IC包括形成在IC中的第一组和第二组配电线。 IC包括形成在IC的一个或多个层中的第一和第二电容器。第一多个通孔将第一和第二电容器的第一输入耦合到第一组配电线，以及第二多个通孔将第一和第二电容器的第二输入端耦合到第二组配电线路。第一电容器和第一多个通孔以及耦合到其上的第二多个通孔具有大于第二电容器和第一多个通孔和第二多个通孔耦合的等效串联电阻的等效串联电阻。

4. 发明申请

US20080142252A1 Solid via with a contact pad for mating with an interposer of an ATE tester 审中-公开
标题翻译：具有接触垫的固体通孔，用于与ATE测试仪的插入件配合
公开(公告)号：US20080142252A1
公开(公告)日：2008-06-19
申请号：US11638884
申请日：2006-12-13
申请人： Romi Mayder , Kris Rexroad , Pamela Stellmacher
发明人： Romi Mayder , Kris Rexroad , Pamela Stellmacher
IPC分类号： H05K1/09 , H05K1/11
CPC分类号： H05K1/113 , H05K3/4069 , H05K2201/0347 , H05K2201/0959
摘要： An epoxy filled via hole in a printed circuit board is presented. The epoxy filled via hole may have metal plating between the epoxy and the via hole walls of the printed circuit board. The epoxy filled via hole may have a land pad directly over the epoxy filling, creating a compact contact area for an ATE interposer.
摘要翻译：介绍了印刷电路板中环氧树脂填充通孔。环氧树脂填充的通孔可以在环氧树脂和印刷电路板的通孔壁之间进行金属电镀。环氧树脂填充的通孔可以在环氧填充物的正上方具有焊盘，为ATE插入件创建紧凑的接触面积。

5. 发明申请

US20070247140A1 Apparatus, systems and methods for processing signals between a tester and a plurality of devices under test at high temperatures and with single touchdown of a probe array 有权
标题翻译：用于在测试仪与被测试的多个器件之间处理信号的装置，系统和方法在高温下并且具有探针阵列的单次触地
公开(公告)号：US20070247140A1
公开(公告)日：2007-10-25
申请号：US11410699
申请日：2006-04-24
申请人： Romi Mayder , Pam Stellmacher , Edmundo Puente , John Andberg
发明人： Romi Mayder , Pam Stellmacher , Edmundo Puente , John Andberg
IPC分类号： G01R31/28
CPC分类号： G01R31/2889
摘要： Apparatus is for processing signals between a tester and devices under test. In one embodiment, the apparatus includes at least one multichip module. Each multichip module has a plurality of micro-electromechanical switches between a set of connectors to the tester and a set of connectors to devices under test. At least one driver is provided to operate each of the micro-electromechanical switches. A method of processing signals between a tester and devices under test is disclosed. In an embodiment, the method includes connecting the tester and the devices under test with at least one multichip module. Each of the at least one multichip module has a plurality of micro-electromechanical switches between a set of connectors to the tester and a set of connectors to the devices under test. The method includes operating each of the micro-electromechanical switches. Other embodiments are also disclosed.
摘要翻译：设备用于在测试仪和被测设备之间处理信号。在一个实施例中，该装置包括至少一个多芯片模块。每个多芯片模块在一组连接器与测试器之间具有多个微机电开关，以及一组连接器到被测器件。提供至少一个驱动器以操作每个微机电开关。公开了一种在测试仪和被测器件之间处理信号的方法。在一个实施例中，该方法包括用至少一个多芯片模块连接测试器和被测设备。所述至少一个多芯片模块中的每一个具有在到所述测试器的一组连接器之间的多个微机电开关和一组到所述被测器件的连接器。该方法包括操作每个微机电开关。还公开了其他实施例。

6. 发明授权

US07541824B2 Forced air cooling of components on a probecard 有权
标题翻译：强制风冷部件的问题
公开(公告)号：US07541824B2
公开(公告)日：2009-06-02
申请号：US11639010
申请日：2006-12-14
申请人： Romi Mayder , John Andberg
发明人： Romi Mayder , John Andberg
IPC分类号： G01R1/02
CPC分类号： G01R31/2877 , G11C29/56 , G11C29/56016
摘要： A probe card with an air channel over the active components for cooling the active components on the probe card is provided.
摘要翻译：提供了一种探针卡，其具有用于冷却探针卡上的有源部件的有源部件上的空气通道。

7. 发明授权

US07323897B2 Mock wafer, system calibrated using mock wafer, and method for calibrating automated test equipment 有权
标题翻译：模拟晶圆，使用模拟晶圆校准的系统以及校准自动测试设备的方法
公开(公告)号：US07323897B2
公开(公告)日：2008-01-29
申请号：US11014473
申请日：2004-12-16
申请人： Romi Mayder
发明人： Romi Mayder
IPC分类号： G01R31/26
CPC分类号： G01R35/005 , G01R31/2886
摘要： In one embodiment, a mock wafer for calibrating automated test equipment includes a printed circuit board having a number of interconnect areas, with each interconnect area having a pair of mock die pads that are coupled via a connecting trace. In another embodiment, a method for calibrating automated test equipment (ATE) may include coupling the mock wafer to the ATE, and then causing the ATE to i) index the mock wafer with respect to a test head connector, ii) couple a number of probes or the test head connector to a number of the mock wafer's mock die pads, iii) transmit a test signal between a pair of the probes that are coupled via a pair of mock die pads and connecting trace of the mock wafer, and iv) calibrate a selected signal path or paths of the ATE by recording a characteristic of the transmitted test signal.
摘要翻译：在一个实施例中，用于校准自动测试设备的模拟晶片包括具有多个互连区域的印刷电路板，每个互连区域具有通过连接迹线耦合的一对模拟管芯焊盘。在另一个实施例中，用于校准自动化测试设备（ATE）的方法可以包括将模拟晶片耦合到ATE，然后使ATE相对于测试头连接器对模拟晶片进行索引，ii）将多个探针或测试头连接器连接到多个模拟晶片的模拟芯片焊盘，iii）在通过一对模拟裸片焊盘和模拟晶片的连接迹线耦合的一对探针之间传输测试信号，以及iv）通过记录发送的测试信号的特性来校准所选择的信号路径或ATE的路径。

8. 发明授权

US07147499B1 Zero insertion force printed circuit assembly connector system and method 有权
标题翻译：零插入力印刷电路组件连接器系统和方法
公开(公告)号：US07147499B1
公开(公告)日：2006-12-12
申请号：US11253446
申请日：2005-10-19
申请人： Romi Mayder , John W. Andberg , Don Chiu , Noriyuki Sugihara
发明人： Romi Mayder , John W. Andberg , Don Chiu , Noriyuki Sugihara
IPC分类号： H01R13/62
CPC分类号： G01R31/2889
摘要： In one embodiment, a mating circuit assembly is coupled and decoupled to a system by 1) mechanically and electrically coupling at least a first interposer, mounted on at least one of first and second substrates, to the mating circuit assembly. The mechanical and electrical coupling is accomplished using at least first and second spring mechanisms, with the first and second spring mechanisms being mounted between the connector housing and respective ones of the first and second substrates. At least one of the first and second substrates transmits signals between the first interposer and the system. The first interposer is electrically and mechanically decoupled from the mating circuit assembly by creating a vacuum between the connector housing and at least one of the first and second substrates. Other embodiments are also disclosed.
摘要翻译：在一个实施例中，匹配电路组件通过1）将安装在第一和第二衬底中的至少一个上的至少第一插入件机械地和电耦合到配合电路组件而耦合到系统。使用至少第一和第二弹簧机构实现机械和电耦合，其中第一和第二弹簧机构安装在连接器壳体与第一和第二基板中的相应的基板之间。第一和第二基板中的至少一个在第一插入器和系统之间传输信号。第一插入器通过在连接器壳体与第一和第二基板中的至少一个之间产生真空而与配合电路组件电气和机械地分离。还公开了其他实施例。

9. 发明授权

US07459921B2 Method and apparatus for a paddle board probe card 有权
标题翻译：桨板探针卡的方法和装置
公开(公告)号：US07459921B2
公开(公告)日：2008-12-02
申请号：US11444645
申请日：2006-05-31
申请人： Romi Mayder , John W. Andberg
发明人： Romi Mayder , John W. Andberg
IPC分类号： G01R31/02
CPC分类号： G01R31/2889
摘要： A paddle board probe card for connecting a device under test with an ATE tester by means of ZIF connectors is presented. The paddle board probe card may include more than one printed circuit board mounted on a probe card in such a manner that the more than one printed circuit boards mate with ZIF connectors on an ATE testhead interface.
摘要翻译：提出了一种用于通过ZIF连接器将待测器件与ATE测试仪连接的桨板探针卡。桨板探针卡可以包括安装在探针卡上的多于一个印刷电路板，使得多于一个印刷电路板与ATE测试头接口上的ZIF连接器配合。

10. 发明申请

US20080169730A1 Inverted mesa quartz crystal time base reference for automatic test equipment 审中-公开
标题翻译：倒置台面石英晶体时基参考用于自动测试设备
公开(公告)号：US20080169730A1
公开(公告)日：2008-07-17
申请号：US11652352
申请日：2007-01-11
申请人： Romi Mayder , Edmundo De La Puente
发明人： Romi Mayder , Edmundo De La Puente
IPC分类号： H01L41/00 , H01L41/22
CPC分类号： H03H9/19 , Y10T29/42
摘要： An inverted mesa quartz crystal oscillator suitable as a time base reference for automatic test equipment is presented. The inverted mesa quartz crystal may be formed by ion beam etching a mesa in a quartz crystal substrate.
摘要翻译：介绍了适用于自动测试设备时基参考的倒置台面石英晶体振荡器。倒置的台面石英晶体可以通过离子束蚀刻石英晶体衬底中的台面形成。

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