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    • 1. 发明授权
    • Power LDMOS transistor
    • 电源LDMOS晶体管
    • US07589378B2
    • 2009-09-15
    • US11676613
    • 2007-02-20
    • Christopher Boguslaw KoconShuming XuJacek Korec
    • Christopher Boguslaw KoconShuming XuJacek Korec
    • H01L29/76H01L29/94H01L31/00
    • H01L29/7811H01L29/0634H01L29/0878H01L29/1095H01L29/402H01L29/41741H01L29/4175H01L29/41758H01L29/41766H01L29/4933H01L29/7802H01L29/7816H01L29/7823
    • A laterally diffused metal-oxide-semiconductor transistor device includes a substrate having a first conductivity type with a semiconductor layer formed over the substrate. A source region and a drain extension region of the first conductivity type are formed in the semiconductor layer. A body region of a second conductivity type is formed in the semiconductor layer. A conductive gate is formed over a gate dielectric layer that is formed over a channel region. A drain contact electrically connects the drain extension region to the substrate and is laterally spaced from the channel region. The drain contact includes a highly-doped drain contact region formed between the substrate and the drain extension region in the semiconductor layer, wherein a topmost portion of the highly-doped drain contact region is spaced from the upper surface of the semiconductor layer. A source contact electrically connects the source region to the body region.
    • 横向扩散的金属氧化物半导体晶体管器件包括具有在衬底上形成的半导体层的第一导电类型的衬底。 在半导体层中形成第一导电类型的源极区域和漏极延伸区域。 在半导体层中形成第二导电类型的体区。 导电栅极形成在沟道区域上形成的栅极电介质层上。 漏极接触将漏极延伸区域电连接到衬底并且与沟道区域横向间隔开。 漏极接触包括形成在半导体层中的衬底和漏极延伸区域之间的高掺杂漏极接触区域,其中高掺杂漏极接触区域的最高部分与半导体层的上表面间隔开。 源极触点将源极区域电连接到主体区域。
    • 2. 发明授权
    • LDMOS integrated Schottky diode
    • LDMOS集成肖特基二极管
    • US07745846B2
    • 2010-06-29
    • US12014581
    • 2008-01-15
    • Jacek KorecShuming XuChristopher Boguslaw Kocon
    • Jacek KorecShuming XuChristopher Boguslaw Kocon
    • H01L31/111H01L21/28
    • H01L27/0727H01L29/0696H01L29/0878H01L29/1095H01L29/40H01L29/41741H01L29/4175H01L29/41758H01L29/41766H01L29/4933H01L29/7806H01L29/782H01L29/872
    • A semiconductor device includes a substrate having a first conductivity type and a semiconductor layer formed over the substrate and having lower and upper surfaces. A laterally diffused metal-oxide-semiconductor (LDMOS) transistor device is formed over the substrate and includes a source region of the first conductivity type and a drain extension region of the first conductivity type formed in the semiconductor layer proximate the upper surface of the semiconductor layer, and a drain contact electrically connecting the drain extension region to the substrate. A Schottky diode is formed over the substrate and includes at least one doped region of the first conductivity type formed in the semiconductor layer proximate to the upper surface, an anode contact forming a Schottky barrier with the at least one doped region, and a cathode contact laterally spaced from the anode contact and electrically connecting at least one doped region to the substrate.
    • 半导体器件包括具有第一导电类型的衬底和形成在衬底上并具有下表面和上表面的半导体层。 横向扩散的金属氧化物半导体(LDMOS)晶体管器件形成在衬底上,并且包括第一导电类型的源极区域和形成在靠近半导体的上表面的半导体层中的第一导电类型的漏极延伸区域 以及将漏极延伸区域与衬底电连接的漏极接触。 肖特基二极管形成在衬底之上,并且包括形成在靠近上表面的半导体层中的至少一个第一导电类型的掺杂区域,形成具有至少一个掺杂区域的肖特基势垒的阳极接触器和阴极接触器 与阳极接触件横向间隔开并将至少一个掺杂区域电连接到衬底。
    • 5. 发明申请
    • LDMOS INTEGRATED SCHOTTKY DIODE
    • LDMOS集成肖特基二极管
    • US20090179264A1
    • 2009-07-16
    • US12014581
    • 2008-01-15
    • Jacek KorecShuming XuChristopher Boguslaw Kocon
    • Jacek KorecShuming XuChristopher Boguslaw Kocon
    • H01L27/06H01L29/872
    • H01L27/0727H01L29/0696H01L29/0878H01L29/1095H01L29/40H01L29/41741H01L29/4175H01L29/41758H01L29/41766H01L29/4933H01L29/7806H01L29/782H01L29/872
    • A semiconductor device includes a substrate having a first conductivity type and a semiconductor layer formed over the substrate and having lower and upper surfaces. A laterally diffused metal-oxide-semiconductor (LDMOS) transistor device is formed over the substrate and includes a source region of the first conductivity type and a drain extension region of the first conductivity type formed in the semiconductor layer proximate the upper surface of the semiconductor layer, and a drain contact electrically connecting the drain extension region to the substrate. A Schottky diode is formed over the substrate and includes at least one doped region of the first conductivity type formed in the semiconductor layer proximate to the upper surface, an anode contact forming a Schottky barrier with the at least one doped region, and a cathode contact laterally spaced from the anode contact and electrically connecting at least one doped region to the substrate.
    • 半导体器件包括具有第一导电类型的衬底和形成在衬底上并具有下表面和上表面的半导体层。 横向扩散的金属氧化物半导体(LDMOS)晶体管器件形成在衬底上,并且包括第一导电类型的源极区域和形成在靠近半导体的上表面的半导体层中的第一导电类型的漏极延伸区域 以及将漏极延伸区域与衬底电连接的漏极接触。 肖特基二极管形成在衬底之上,并且包括形成在靠近上表面的半导体层中的至少一个第一导电类型的掺杂区域,形成具有至少一个掺杂区域的肖特基势垒的阳极接触器和阴极接触器 与阳极接触件横向间隔开并将至少一个掺杂区域电连接到衬底。
    • 8. 发明申请
    • LATERAL POWER DIODE WITH SELF-BIASING ELECTRODE
    • 具有自偏电极的侧向功率二极管
    • US20120133016A1
    • 2012-05-31
    • US13365983
    • 2012-02-03
    • Christopher Boguslaw Kocon
    • Christopher Boguslaw Kocon
    • H01L29/872H01L21/329
    • H01L29/407H01L29/0634H01L29/0653H01L29/0696H01L29/0878H01L29/41766H01L29/7816H01L29/7824
    • A schottky diode includes a drift region of a first conductivity type and a lightly doped silicon region of the first conductivity type in the drift region. A conductor layer is over and in contact with the lightly doped silicon region to form a schottky contact with the lightly doped silicon region. A highly doped silicon region of the first conductivity type is in the drift region and is laterally spaced from the lightly doped silicon region such that upon biasing the schottky diode in a conducting state, a current flows laterally between the lightly doped silicon region and the highly doped silicon region through the drift region. A plurality of trenches extend into the drift region perpendicular to the current flow. Each trench has a dielectric layer lining at least a portion of the trench sidewalls and at least one conductive electrode.
    • 肖特基二极管包括漂移区中第一导电类型的漂移区和第一导电类型的轻掺杂硅区。 导体层与轻掺杂的硅区域结合并接触,以与轻掺杂的硅区域形成肖特基接触。 第一导电类型的高掺杂硅区域在漂移区域中并且与轻掺杂硅区域横向间隔开,使得在将肖特基二极管偏置在导通状态中时,电流在轻掺杂硅区域和高度掺杂的硅区域之间横向流动 掺杂硅区域通过漂移区域。 多个沟槽延伸到垂直于电流的漂移区域中。 每个沟槽具有内衬至少一部分沟槽侧壁和至少一个导电电极的电介质层。