专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06075544A Method and apparatus for accelerating rendering by coalescing data accesses 失效
标题翻译：通过合并数据访问来加速渲染的方法和装置
公开(公告)号：US06075544A
公开(公告)日：2000-06-13
申请号：US55564
申请日：1998-04-06
申请人： Chris Malachowsky , Curtis Priem , David Kirk
发明人： Chris Malachowsky , Curtis Priem , David Kirk
IPC分类号： G09G5/39 , G09G5/393 , G09G5/36
CPC分类号： G09G5/393 , G09G5/39
摘要： A circuit for accelerating processing of pixel data being provided to a frame buffer comprising circuitry for determining that pixel values vary linearly over a scan line of a polygon to be rendered, linear interpolation circuitry for providing pixel values using a process of linear interpolation between accurately determined pixel values, and a circuit for collecting pixel values to be written to a frame buffer until a significant number of pixel values may be written together.
摘要翻译：一种用于加速处理像素数据的电路，其被提供给一个帧缓冲器，该帧缓冲器包括用于确定像素值在要渲染的多边形的扫描线上线性变化的电路;线性内插电路，用于使用精确确定的线性内插过程来提供像素值像素值，以及用于收集要写入帧缓冲器的像素值直到可以将大量像素值一起写入的电路。

2. 发明授权

US5297240A Hardware implementation of clipping and intercoordinate comparison logic 失效
标题翻译：硬件实现削减和协调比较逻辑
公开(公告)号：US5297240A
公开(公告)日：1994-03-22
申请号：US841883
申请日：1992-02-25
申请人： Curtis Priem , Chris Malachowsky
发明人： Curtis Priem , Chris Malachowsky
IPC分类号： G06T15/30 , G06F15/62
CPC分类号： G06T15/30
摘要： An apparatus for implementing, in hardware, clipping and intercoordinate comparison logic in a graphic display subsystem. Clipping is necessary when an object to be displayed is defined as being only partially contained within a pre-determined window on a video display. For example, if a rectangular window is defined in the upper left hand corner of a video display, and a line has been defined which extends from the upper left-hand corner to the lower right-hand corner of the display, the portion of the line which is outside the defined window is not displayed, i.e., it is clipped. Additionally, if a line of text is wider than the window, the portion of the line of text which is outside the window must also be clipped. Calculations in the nature of comparisons are performed in hardware for use by a graphical subsystem for clipping images to be displayed on a video display in hardware whenever possible, leaving for software only those images, or portions of images which cannot be reliably clipped using the hardware of the graphical subsystem.
摘要翻译：一种用于在硬件中实现图形显示子系统中的削波和协调比较逻辑的装置。当要显示的对象被定义为仅部分地包含在视频显示器上的预定窗口内时，剪切是必要的。例如，如果在视频显示器的左上角定义了矩形窗口，并且已经定义了从显示器的左上角延伸到右下角的线，在定义的窗口之外的行不被显示，即被剪切。另外，如果一行文本比窗口宽，那么在窗口之外的文本行的部分也必须被剪切。在硬件中执行比较性质的计算，以便由图形子系统用于在可能的情况下在硬件中剪切要显示在视频显示器上的图像，仅使软件仅使用那些图像，或者使用硬件不能可靠地裁剪的图像部分的图形子系统。

3. 发明授权

US5742788A Method and apparatus for providing a configurable display memory for single buffered and double buffered application programs to be run singly or simultaneously 失效
标题翻译：用于为单个缓冲和双缓冲应用程序提供单独或同时运行的可配置显示存储器的方法和装置
公开(公告)号：US5742788A
公开(公告)日：1998-04-21
申请号：US266095
申请日：1994-06-27
申请人： Curtis Priem , Chris Malachowsky , Bruce McIntyre , Guy Moffat
发明人： Curtis Priem , Chris Malachowsky , Bruce McIntyre , Guy Moffat
IPC分类号： G06F3/153 , G09G5/00 , G09G5/393 , G09G5/397 , G09G5/399 , G06F12/06
CPC分类号： G09G5/393 , G09G5/399
摘要： An arrangement providing frame buffer memory for an output display by which single buffer and double buffered application programs may be run singly or simultaneously is described. An array of video random access memory sufficient to store data for at least two complete frames is configured in three different ways depending on the applications being run. When only programs designed to run on a single frame buffer are run, the memory is configured as a single frame buffer. When a single program designed to run on double frame buffers is run, the memory is configured as two visible frame buffers. When multiple programs designed to run on double frame buffers are run, the memory is configured into one visible and one invisible frame buffer. Additionally, apparatus for selecting data to be furnished to the display depending on whether the program operates as a single buffered program, a double buffered program, or a plurality of double buffered programs is provided.
摘要翻译：描述了提供用于单个缓冲器和双缓冲应用程序可以单独或同时运行的用于输出显示器的帧缓冲存储器的布置。根据正在运行的应用程序，以三种不同的方式配置足以存储至少两个完整帧的数据的视频随机存取存储器阵列。当只运行在单个帧缓冲区上运行的程序时，内存被配置为单个帧缓冲区。当运行设计为在双帧缓冲区上运行的单个程序时，内存被配置为两个可见的帧缓冲区。当运行设计为在双帧缓冲区上运行的多个程序时，将内存配置为一个可见和一个不可见的帧缓冲区。另外，提供了根据程序是作为单个缓存程序，双缓存程序还是多个双缓冲程序来选择要提供给显示器的数据的设备。

4. 发明授权

US5274755A Hardware implementation for providing raster offsets in a graphics subsystem with windowing 失效
标题翻译：在具有窗口的图形子系统中提供栅格偏移的硬件实现
公开(公告)号：US5274755A
公开(公告)日：1993-12-28
申请号：US308093
申请日：1989-02-08
申请人： Curtis Priem , Chris Malachowsky
发明人： Curtis Priem , Chris Malachowsky
IPC分类号： G06F3/14 , G06T7/00 , G06T11/80 , G09G5/14 , G06F15/20
CPC分类号： G09G5/14
摘要： An apparatus for implementing, in hardware, circuitry for adding a raster offset to screen coordinates in a graphics display subsystem for the purpose of displaying the image in a window which may be moved by a user to an arbitrary position on a screen display. Specifically, a pair of raster offsets, one for X coordinates and one for Y coordinates, are stored in X and Y raster offset registers. The X and Y raster offsets correspond to the offset of an active window from the origin of the screen display. These offsets are added to each coordinate which is to be displayed within the active window in a manner which does not result in any additional overhead.
摘要翻译：用于在硬件中实现用于将图形显示子系统中的屏幕坐标添加光栅偏移的电路的装置，用于将窗口中的图像显示在用户可以在屏幕显示器上的任意位置移动的窗口中。具体来说，一对光栅偏移，一个用于X坐标，另一个用于Y坐标，存储在X和Y光栅偏移寄存器中。 X和Y光栅偏移对应于活动窗口与屏幕显示原点的偏移。这些偏移量以不会导致额外开销的方式添加到要在活动窗口中显示的每个坐标。

5. 发明授权

US5142668A Apparatus and method for loading coordinate registers for use with a graphics subsystem utilizing an index register 失效
标题翻译：用于加载使用索引寄存器的图形子系统使用的坐标寄存器的装置和方法
公开(公告)号：US5142668A
公开(公告)日：1992-08-25
申请号：US599265
申请日：1990-10-16
申请人： Curtis Priem , Chris Malachowsky
发明人： Curtis Priem , Chris Malachowsky
IPC分类号： G06T11/20 , G06T15/10
CPC分类号： G06T11/203 , G06T15/10
摘要： Apparatus and method for using an index register which cycles modulo 4 for loading registers which contain coordinates of four vertices of quadrilateral objects, including degenerate quadrilateral objects, namely a point, a line and a triangle, which are to be displayed by a graphics display subsystem. In this manner, a software command need only define the minimum number of X,Y coordinate pairs to define the object, i.e., one coordinate pair for a point, two coordinate pairs for a line, three coordinate pairs for a triangle and two coordinate pairs for a rectangle (by defining opposite corners). Additionally, by using an index register according to the present invention, objects can be efficiently replicated.
摘要翻译：用于加载寄存器的索引寄存器的装置和方法，所述寄存器包含四边形对象的四个顶点的坐标，包括由图形显示子系统显示的简并四边形对象，即点，线和三角形。以这种方式，软件命令只需要定义X，Y坐标对的最小数量来定义对象，即一个点的一个坐标对，一条线的两个坐标对，三角形的三个坐标对和两个坐标对一个矩形（通过定义相对的角）。此外，通过使用根据本发明的索引寄存器，可以有效地复制对象。

6. 发明授权

US5128872A Method and apparatus for determining line positions for display and manipulation by a computer system 失效
标题翻译：用于确定由计算机系统显示和操纵的行位置的方法和装置
公开(公告)号：US5128872A
公开(公告)日：1992-07-07
申请号：US604993
申请日：1990-10-25
申请人： Chris Malachowsky , Curtis Priem
发明人： Chris Malachowsky , Curtis Priem
IPC分类号： G09G5/393
CPC分类号： G09G5/393
摘要： A circuit for determining the X values of each end of a series of horizontal scan lines connecting a pair of line segments each of which is defined by a pair of vertices, the horizontal scan lines defining an area to be rendered on a computer output device, comprising first and second circuit portions, each of said circuit portions including apparatus to determine the slope of a line segment, apparatus depending on the slope for determining the beginning and ending X values for each line segment for each scan line in the area to be rendered, apparatus for causing the two circuit portions to begin operation at the same scan line, and apparatus for changing the Y value for each circuit portion to the Y value of the next adjacent scan line at the same time.
摘要翻译：一种用于确定连接一对线段的一系列水平扫描线的每端的X值的电路，每条线段由一对顶点限定，所述水平扫描线限定要在计算机输出设备上呈现的区域，包括第一和第二电路部分，每个所述电路部分包括用于确定线段的斜率的装置，根据用于确定要呈现的区域中的每个扫描线的每个线段的开始和结束X值的斜率的装置用于使两个电路部分在相同扫描线处开始工作的装置，以及用于将每个电路部分的Y值同时改变为下一个相邻扫描线的Y值的装置。

7. 发明授权

US5654742A Method and apparatus for providing operations affecting a frame buffer without a row address strobe cycle 失效
标题翻译：用于提供影响帧缓冲器而不具有行地址选通周期的操作的方法和装置
公开(公告)号：US5654742A
公开(公告)日：1997-08-05
申请号：US451476
申请日：1995-05-26
申请人： Curtis Priem , Chris Malachowsky , Shuen Chin Chang , Hai Duy Ho
发明人： Curtis Priem , Chris Malachowsky , Shuen Chin Chang , Hai Duy Ho
IPC分类号： G06F12/02 , G06F12/00 , G09G5/00 , G09G5/39 , G11C7/10
CPC分类号： G11C7/1087 , G09G5/39 , G11C7/103 , G11C7/1033 , G11C7/1051 , G11C7/1078
摘要： A frame buffer designed to allow frame buffer operations which do not involve new row addresses to be accomplished without the need for a RAS cycle. The elimination of RAS cycles for address loading and similar functions substantially accelerates the operation of the frame buffer both as to functions which do not involve memory array addresses and those which do involve memory array addresses.
摘要翻译：设计用于允许不需要RAS周期来实现不涉及新行地址的帧缓冲操作的帧缓冲器。消除用于地址加载和类似功能的RAS周期大大加速了帧缓冲器的操作，这两个功能不涉及存储器阵列地址和那些涉及存储器阵列地址的功能。

8. 发明授权

US5504855A Method and apparatus for providing fast multi-color storage in a frame buffer 失效
标题翻译：用于在帧缓冲器中提供快速多色存储的方法和装置
公开(公告)号：US5504855A
公开(公告)日：1996-04-02
申请号：US145756
申请日：1993-10-29
申请人： Curtis Priem , Chris Malachowsky , Rick Silverman , Shuen C. Chang
发明人： Curtis Priem , Chris Malachowsky , Rick Silverman , Shuen C. Chang
IPC分类号： G09G5/00 , G09G5/02 , G09G5/04 , G09G5/393 , G11C7/10 , G06F15/00
CPC分类号： G09G5/022 , G09G5/393 , G11C7/1078
摘要： A frame buffer for accelerating the display of graphics data on an output display device which frame buffer includes a pair of color value registers each of which may be loaded with color values prior to writing to the frame buffer. Selection means are provided for selecting pixel data from the bus, from a first of the color value registers, from the second of the color value registers, or from both color value registers simultaneously. When data is written to the frame buffer from color value registers it may be written to a number of pixel positions simultaneously.
摘要翻译：一种用于加速在输出显示装置上显示图形数据的帧缓冲器，该帧缓冲器包括一对颜色值寄存器，每个颜色值寄存器可以在写入帧缓冲器之前加载颜色值。选择装置用于从总线，颜色值寄存器中的第一个，颜色值寄存器中的第二个或两个色值寄存器同时选择像素数据。当数据从彩色值寄存器写入帧缓冲器时，它可以同时写入多个像素位置。

9. 发明授权

US5287487A Predictive caching method and apparatus for generating a predicted address for a frame buffer 失效
标题翻译：用于生成帧缓冲器的预测地址的预测缓存方法和装置
公开(公告)号：US5287487A
公开(公告)日：1994-02-15
申请号：US74703
申请日：1993-06-09
申请人： Curtis Priem , Chris Malachowsky , Robert Rocchetti , David Rosenthal
发明人： Curtis Priem , Chris Malachowsky , Robert Rocchetti , David Rosenthal
IPC分类号： G06F12/08 , G06F12/02 , G06F13/00
CPC分类号： G06F12/0862 , G06F12/0875 , G06F2212/6026
摘要： A predictive caching system for use in computer system having at least one portion of memory in which information is stored for retrieval, a general cache used to speed the operation of accessing such memory, and a processor for controlling the access of the memory comprising apparatus for discerning a pattern of access of the memory, apparatus operating in response to the pattern determined by the apparatus for discerning a pattern of access of the memory for determining a next address which will probably accessed in such memory if the pattern discerned continues, and apparatus for storing the information at the next address determined prior to the next access of the memory whereby the information at the next address is available without the need to access the memory.
摘要翻译：一种用于计算机系统的预测性高速缓存系统，具有至少一部分存储器，其中存储有用于检索的信息，用于加速访问这种存储器的操作的通用缓存器，以及用于控制存储器的访问的处理器，识别所述存储器的访问模式，所述设备响应于由所述设备确定的模式而工作，所述模式用于识别所述存储器的访问模式，用于确定如果所识别的所述模式继续则在所述存储器中可能访问的下一个地址，以及用于将信息存储在下一次访问存储器之前确定的下一个地址处，由此下一个地址处的信息可用，而不需要访问存储器。

10. 发明授权

US5129065A Apparatus and methods for interface register handshake for controlling devices 失效
标题翻译：用于控制设备的接口注册机的装置和方法
公开(公告)号：US5129065A
公开(公告)日：1992-07-07
申请号：US428236
申请日：1989-10-27
申请人： Curtis Priem , Chris Malachowsky , Robert Rocchetti
发明人： Curtis Priem , Chris Malachowsky , Robert Rocchetti
IPC分类号： G06F13/42
CPC分类号： G06F13/4226
摘要： A method of initiating a write operation for a particular command from a first computer module through a system interface to a second computer module having data registers, and a status register which includes the steps of writing data to the data registers in the second computer module, and determining the status of the status register in the second computer module to cause the initiation of the particular command by which the reading the status of the data registers and issuing the particular command as separate steps are eliminated.
摘要翻译：一种通过系统接口向具有数据寄存器的第二计算机模块启动用于特定命令的特定命令的写入操作的方法，以及状态寄存器，其包括将数据写入到第二计算机模块中的数据寄存器，以及确定第二计算机模块中的状态寄存器的状态，以使消除特定命令的开始，通过该命令读取数据寄存器的状态并且发出特定命令作为单独的步骤。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式