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    • 4. 发明授权
    • Timer based arbitrations scheme for a PCI multi-function device
    • 用于PCI多功能设备的基于定时器的仲裁方案
    • US06240475B1
    • 2001-05-29
    • US09001245
    • 1997-12-30
    • Surendra Anubolu
    • Surendra Anubolu
    • G06F1314
    • G06F13/372
    • According to the present invention, a function timer is started whenever the PCI bus is granted to the function that did not access the PCI bus prior to the last bus idle state. The timer counts down to zero and waits until another function requests the PCI bus. During the time the timer is not zero, the current function will have the highest priority. Even if a PCI bus disconnect signal or retry signal forces the current function to deassert the request signal and start the request again, the current function is guaranteed to win the arbitration among the multiple contenders within the multi-function device. Since during the time slot, the same function will the granted access to the PCI bus, the next request will most likely be readily available from the PCI bridge's buffer which has additional data stored in anticipation for the next request. The use of the PCI bridge's buffer will maximize the system memory bus usage while increasing the PCI bus throughput. The time slot based arbitration according to the present invention rotates the priority to the other requesting function after the predetermined time expires which limits the latency for all the functions.
    • 根据本发明,每当PCI总线被授予在最后一个总线空闲状态之前未访问PCI总线的功能时,功能定时器就被启动。 定时器倒计时到零,等待直到另一个功能请求PCI总线。 在定时器不为零的时间内,当前功能将具有最高优先级。 即使PCI总线断开信号或重试信号强制当前功能来解除请求信号并再次启动请求,则保证当前功能在多功能设备内的多个竞争者之间赢得仲裁。 由于在时隙期间,相同的功能将允许访问PCI总线,所以下一个请求将很有可能从PCI桥的缓冲区中获得,该缓冲区具有存储在预期下一个请求中的附加数据。 使用PCI桥的缓冲区可以最大化系统内存总线的使用,同时增加PCI总线的吞吐量。 根据本发明的基于时隙的仲裁在预定时间到期之后将优先级转到另一个请求功能,这限制了所有功能的等待时间。
    • 9. 发明授权
    • Use of a stored signal to switch between memory banks
    • 使用存储的信号在存储体之间切换
    • US5913924A
    • 1999-06-22
    • US574534
    • 1995-12-19
    • Jianyun ZhouSurendra Anubolu
    • Jianyun ZhouSurendra Anubolu
    • G06F12/06G06F13/14G06F13/00
    • G06F12/0653G06F12/0615G06F13/14
    • A computer system includes a number of storage elements encoded with space selection instructions and at least one current-space storage element that together allow a computer to address a larger number of devices than allowed by a limited number of address terminals on the computer. Specifically, the current-space storage element is encoded with a space-selection signal that indicates a "current" address space, i.e. which one of a number of mutually exclusive address spaces is currently accessed. The space-selection signal can be changed by any device using a data bus to store signals indicative of a new address space as the "current" address space in the current-space storage element. The current-space storage element is included in a first device that can be accessed by the computer at any time by driving a signal active on a high address line of an address bus. When the signal on the high address line is inactive, the computer accesses one of a number of second devices that are located in mutually exclusive address spaces, as indicated by the current-space storage element's signal.
    • 计算机系统包括用空间选择指令编码的多个存储元件和至少一个当前空间存储元件,其一起允许计算机寻址比计算机上的有限数量的地址终端允许的更多数量的设备。 具体地,当前空间存储元件用指示“当前”地址空间的空间选择信号进行编码,即当前访问多个互斥地址空间中的哪一个。 空间选择信号可以由使用数据总线的任何设备改变,以存储指示新地址空间的信号作为当前空间存储元件中的“当前”地址空间。 当前空间存储元件包括在第一设备中,可以随时通过驱动在地址总线的高地址线上激活的信号由计算机访问。 当高地址线上的信号不活动时,计算机访问位于互斥地址空间中的多个第二设备中的一个,如当前空间存储元件的信号所示。