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    • 1. 发明授权
    • Dynamic precharge redundant circuit for semiconductor memory device
    • 半导体存储器件的动态预充电冗余电路
    • US6166974A
    • 2000-12-26
    • US429595
    • 1999-10-28
    • Chia-Yi HsienChih-Cheng ChenHon-Shing Lau
    • Chia-Yi HsienChih-Cheng ChenHon-Shing Lau
    • G11C7/12G11C17/18G11C7/00
    • G11C17/18G11C7/12
    • A dynamic precharge redundant circuit for a semiconductor memory device. A PMOS transistor, a fuse, a first, second and third inverters, a first switch and a second switch are applied. A source of the PMOS transistor is coupled to a voltage supply, while a gate of the PMOS transistor is to receive a precharge signal. The fuse has a ground terminal and a terminal coupled to the drain of the PMOS transistor of which the drain is further coupled to an input terminal of the first inverter. The fuse is also coupled to a column address signal. The first inverter has an output terminal coupled to an input terminal of the first switch. The second inverter has an input terminal coupled to an output terminal of the first switch and an output terminal coupled to an input terminal of the third inverter, so as to output a bit-switch control signal. An input terminal of the second switch is coupled to an output terminal of the third inverter, while an output terminal of the second switch is coupled to both the output terminal of the first switch and the input terminal of the second inverter. Thus, an error caused by the generation of an interference signal of the bit-switch control signal is prevented, so as to prevent from damaging data of the bit line sense amplifier.
    • 一种用于半导体存储器件的动态预充电冗余电路。 PMOS晶体管,熔丝,第一,第二和第三反相器,第一开关和第二开关被施加。 PMOS晶体管的源极耦合到电压源,而PMOS晶体管的栅极将接收预充电信号。 保险丝具有接地端子和耦合到PMOS晶体管的漏极的端子,漏极还耦合到第一反相器的输入端子。 保险丝也耦合到列地址信号。 第一反相器具有耦合到第一开关的输入端的输出端。 第二反相器具有耦合到第一开关的输出端子的输入端子和耦合到第三反相器的输入端子的输出端子,以便输出位开关控制信号。 第二开关的输入端耦合到第三反相器的输出端,而第二开关的输出端耦合到第一开关的输出端和第二反相器的输入端。 因此,防止了由位开关控制信号的干扰信号的产生引起的误差,从而防止位线读出放大器的数据损坏。