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1. 发明申请

US20130308672A1 Chip array structure for laser diodes and packaging device for the same 审中-公开
标题翻译：芯片阵列结构的激光二极管和封装器件相同
公开(公告)号：US20130308672A1
公开(公告)日：2013-11-21
申请号：US13546243
申请日：2012-07-11
申请人： Jin-Shan PAN , Chih-Cheng CHEN , Hsiu-Ming HSIEH
发明人： Jin-Shan PAN , Chih-Cheng CHEN , Hsiu-Ming HSIEH
IPC分类号： H01S5/02 , H01S5/183
CPC分类号： H01S5/42 , H01L27/156 , H01S5/02276 , H01S5/423
摘要： A chip array structure for laser diodes, formed on an active surface of a semiconductor chip produced from a semiconductor process includes a plurality of light-emitting elements in an array arrangement, at least one insulation wall, at least two wire bond areas and a plurality of connection electrodes. The insulation wall separates the light-emitting elements into at least two light-emitting districts. The wire bond areas are positioned respective to the corresponding light-emitting districts. The connection electrodes electrically couple the wire bond areas with the corresponding light-emitting districts. The wire bond areas have independent electrodes, and the light-emitting districts are electrically isolated by the insulation wall.
摘要翻译：形成在由半导体工艺制造的半导体芯片的有源表面上的激光二极管的芯片阵列结构包括阵列布置中的多个发光元件，至少一个绝缘壁，至少两个引线接合区域和多个的连接电极。绝缘壁将发光元件分成至少两个发光区域。引线键合区域相应于相应的发光区域。连接电极将引线接合区域与对应的发光区域电耦合。引线键合区域具有独立的电极，并且发光区域通过绝缘壁电隔离。

2. 发明申请

US20130008882A1 MOUSE WARMER 审中-公开
标题翻译：鼠标加热器
公开(公告)号：US20130008882A1
公开(公告)日：2013-01-10
申请号：US13177544
申请日：2011-07-06
申请人： Yu-Hsiang Hu , Chih-Cheng Chen
发明人： Yu-Hsiang Hu , Chih-Cheng Chen
IPC分类号： H05B1/00
CPC分类号： H05B3/20
摘要： A mouse warmer includes a mouse electrically connectable to a computer for cursor control and having a housing configured for the grasping of a hand of a user, and an electrical heater mounted in the housing for generating heat to warm the user's hand holding the housing.
摘要翻译：鼠标加热器包括可电连接到用于光标控制的计算机的鼠标，并且具有构造成用于抓住用户的手的壳体，以及安装在壳体中的电加热器，用于产生热量以加热用户握住壳体的手。

3. 发明授权

US07997912B2 Three-dimensional connector for a coordinate input device 有权
标题翻译：用于坐标输入设备的三维连接器
公开(公告)号：US07997912B2
公开(公告)日：2011-08-16
申请号：US12793379
申请日：2010-06-03
申请人： Chih-Cheng Chen
发明人： Chih-Cheng Chen
IPC分类号： H01R13/44
CPC分类号： H01R12/62 , H01R12/58 , H01R12/65 , H05K1/118 , H05K3/0058 , H05K2201/0397 , H05K2201/048 , H05K2201/10303 , H05K2201/1059
摘要： A three-dimensional connector, which is used by a coordinate input device of a touch pad, has a flat conductor cable with an end being connected to the touch pad and another end forming a soldered conductive contact head perpendicular to the flat conductor cable to pass through a support to shorten a length of said conductor cable and enhance electro-conductibility of the connector.
摘要翻译：由触摸板的坐标输入装置使用的三维连接器具有扁平导体电缆，其端部连接到触摸板，另一端形成垂直于扁平导体电缆的焊接导电接触头以通过通过支撑件缩短所述导体电缆的长度并增强连接器的导电性。

4. 发明申请

US20110102394A1 METHOD AND SYSTEM OF CONTROLLING HALT AND RESUME OF SCANNING AN LCD 有权
标题翻译：控制液晶显示屏控制方法与系统
公开(公告)号：US20110102394A1
公开(公告)日：2011-05-05
申请号：US12612294
申请日：2009-11-04
申请人： PU-JEN CHENG , CHIH-CHENG CHEN
发明人： PU-JEN CHENG , CHIH-CHENG CHEN
IPC分类号： G06F3/038
CPC分类号： G09G3/3614 , G09G2310/0213
摘要： A method and system of controlling halt and resumption of scanning actions of an LCD is disclosed. An incoming video source is monitored, and current scan line position and corresponding polarity are recorded. When an abnormal video source is detected, the LCD scanning is stopped at a halt scan line of a halt frame with a halt polarity. After a normal video source has been detected again, determination is made of a proper resumptive scan line and/or a resumptive polarity. The panel scanning is resumed at the resumptive scan line equal to the halt scan line and/or with the resumptive polarity matching the halt polarity.
摘要翻译：公开了一种控制LCD的扫描动作停止和恢复的方法和系统。监视输入的视频源，并记录当前的扫描线位置和相应的极性。当检测到异常视频源时，LCD扫描在停止极性的停止帧的停止扫描线处停止。在再次检测到正常视频源之后，确定适当的恢复扫描线和/或恢复极性。在等于停止扫描线的复原扫描线和/或与停止极性匹配的恢复极性恢复面板扫描。

5. 发明授权

US07598039B2 Treatment of insulin resistance 失效
标题翻译：治疗胰岛素抵抗
公开(公告)号：US07598039B2
公开(公告)日：2009-10-06
申请号：US11668952
申请日：2007-01-30
申请人： Chih-Cheng Chen , Shyh-Jer Huang , Yi-Wen Lin
发明人： Chih-Cheng Chen , Shyh-Jer Huang , Yi-Wen Lin
IPC分类号： C12Q1/68
CPC分类号： G01N33/5035 , A61K31/7052 , A61K48/00 , G01N33/5044 , G01N33/6872 , G01N2800/042
摘要： Disclosed are a method of for treating insulin resistance and a method identifying a compound for treating insulin resistance.
摘要翻译：公开了一种治疗胰岛素抵抗的方法，以及鉴定用于治疗胰岛素抵抗的化合物的方法。

6. 发明申请

US20090210720A1 METHOD FOR GENERATING ONE-TIME PASSWORD 审中-公开
标题翻译：生成一次性密码的方法
公开(公告)号：US20090210720A1
公开(公告)日：2009-08-20
申请号：US12173824
申请日：2008-07-16
申请人： Chih-Cheng Chen , Chi-Hsing Tseng , Tzung-Hsi Lin
发明人： Chih-Cheng Chen , Chi-Hsing Tseng , Tzung-Hsi Lin
IPC分类号： H04L9/06
CPC分类号： G06F21/46
摘要： A method for generating a one-time password (OTP) by using software only is provided. The method is suitable for generating a common dynamic password in a first electronic device and a second electronic device. First, an initial number is provided to the first electronic device and the second electronic devices. Then, a value is generated, encrypted into a transmission value according to the initial number, and transmitted to the second electronic device by the first electronic device. Next, the transmission value is decrypted by the second electronic device according to the initial number to obtain the value. Finally, a dynamic password is respectively generated in the first electronic device and the second electronic device according to the initial number and the value. Thereby, an OTP system is constituted.
摘要翻译：提供了仅使用软件生成一次性密码（OTP）的方法。该方法适用于在第一电子设备和第二电子设备中生成公共动态密码。首先，向第一电子设备和第二电子设备提供初始数字。然后，根据初始号码生成加密为传输值的值，并由第一电子设备发送到第二电子设备。接下来，通过第二电子设备根据初始号码对发送值进行解密，得到该值。最后，根据初始号码和数值分别在第一电子设备和第二电子设备中生成动态密码。由此，构成了OTP系统。

7. 发明授权

US07263154B2 Method and apparatus for enabling fast clock phase locking in a phase-locked loop 有权
标题翻译：用于在锁相环中实现快速时钟相位锁定的方法和装置
公开(公告)号：US07263154B2
公开(公告)日：2007-08-28
申请号：US10680636
申请日：2003-10-07
申请人： Tse-Hsiang Hsu , Ding-Jen Liu , Jong-Woei Chen , Chih-Cheng Chen
发明人： Tse-Hsiang Hsu , Ding-Jen Liu , Jong-Woei Chen , Chih-Cheng Chen
IPC分类号： H03D1/24 , H03L7/06
CPC分类号： G11B20/10009 , G11B27/3027 , G11B2220/216 , G11B2220/2575 , H03L7/081 , H03L7/10
摘要： In a method and apparatus for enabling fast clock phase locking in a phase-locked loop, a sampling clock generator generates sampling clock signals in response to an oscillator output of the phase-locked loop. A detector unit samples an input digital signal to the phase-locked loop at clock edges of the sampling clock signals to obtain multiple sampling points of the input digital signal, and compares logic levels of each temporally adjacent pair of the sampling points to detect presence of a logic level transition in the input digital signal. A selector unit is controlled by the detector unit to select one of the sampling clock signals, which has one of the clock edges thereof defining an interval that was detected to have occurrence of the logic level transition in the input digital signal, and which is subsequently provided to the phase-locked loop as an input phase-locking clock signal.
摘要翻译：在用于在锁相环中实现快速时钟相位锁定的方法和装置中，采样时钟发生器响应于锁相环的振荡器输出产生采样时钟信号。检测器单元在采样时钟信号的时钟边沿将输入数字信号采样到锁相环，以获得输入数字信号的多个采样点，并且比较每个时间上相邻的采样点对的逻辑电平，以检测输入数字信号中的逻辑电平转换。选择器单元由检测器单元控制，以选择一个采样时钟信号，其中一个采样时钟信号的时钟边沿之一限定了被检测为在输入数字信号中出现逻辑电平转换的间隔，随后提供给锁相环作为输入锁相时钟信号。

8. 发明授权

US06998891B2 Apparatus for calibrating a charge pump and method therefor 有权
标题翻译：用于校准电荷泵的装置及其方法
公开(公告)号：US06998891B2
公开(公告)日：2006-02-14
申请号：US11010420
申请日：2004-12-14
申请人： Tse-Hsiang Hsu , Chih-Cheng Chen
发明人： Tse-Hsiang Hsu , Chih-Cheng Chen
IPC分类号： H03L7/06
CPC分类号： H03L7/0895 , H03L7/18
摘要： A signal calibration apparatus of a charge pump minimizes a current from the charge pump. The signal calibration apparatus includes a detecting circuit, a current adjusting circuit, and a calibrating circuit, wherein the detecting circuit is coupled to the charge pump for outputting a detecting signal according to the direction and magnitude of the current, the current adjusting circuit is coupled to the detecting circuit for outputting a calibrating signal according to the polarity and magnitude of the slew rate of the detecting signal; and the calibrating circuit, which consists of a first calibration current source and a second calibration current source, is respectively coupled to the charge pump and the current adjusting circuit for adjusting the first current and the second current by outputting a first calibrating current and second calibrating current to the charge pump.
摘要翻译：电荷泵的信号校准装置使来自电荷泵的电流最小化。信号校准装置包括检测电路，电流调节电路和校准电路，其中检测电路耦合到电荷泵，用于根据电流的方向和幅度输出检测信号，电流调节电路耦合检测电路，用于根据检测信号的转换速率的极性和大小输出校准信号; 并且由第一校准电流源和第二校准电流源组成的校准电路分别耦合到电荷泵和电流调节电路，用于通过输出第一校准电流和第二校准电流来调节第一电流和第二电流电流到电荷泵。

9. 发明申请

US20050122875A1 Apparatus and method for optical disk drive signal processing 审中-公开
标题翻译：用于光盘驱动器信号处理的装置和方法
公开(公告)号：US20050122875A1
公开(公告)日：2005-06-09
申请号：US11000945
申请日：2004-12-02
申请人： Chia-Hua Chou , Chih-Cheng Chen , Tse-Hsiang Hsu
发明人： Chia-Hua Chou , Chih-Cheng Chen , Tse-Hsiang Hsu
IPC分类号： G11B5/09 , G11B7/005 , G11B7/007 , G11B20/00 , G11B20/10
CPC分类号： G11B20/10 , G11B7/0053 , G11B7/00736 , G11B7/00745 , G11B7/24082
摘要： The present invention describes an apparatus and method for optical disk drive signal processing. For improving the bandwidth for signal transmitting between an optical disk drive (ODD) controller and an optical pick-up unit (OPU) via a flexible cable, a physical address pre-processing unit is mounted on the optical pick-up unit of a Optical disk drive. The long settling time problem conventionally due to a voltage change in the writing process can be resolved. The apparatus and method extract the physical address in the high-writing process of the Optical disk drive.
摘要翻译：本发明描述了一种用于光盘驱动信号处理的装置和方法。为了通过柔性电缆提高光盘驱动器（ODD）控制器和光拾取单元（OPU）之间信号传输的带宽，物理地址预处理单元安装在光学拾取单元磁盘驱动器。可以解决通常由于写入处理中的电压变化导致的长的建立时间问题。该设备和方法在光盘驱动器的高写入过程中提取物理地址。

10. 发明授权

US06229744B1 Semiconductor memory device with function of equalizing voltage of dataline pair 有权
标题翻译：具有均衡数据线对电压功能的半导体存储器件
公开(公告)号：US06229744B1
公开(公告)日：2001-05-08
申请号：US09429402
申请日：1999-10-28
申请人： Chuan-Cheng Hsiao , Chih-Cheng Chen , Hon-Shing Lau
发明人： Chuan-Cheng Hsiao , Chih-Cheng Chen , Hon-Shing Lau
IPC分类号： G11C700
CPC分类号： G11C7/1048
摘要： A semiconductor memory device with a function of equalizing voltages of dataline pair. After turning off the word line and before turning on the equalization means, the datalines are precharged and discharged to a supplied voltage and ground, respectively. Using the theory of uniform distribution of charges, the datalines are equalized into VCC/2, that is, a half of the source supply voltage. The interference on a weak voltage VCC/2 generator within the equalization means during the equalization mode is thus avoided. The equalization of voltages on the dataline pair can be achieved within a transient cycle. Complete data can thus be written or read before the next command is given.
摘要翻译：具有均衡数据线对电压的功能的半导体存储器件。在关闭字线之后，并且在打开均衡装置之前，数据线被预先充电并分别放电到所提供的电压和接地。使用电荷均匀分布理论，将数据量均衡为VCC / 2，即源电源电压的一半。因此避免了在均衡模式期间对均衡装置内的弱电压VCC / 2发生器的干扰。数据线对上的电压均衡可以在瞬态周期内实现。因此，在给出下一个命令之前，可以写入或读取完整的数据。

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