专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07674986B2 Circuit board structure having capacitor array and embedded electronic component and method for fabricating the same 有权
标题翻译：具有电容器阵列和嵌入式电子部件的电路板结构及其制造方法
公开(公告)号：US07674986B2
公开(公告)日：2010-03-09
申请号：US11537417
申请日：2006-09-29
申请人： Chia-Wei Chang , Chung-Cheng Lien
发明人： Chia-Wei Chang , Chung-Cheng Lien
IPC分类号： H05K1/16
CPC分类号： H05K1/162 , H01L24/19 , H01L2224/04105 , H01L2924/14 , H05K1/185 , H05K3/4602 , H05K3/4626 , H05K2201/0209 , H05K2201/09536 , H05K2201/09672 , H05K2203/061 , H01L2924/00
摘要： A circuit board structure having a capacitor array and an embedded electronic component and a method for fabricating the same are proposed. Two carrier boards and a high dielectric constant material layer are provided, wherein the carrier boards have electronic components embedded therein and one surface of each carrier board has a plurality of electrode plates. The two carrier boards are laminated with the dielectric constant material layer interposed between them. The electrode plates on the surfaces of the carrier boards are opposite to each other across the high dielectric constant material layer to constitute a capacitor array. Therefore, the capacitor assembly for design of electronic devices is provided.
摘要翻译：提出了具有电容器阵列和嵌入式电子部件的电路板结构及其制造方法。提供了两个载体板和高介电常数材料层，其中载体板上嵌有电子部件，并且每个载体板的一个表面具有多个电极板。将两个载板叠置在介于它们之间的介电常数材料层。载体板表面上的电极板跨越高介电常数材料层彼此相对，以构成电容器阵列。因此，提供了用于设计电子设备的电容器组件。

2. 发明申请

US20070147014A1 Circuit Board Structure Having Capacitor Array and Embedded Electronic Component and Method for Fabricating the Same 有权
标题翻译：具有电容阵列和嵌入式电子元件的电路板结构及其制造方法
公开(公告)号：US20070147014A1
公开(公告)日：2007-06-28
申请号：US11537417
申请日：2006-09-29
申请人： Chia-Wei Chang , Chung-Cheng Lien
发明人： Chia-Wei Chang , Chung-Cheng Lien
IPC分类号： H05K7/00
CPC分类号： H05K1/162 , H01L24/19 , H01L2224/04105 , H01L2924/14 , H05K1/185 , H05K3/4602 , H05K3/4626 , H05K2201/0209 , H05K2201/09536 , H05K2201/09672 , H05K2203/061 , H01L2924/00
摘要： A circuit board structure having a capacitor array and an embedded electronic component and a method for fabricating the same are proposed. Two carrier boards and a high dielectric constant material layer are provided, wherein the carrier boards have electronic components embedded therein and one surface of each carrier board has a plurality of electrode plates. The two carrier boards are laminated with the dielectric constant material layer interposed between them. The electrode plates on the surfaces of the carrier boards are opposite to each other across the high dielectric constant material layer to constitute a capacitor array. Therefore, the capacitor assembly for design of electronic devices is provided.
摘要翻译：提出了具有电容器阵列和嵌入式电子部件的电路板结构及其制造方法。提供了两个载体板和高介电常数材料层，其中载体板上嵌有电子部件，并且每个载体板的一个表面具有多个电极板。将两个载板叠置在介于它们之间的介电常数材料层。载体板表面上的电极板跨越高介电常数材料层彼此相对，以构成电容器阵列。因此，提供了用于设计电子设备的电容器组件。

3. 发明授权

US07619317B2 Carrier structure for semiconductor chip and method for manufacturing the same 有权
标题翻译：半导体芯片的载体结构及其制造方法
公开(公告)号：US07619317B2
公开(公告)日：2009-11-17
申请号：US11984349
申请日：2007-11-16
申请人： Chung-Cheng Lien , Chia-Wei Chang
发明人： Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H01L23/28 , H05K1/18
CPC分类号： H01L23/5389 , H01L21/568 , H01L23/3121 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2924/01012 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/18162
摘要： A carrier structure for a semiconductor chip and a method for manufacturing the same are disclosed. The method includes the following steps: providing a carrier board having at least one through cavity, wherein a removable film is formed on the surface of the carrier board, and a semiconductor chip is temporarily fixed in the through cavity by the removable film; filling the gap between the through cavity of the carrier board and the semiconductor chip with an adhesive material in order to fix the semiconductor chip; and removing the removable film. The disclosed method can reduce the alignment error resulted from the tiny shift of the semiconductor chip caused by jitters before the semiconductor is fixed in the cavity, thereby to increase the accuracy of the alignment, to facilitate fine wiring, and to meet the trend toward compact size of semiconductor packages.
摘要翻译：公开了一种用于半导体芯片的载体结构及其制造方法。该方法包括以下步骤：提供具有至少一个通孔的载体板，其中在载体板的表面上形成可移除膜，并且半导体芯片通过可移除膜临时固定在通孔中; 用粘合剂材料填充载体板的通孔和半导体芯片之间的间隙以固定半导体芯片; 并移除可拆卸胶片。所公开的方法可以减少半导体在腔内固定之前由抖动引起的微小偏移导致的对准误差，从而提高对准的精度，以便于精细布线，并且满足紧凑的趋势半导体封装尺寸。

4. 发明申请

US20080224295A1 Package structure and stacked package module using the same 审中-公开
标题翻译：封装结构和堆叠封装模块使用相同
公开(公告)号：US20080224295A1
公开(公告)日：2008-09-18
申请号：US12073734
申请日：2008-03-10
申请人： Chung-Cheng Lien , Chia-Wei Chang
发明人： Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H01L23/498
CPC分类号： H01L23/13 , H01L23/3128 , H01L23/49816 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A package structure with chip embedded therein is disclosed, which comprises a circuit board having a first surface, an opposite second surface and a through cavity penetrating the circuit board, wherein the first surface of the circuit board has a plurality of first conductive pads and a plurality of wire bonding pads disposed thereon, and the second surface of the circuit board has a plurality of second conductive pads disposed thereon; and a chip embedded in the through cavity of the circuit board, wherein the gap between the through cavity and the chip is filled with a filling material, the chip has an active surface with a plurality of electrode pads and an inactive surface, and the electrode pads electrically connect to the wire bonding pads of the circuit board by a plurality of metal lines. The present invention further provides a package module using the aforementioned package structure.
摘要翻译：公开了一种嵌入其中的芯片的封装结构，其包括具有第一表面，相对的第二表面和穿透电路板的通孔的电路板，其中电路板的第一表面具有多个第一导电焊盘和多个引线接合焊盘设置在其上，并且电路板的第二表面具有设置在其上的多个第二导电焊盘; 以及嵌入在所述电路板的所述通孔中的芯片，其中所述通孔和所述芯片之间的间隙填充有填充材料，所述芯片具有具有多个电极焊盘和非活性表面的活性表面，并且所述电极衬垫通过多个金属线电连接到电路板的引线接合焊盘。本发明还提供一种使用上述封装结构的封装模块。

5. 发明申请

US20080047740A1 Circuit Board Assembly Having Passive Component and Stack Structure Thereof 审中-公开
标题翻译：具有被动元件和堆叠结构的电路板组件
公开(公告)号：US20080047740A1
公开(公告)日：2008-02-28
申请号：US11829540
申请日：2007-07-27
申请人： Chung-Cheng Lien , Chia-Wei Chang
发明人： Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H05K1/09 , H05K1/16 , H05K1/18
CPC分类号： H05K1/185 , H01L23/50 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/48 , H01L24/82 , H01L2224/04105 , H01L2224/24227 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01033 , H01L2924/01047 , H01L2924/01056 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H05K1/023 , H05K3/4602 , H05K2201/09536 , H05K2201/10674 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A circuit board assembly having at least a passive component and a stack structure of the circuit board are disclosed, including: a carrier board formed with a through opening for receiving a semiconductor component having an active surface on which electrode pads are formed; a dielectric layer formed on the carrier board and the semiconductor component and formed with openings to expose the electrode pads; a circuit layer formed on the dielectric layer and having conductive structures formed in the openings of the dielectric layer for electrically connecting the electrode pads, and a plurality of lands for mounting at least one passive component electrically connected to the circuit layer; and a circuit build-up structure formed on the dielectric layer, the circuit layer and the passive component, with conductive structures formed for electrically connecting the circuit layer.
摘要翻译：公开了一种至少具有电路板的无源部件和堆叠结构的电路板组件，包括：形成有用于接收具有形成有电极焊盘的有源表面的半导体部件的通孔的载体板; 形成在所述载体板和所述半导体部件上并形成有露出所述电极焊盘的开口的电介质层; 电介质层上形成的导电结构，形成在用于电连接电极焊盘的电介质层的开口中的导电结构;以及多个焊盘，用于安装电连接到电路层的至少一个无源部件; 以及形成在所述电介质层，所述电路层和所述无源部件上的电路积聚结构，其具有用于电连接所述电路层的导电结构。

6. 发明授权

US07656040B2 Stack structure of circuit board with semiconductor component embedded therein 有权
标题翻译：具有嵌入其中的半导体元件的电路板的堆叠结构
公开(公告)号：US07656040B2
公开(公告)日：2010-02-02
申请号：US11756403
申请日：2007-05-31
申请人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
发明人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H01L23/02 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/5389 , H01L24/24 , H01L24/48 , H01L24/82 , H01L25/105 , H01L2224/24227 , H01L2224/32145 , H01L2224/48091 , H01L2224/73265 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07811 , H01L2924/19041 , H05K1/186 , H05K3/323 , H05K3/4602 , H05K3/4614 , H05K2201/09536 , H05K2203/061 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A stack structure of circuit boards embedded with semiconductor components therein is proposed, which includes at least two semiconductor components embedded circuit boards, a plurality of conductive bumps, and at least one adhesive layer. The circuit boards are each formed with a circuit layer having a plurality of electrical connection pads. The conductive bumps are formed on the electrical connection pads of at least one of the circuit boards. The adhesive layer is formed between the circuit boards such that a portion of the adhesive layer between the conductive bumps and the electrical connection pads, or between the opposing conductive bumps, forms a conductive channel and thereby forms an electrical connection between the circuit boards.
摘要翻译：提出了嵌入其中的半导体部件的电路板的堆叠结构，其包括至少两个半导体部件嵌入式电路板，多个导电凸块和至少一个粘合剂层。电路板各自形成有具有多个电连接焊盘的电路层。导电凸块形成在至少一个电路板的电连接焊盘上。粘合剂层形成在电路板之间，使得导电凸块和电连接焊盘之间或相对的导电凸块之间的粘合剂层的一部分形成导电通道，从而在电路板之间形成电连接。

7. 发明申请

US20080237833A1 MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE 审中-公开
标题翻译：多芯片半导体封装结构
公开(公告)号：US20080237833A1
公开(公告)日：2008-10-02
申请号：US12047851
申请日：2008-03-13
申请人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
发明人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H01L23/49
CPC分类号： H01L21/6835 , H01L21/568 , H01L24/27 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L25/03 , H01L25/0657 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16145 , H01L2224/16225 , H01L2224/274 , H01L2224/2919 , H01L2224/32145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81801 , H01L2224/8385 , H01L2224/85 , H01L2225/0651 , H01L2924/00014 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A multi-chip semiconductor package structure is disclosed according to the present invention. The package structure includes: a carrier board having a first surface, a second surface, and at least one opening penetrating the first and second surfaces, the first and second surfaces each being formed with a plurality of electrically connecting pads thereon; a semiconductor component received in the opening and having first and second active surfaces, the first and second active surfaces each being formed with a plurality of electrode pads thereon; a plurality of first conductive elements electrically connected to the electrically connecting pads on the second surface of the carrier board and the electrode pads on the second active surface of the semiconductor component; a semiconductor chip having an active surface and an inactive surface, the active surface having a plurality of electrode pads electrically connected to the electrically connecting pads on the first surface of the carrier board and the electrode pads on the first active surface of the semiconductor component; and a molding material formed on a portion of the second surface of the carrier board and the second active surface of the semiconductor component to cover the first conductive elements. The present invention provides a modularized structure capable of electrically connecting to other modules or stacked devices as well as enhancing electrical performance.
摘要翻译：根据本发明公开了一种多芯片半导体封装结构。封装结构包括：承载板，具有第一表面，第二表面和穿过第一表面和第二表面的至少一个开口，第一和第二表面各自在其上形成有多个电连接焊盘; 半导体元件，其接收在所述开口中并且具有第一和第二有源表面，所述第一和第二有源表面各自在其上形成有多个电极焊盘; 电连接到载板的第二表面上的电连接焊盘和半导体部件的第二有源表面上的电极焊盘的多个第一导电元件; 具有活性表面和非活性表面的半导体芯片，所述活性表面具有电连接到所述载体板的第一表面上的电连接焊盘和所述半导体部件的第一有源表面上的电极焊盘的多个电极焊盘; 以及模制材料，其形成在所述载板的所述第二表面的一部分和所述半导体部件的所述第二有源表面上以覆盖所述第一导电元件。本发明提供一种能够电连接到其他模块或堆叠装置以及增强电性能的模块化结构。

8. 发明申请

US20080237832A1 MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE 审中-公开
标题翻译：多芯片半导体封装结构
公开(公告)号：US20080237832A1
公开(公告)日：2008-10-02
申请号：US12047810
申请日：2008-03-13
申请人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
发明人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H01L23/49
CPC分类号： H01L25/0657 , H01L24/16 , H01L25/03 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2225/06513 , H01L2225/06517 , H01L2225/06586 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A multi-chip semiconductor package structure is disclosed, including a carrier board having a first and an opposing second surfaces and formed with at least an opening penetrating the first and second surfaces, wherein a plurality of electrically connecting pads are formed on the first and second surfaces of the carrier board, respectively; a semiconductor component disposed in the opening, the semiconductor component having a first and a second active surfaces each with a plurality of electrode pads being formed thereon; a third semiconductor chip having an active surface and an inactive surface, the active surface having a plurality of electrode pads formed thereon for electrically connecting with the electrically connecting pads on the first surface of the carrier board and the electrode pads on the first active surface of the semiconductor component; and a fourth semiconductor chip having an active surface and an inactive surface, the active surface having a plurality of electrode pads formed thereon for electrically connecting with the electrically connecting pads on the second surface of the carrier board and the electrode pads on the second active surface of the semiconductor component, thereby providing a modularized structure for electrically connecting with other modules or stack devices and enhancing electrical functionality.
摘要翻译：公开了一种多芯片半导体封装结构，其包括具有第一和相对的第二表面的载体板，并形成有至少一个贯穿第一和第二表面的开口，其中多个电连接焊盘形成在第一和第二表面上分别为载板的表面; 设置在所述开口中的半导体部件，所述半导体部件具有在其上形成有多个电极焊盘的第一和第二有源面; 具有活性表面和非活性表面的第三半导体芯片，所述活性表面具有形成在其上的多个电极焊盘，用于与载体板的第一表面上的电连接焊盘和第一有源表面上的电极焊盘电连接半导体元件; 以及具有活性表面和非活性表面的第四半导体芯片，所述活性表面具有形成在其上的多个电极焊盘，用于与所述载体板的第二表面上的电连接焊盘和所述第二有源表面上的电极焊盘电连接从而提供用于与其他模块或堆叠装置电连接并增强电功能性的模块化结构。

9. 发明申请

US20080237831A1 MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE 审中-公开
标题翻译：多芯片半导体封装结构
公开(公告)号：US20080237831A1
公开(公告)日：2008-10-02
申请号：US12015578
申请日：2008-01-17
申请人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
发明人： Shih-Ping Hsu , Chung-Cheng Lien , Chia-Wei Chang
IPC分类号： H01L23/538
CPC分类号： H01L23/3128 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/32145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06555 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15331 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A multi-chip semiconductor package structure is disclosed according to the present invention, the package structure includes: a carrier board having a first surface, a second surface, and at least an opening penetrating the first and second surfaces, the first and second surfaces each having electrically connecting pads; a semiconductor component received in the opening, the semiconductor component has a first active surface and a second active surface, and each of the first and second active surfaces has a plurality of electrode pads; a plurality of first conductive elements electrically connected to the electrically connecting pads of the first and second surfaces of the carrier board with the electrode pads of the first and second active surfaces of the semiconductor component; and a molding material formed on a portion of the first surface of the carrier board, the first active surface of the semiconductor component, a portion of the second surface of the carrier board, and the second active surface of the semiconductor component, and adapted to cover the first conductive elements; thereby forming a module structure for electrical connection with other modules or stacked devices, and further enhancing electrical functions.
摘要翻译：根据本发明公开了一种多芯片半导体封装结构，封装结构包括：承载板，其具有第一表面，第二表面和至少穿过第一表面和第二表面的开口，第一和第二表面各自具有电连接垫; 所述半导体元件具有第一有源表面和第二有源表面，并且所述第一和第二有源表面中的每一个具有多个电极焊盘; 多个第一导电元件，电连接到载体板的第一和第二表面的电连接焊盘与半导体部件的第一和第二有源表面的电极焊盘; 以及模制材料，其形成在所述载板的所述第一表面的一部分上，所述半导体部件的所述第一有源表面，所述载体板的第二表面的一部分和所述半导体部件的所述第二有源表面，并且适于覆盖第一导电元件; 从而形成用于与其他模块或堆叠设备电连接的模块结构，并且进一步增强电功能。

10. 发明申请

US20080230892A1 Chip package module 审中-公开
标题翻译：芯片封装模块
公开(公告)号：US20080230892A1
公开(公告)日：2008-09-25
申请号：US12076679
申请日：2008-03-21
申请人： Chia-Wei CHANG , Chung-Cheng Lien
发明人： Chia-Wei CHANG , Chung-Cheng Lien
IPC分类号： H01L23/49
CPC分类号： H05K1/183 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L25/105 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/83101 , H01L2224/85 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/1011 , H01L2225/1058 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/3011 , H05K3/4623 , H05K3/4697 , H05K2201/09536 , H05K2201/10515 , H05K2201/10674 , H05K2203/049 , H05K2203/1572 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A chip package module is disclosed, which comprises a core plate and two rigid plates individually having a circuit layer. The core plate is sandwiched in between the two rigid plates to form a composite circuit board. Furthermore, the two rigid plates individually have a cavity to expose the surface of the core plate. In addition, the cavities individually have at least one chip disposed therein, and each chip electrically connects to the composite circuit board. The present invention reduces the height of the package module and makes the package module lighter and smaller.
摘要翻译：公开了一种芯片封装模块，其包括芯板和两个单独具有电路层的刚性板。将芯板夹在两个刚性板之间以形成复合电路板。此外，两个刚性板单独地具有用于露出芯板的表面的空腔。此外，空腔单独地具有设置在其中的至少一个芯片，并且每个芯片电连接到复合电路板。本发明降低了封装模块的高度，并使封装模块更轻更小。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式