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1. 发明授权

US07360753B1 Cable tightening device having anti-theft function 失效
标题翻译：电缆紧固装置具有防盗功能
公开(公告)号：US07360753B1
公开(公告)日：2008-04-22
申请号：US11645930
申请日：2006-12-27
申请人： Chia-Sheng Lin
发明人： Chia-Sheng Lin
IPC分类号： B25B9/00
CPC分类号： B25B25/00 , B60P7/083 , Y10T24/2113 , Y10T24/2117 , Y10T24/2147
摘要： A cable tightening device includes a fixed unit, a rotation member rotatably mounted on the fixed unit, a movable unit mounted on the rotation member and movable relative to the fixed unit to drive the rotation member to rotate relative to the fixed unit in a oneway direction, and a locking unit mounted between the fixed unit and the movable unit to releasably lock the movable unit onto the fixed unit. Thus, the movable unit is locked onto the fixed unit by the locking unit to lock the cable tightening device and the cable so as to protect the cargo wound by the cable, thereby achieving an anti-theft purpose.
摘要翻译：电缆紧固装置包括固定单元，可旋转地安装在固定单元上的旋转构件，安装在旋转构件上并可相对于固定单元移动的可移动单元，以驱动旋转构件相对于固定单元在单向方向上旋转以及安装在固定单元和可移动单元之间以将可移动单元可释放地锁定到固定单元上的锁定单元。因此，可动单元通过锁定单元锁定在固定单元上，以锁定电缆紧固装置和电缆，以保护由电缆缠绕的货物，从而实现防盗目的。

2. 发明授权

US06837642B1 Length adjustment mechanism of expandable rod 失效
标题翻译：膨胀杆长度调节机构
公开(公告)号：US06837642B1
公开(公告)日：2005-01-04
申请号：US10400682
申请日：2003-03-28
申请人： Chia-Sheng Lin
发明人： Chia-Sheng Lin
IPC分类号： F16B7/10
CPC分类号： F16B7/105 , Y10T74/18976 , Y10T74/19614 , Y10T74/1967 , Y10T403/32467 , Y10T403/7077
摘要： The length adjustment of an expandable rod is attained by a drive gear and a driven gear which is engaged with the drive gear and gear slots of an inner tube of the expandable rod. The inner tube is located inside an outer tube of the expandable rod by a locating member which is provided with a locating projection capable of locating in one of the gear slots of the inner tube.
摘要翻译：可扩展杆的长度调节通过驱动齿轮和从动齿轮来实现，驱动齿轮和从动齿轮与可扩展杆的内管的驱动齿轮和齿轮槽接合。内管通过定位构件位于可扩张杆的外管内，定位构件设置有能够定位在内管的齿轮槽之一中的定位突起。

3. 发明授权

US09653500B2 Optical cover plate with improved solder mask dam on glass for image sensor package and fabrication method thereof 有权
公开(公告)号：US09653500B2
公开(公告)日：2017-05-16
申请号：US13053209
申请日：2011-03-22
申请人： Chia-Sheng Lin
发明人： Chia-Sheng Lin
IPC分类号： H01L33/00 , H01L27/146 , H01L23/48 , H01L23/00
CPC分类号： H01L27/14618 , H01L23/481 , H01L24/05 , H01L24/13 , H01L27/14687 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/05567 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/94 , H01L2924/0002 , H01L2224/11 , H01L2224/03 , H01L2924/014 , H01L2224/05552
摘要： An optical cover plate for image sensor package includes a transparent substrate, at least an annular dam structure, and a barrier layer. The annular dam structure is disposed on the transparent substrate and encompasses a light-receiving area. The barrier layer conformally covers at least a sidewall of the annular dam structure. A method of manufacturing the optical cover plate, an image sensor package and fabrication method thereof are also disclosed.

4. 发明授权

US08432032B2 Chip package and fabrication method thereof 有权
标题翻译：芯片封装及其制造方法
公开(公告)号：US08432032B2
公开(公告)日：2013-04-30
申请号：US12687093
申请日：2010-01-13
申请人： Chia-Sheng Lin , Chia-Lun Tsai , Chang-Sheng Hsu , Po-Han Lee
发明人： Chia-Sheng Lin , Chia-Lun Tsai , Chang-Sheng Hsu , Po-Han Lee
IPC分类号： H01L23/48
CPC分类号： H01L24/73 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/29 , H01L24/94 , H01L2224/0231 , H01L2224/0401 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05655 , H01L2224/13022 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/01075 , H01L2924/014 , H01L2924/14 , H01L2924/1461 , H01L2924/3512 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole.
摘要翻译：提供了芯片封装及其制造方法。芯片封装包括具有第一表面和相对的第二表面的半导体衬底。在第一表面上形成有从第一表面延伸到第二表面的通孔。导电迹线层形成在第一表面和通孔中。在通孔中形成缓冲塞，在第一表面和通孔中形成保护层。

5. 发明申请

US20120133049A1 Process of Fabricating Semiconductor Device and Through Substrate via, and Through Substrate via Structure Therefrom 有权
标题翻译：制造半导体器件和通过衬底通过衬底通过结构的工艺
公开(公告)号：US20120133049A1
公开(公告)日：2012-05-31
申请号：US13303208
申请日：2011-11-23
申请人： Chia-Sheng Lin , Chien-Hui Chen , Bing-Siang Chen , Tzu-Hsiang Hung
发明人： Chia-Sheng Lin , Chien-Hui Chen , Bing-Siang Chen , Tzu-Hsiang Hung
IPC分类号： H01L23/538 , H01L21/50 , H01L21/768
CPC分类号： H01L21/76898 , H01L23/5225 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device, a process of fabricating a through substrate via and a substrate with through vias are provided. The substrate with through vias includes a semiconductor substrate having a back surface and a via penetrating the back surface, a metal layer, a first insulating layer and a second insulating layer. The first insulating layer is formed on the back surface of the substrate and has an opening connected to the through via. The second insulating layer is formed on the first insulating layer and has a portion extending into the opening and the via to form a trench insulating layer. The bottom of the trench insulating layer is etched back to form a footing portion at the corner of the via. The footing portion has a height less than a total height of the first and second insulating layers.
摘要翻译：提供了制造半导体器件的方法，制造通孔基板通孔的工艺和具有通孔的基板。具有贯通孔的基板包括具有后表面和穿过背面的通孔的半导体基板，金属层，第一绝缘层和第二绝缘层。第一绝缘层形成在基板的背面，并且具有连接到通孔的开口。第二绝缘层形成在第一绝缘层上，并且具有延伸到开口中的部分和通孔以形成沟槽绝缘层。沟槽绝缘层的底部被回蚀以在通孔的拐角处形成基部。所述基脚部分的高度小于所述第一和第二绝缘层的总高度。

6. 发明申请

US20090289318A1 ELECTRONICS DEVICE PACKAGE AND FABRICATION METHOD THEREOF 有权
标题翻译：电子设备包装及其制造方法
公开(公告)号：US20090289318A1
公开(公告)日：2009-11-26
申请号：US12398946
申请日：2009-03-05
申请人： Chia-Sheng Lin , Yu-Ting Huang , Chih-Lung Lai
发明人： Chia-Sheng Lin , Yu-Ting Huang , Chih-Lung Lai
IPC分类号： H01L23/52 , H01L21/00 , H01L31/02
CPC分类号： H01L27/14618 , H01L27/14621 , H01L27/14627 , H01L27/14685 , H01L2224/05001 , H01L2224/05548 , H01L2224/11
摘要： Embodiments provide an electronic device package and a method for fabricating thereof. A semiconductor chip has a substrate. A supporting brick is separated from the substrate by a certain distance. A bonding pad having a surface is disposed across the substrate and the supporting brick.
摘要翻译：实施例提供一种电子器件封装及其制造方法。半导体芯片具有基板。支撑砖与衬底分离一定距离。具有表面的焊盘横跨衬底和支撑砖设置。

7. 发明申请

US20060077876A1 Optical recording media and method of fabricating the same 审中-公开
标题翻译：光记录介质及其制造方法
公开(公告)号：US20060077876A1
公开(公告)日：2006-04-13
申请号：US11221782
申请日：2005-09-09
申请人： Chia-Sheng Lin , Rei-Feng Chung , Hsiang-Ling Huang
发明人： Chia-Sheng Lin , Rei-Feng Chung , Hsiang-Ling Huang
IPC分类号： G11B7/24
CPC分类号： G11B7/252 , G11B7/2403 , G11B7/246 , G11B7/2533 , G11B7/2534 , G11B7/256 , G11B7/2578 , G11B7/259 , G11B7/266 , G11B2007/25706 , G11B2007/25708 , G11B2007/2571 , G11B2007/25713 , G11B2007/25715 , G11B2007/25716
摘要： A recording medium. A recording layer is disposed overlying a substrate. A moisture barrier layer is disposed overlying the recording layer. A reflecting layer is disposed overlying the moisture barrier layer. An adhesion layer is disposed overlying the reflecting layer. Due to the static moisture barrier layer interposed between the reflecting layer and the recording layer in an embodiment of the invention, moisture interpenetration from ambience can be diminished to improve weather and corrosion resistance of the recording medium.
摘要翻译：记录媒体。记录层设置在衬底上。防潮层设置在记录层上。反射层设置在覆盖湿气阻挡层上。粘合层设置在反射层上。由于在本发明的一个实施方案中介于反射层和记录层之间的静态防潮层，可以减少气氛从气氛渗透，以改善记录介质的耐候性和耐腐蚀性。

8. 发明授权

US09768223B2 Electronics device package and fabrication method thereof 有权
公开(公告)号：US09768223B2
公开(公告)日：2017-09-19
申请号：US13333899
申请日：2011-12-21
申请人： Chia-Sheng Lin , Yu-Ting Huang
发明人： Chia-Sheng Lin , Yu-Ting Huang
IPC分类号： H01L31/18 , H01L27/146 , H01L23/00
CPC分类号： H01L27/14683 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/48 , H01L24/94 , H01L27/14618 , H01L2224/0401 , H01L2224/04042 , H01L2224/05624 , H01L2224/05647 , H01L2224/13 , H01L2224/13101 , H01L2224/48091 , H01L2224/48463 , H01L2924/00014 , H01L2924/1461 , H01L2224/45099 , H01L2924/00 , H01L2924/014
摘要： Embodiments provide a chip device package and a method for fabricating thereof. A semiconductor chip has a substrate. A supporting brick is separated from the substrate by a certain distance. A bonding pad having a surface is disposed across the substrate and the supporting brick. A bonding wire is electrically connected to the bonding pad.

9. 发明授权

US08952519B2 Chip package and fabrication method thereof 有权
标题翻译：芯片封装及其制造方法
公开(公告)号：US08952519B2
公开(公告)日：2015-02-10
申请号：US12816301
申请日：2010-06-15
申请人： Chia-Sheng Lin , Po-Han Lee
发明人： Chia-Sheng Lin , Po-Han Lee
IPC分类号： H01L23/48 , H01L23/538 , H01L21/48 , H01L23/00
CPC分类号： H01L21/76898 , H01L21/481 , H01L21/76897 , H01L23/3178 , H01L23/3192 , H01L23/5389 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/94 , H01L27/14618 , H01L27/14636 , H01L2224/02372 , H01L2224/0345 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/05548 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05655 , H01L2224/06181 , H01L2224/1132 , H01L2224/11462 , H01L2224/11849 , H01L2224/13022 , H01L2224/131 , H01L2224/20 , H01L2224/94 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01047 , H01L2924/01075 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/00
摘要： A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposing second surface. A spacer is disposed under the second surface of the semiconductor substrate and a cover plate is disposed under the spacer. A recessed portion is formed adjacent to a sidewall of the semiconductor substrate, extending from the first surface of the semiconductor substrate to at least the spacer. Then, a protection layer is disposed over the first surface of the semiconductor substrate and in the recessed portion.
摘要翻译：提供了芯片封装及其制造方法。芯片封装包括具有第一表面和相对的第二表面的半导体衬底。间隔件设置在半导体衬底的第二表面下方，并且覆盖板设置在间隔件下方。形成与半导体衬底的侧壁相邻的凹部，从半导体衬底的第一表面延伸到至少间隔件。然后，保护层设置在半导体衬底的第一表面和凹部中。

10. 发明授权

US08742564B2 Chip package and method for forming the same 有权
标题翻译：芯片封装及其形成方法
公开(公告)号：US08742564B2
公开(公告)日：2014-06-03
申请号：US13350520
申请日：2012-01-13
申请人： Bai-Yao Lou , Tsang-Yu Liu , Chia-Sheng Lin , Tzu-Hsiang Hung
发明人： Bai-Yao Lou , Tsang-Yu Liu , Chia-Sheng Lin , Tzu-Hsiang Hung
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L23/481 , H01L21/76898 , H01L23/04 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/32 , H01L24/73 , H01L2224/02371 , H01L2224/02372 , H01L2224/0392 , H01L2224/0401 , H01L2224/04026 , H01L2224/05025 , H01L2224/05548 , H01L2224/05572 , H01L2224/056 , H01L2224/05687 , H01L2224/0569 , H01L2224/06181 , H01L2224/13022 , H01L2224/13024 , H01L2224/32225 , H01L2224/73153 , H01L2924/00013 , H01L2924/00014 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/00012 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening.
摘要翻译：本发明的实施例提供一种芯片封装，其包括具有第一表面和第二表面的基板; 位于所述第一表面上的导电垫结构; 位于所述基板的所述第一表面上的电介质层和所述导电焊盘结构，其中所述电介质层具有暴露所述导电焊盘结构的一部分的开口; 以及位于电介质层上并填充到开口中的盖层。

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