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1. 发明申请

US20070004112A1 METHOD OF FORMING THIN FILM TRANSISTOR AND METHOD OF REPAIRING DEFECTS IN POLYSILICON LAYER 审中-公开
标题翻译：形成薄膜晶体的方法和修复多晶硅层缺陷的方法
公开(公告)号：US20070004112A1
公开(公告)日：2007-01-04
申请号：US11161210
申请日：2005-07-27
申请人： Chia-Nan Shen , Cheng-Nan Hsieh , Hsi-Ming Chang
发明人： Chia-Nan Shen , Cheng-Nan Hsieh , Hsi-Ming Chang
IPC分类号： H01L21/8234
CPC分类号： H01L29/78675 , H01L29/66757
摘要： A method of forming a thin film transistor is described. A polysilicon layer is formed over a substrate, wherein the polysilicon layer has a first region, a second region and a channel region between the first and second regions. A nitrogen doping process is carried out to dope nitrogen into the polysilicin layer. A gate insulating layer and a gate are sequentially formed over the polysilicon layer, wherein the gate is formed over the channel region. A doping process is performed so as to form a source and a drain in the first region and second region, respectively.
摘要翻译：描述形成薄膜晶体管的方法。在衬底上形成多晶硅层，其中多晶硅层在第一和第二区域之间具有第一区域，第二区域和沟道区域。进行氮掺杂工艺以将氮掺入聚硅酸层中。栅极绝缘层和栅极依次形成在多晶硅层上，其中栅极形成在沟道区域上。执行掺杂工艺以分别在第一区域和第二区域中形成源极和漏极。

2. 发明申请

US20060110868A1 Production of lightly doped drain of low-temperature poly-silicon thin film transistor 审中-公开
标题翻译：生产低温多晶硅薄膜晶体管的轻掺杂漏极
公开(公告)号：US20060110868A1
公开(公告)日：2006-05-25
申请号：US11023436
申请日：2004-12-29
申请人： Chia-Nan Shen , Cheng-Nan Hsieh , Po-Chih Liu
发明人： Chia-Nan Shen , Cheng-Nan Hsieh , Po-Chih Liu
IPC分类号： H01L21/84
CPC分类号： H01L29/66757 , H01L29/78621
摘要： A method is disclosed to make a lightly doped drain of a low-temperature poly-silicon thin film transistor. Nitrogen is implanted during steps of doping the source and the drain so as to suppress the spreading of the other types of dope so that the poly-silicon layer forms a shallow interface lightly doped drain after annealing. Implantation of nitrogen takes place before or after the other types of dope. Nitrogen is implanted to a depth no greater than that of the other types of dope. The present is simple, improves hot carrier effect and repairs flaws in the poly-silicon layer.
摘要翻译：公开了一种制造低温多晶硅薄膜晶体管的轻掺杂漏极的方法。在掺杂源极和漏极的步骤期间注入氮气，以抑制其它类型的掺杂物的扩散，使得多晶硅层在退火之后形成浅界面轻掺杂漏极。在其他类型的涂料之前或之后进行氮的植入。氮被植入到不大于其它类型的掺杂剂的深度的深度。本发明简单，改善了热载体效应，并修复了多晶硅层的缺陷。

3. 发明申请

US20060199337A1 THIN FILM TRANSISTOR 审中-公开
标题翻译：薄膜晶体管
公开(公告)号：US20060199337A1
公开(公告)日：2006-09-07
申请号：US11306898
申请日：2006-01-16
申请人： Hsi-Ming Chang , Chia-Nan Shen
发明人： Hsi-Ming Chang , Chia-Nan Shen
IPC分类号： H01L21/84 , H01L21/336 , H01L31/00
CPC分类号： H01L21/26513 , H01L29/66757 , H01L29/78621 , H01L29/78624
摘要： A thin film transistor includes a substrate, a polysilicon layer, a patterned gate dielectric layer, a gate layer, a channel region, a source region, a drain region, and a LDD region. The polysilicon layer is positioned over the substrate. The patterned gate dielectric layer is positioned over the polysilicon layer. The patterned gate dielectric layer has a third and a fourth portion, wherein the fourth portion has a thickness smaller than that of the third portion. The gate layer is positioned over the third portion. The source region and the drain region are positioned in the polysilicon layer under the fourth portion. The channel region is positioned in the polysilicon layer under the gate layer. The LDD region is positioned in the polysilicon layer under the third portion and is between the channel region and the source region or between the channel region and the drain region.
摘要翻译：薄膜晶体管包括衬底，多晶硅层，图案化栅极介电层，栅极层，沟道区，源极区，漏极区和LDD区。多晶硅层位于衬底上。图案化的栅介质层位于多晶硅层上。图案化的栅介质层具有第三部分和第四部分，其中第四部分的厚度小于第三部分的厚度。栅极层位于第三部分上。源极区域和漏极区域位于第四部分下面的多晶硅层中。沟道区位于栅极层下面的多晶硅层中。 LDD区域位于第三部分下面的多晶硅层中，并且位于沟道区域和源极区域之间或沟道区域和漏极区域之间。

4. 发明授权

US07041540B1 Thin film transistor and method for fabricating the same 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US07041540B1
公开(公告)日：2006-05-09
申请号：US10906041
申请日：2005-02-01
申请人： Hsi-Ming Chang , Chia-Nan Shen
发明人： Hsi-Ming Chang , Chia-Nan Shen
IPC分类号： H01L21/84
CPC分类号： H01L29/66757 , H01L21/26513 , H01L29/78621 , H01L29/78624
摘要： A thin film transistor includes a substrate, a polysilicon layer, a patterned gate dielectric layer, a gate layer, a channel region, a source region, a drain region, and a LDD region. The polysilicon layer is positioned over the substrate. The patterned gate dielectric layer is positioned over the polysilicon layer. The patterned gate dielectric layer has a third and a fourth portion, wherein the fourth portion has a thickness smaller than that of the third portion. The gate layer is positioned over the third portion. The source region and the drain region are positioned in the polysilicon layer under the fourth portion. The channel region is positioned in the polysilicon layer under the gate layer. The LDD region is positioned in the polysilicon layer under the third portion and is between the channel region and the source region or between the channel region and the drain region.
摘要翻译：薄膜晶体管包括衬底，多晶硅层，图案化栅极介电层，栅极层，沟道区，源极区，漏极区和LDD区。多晶硅层位于衬底上。图案化的栅介质层位于多晶硅层上。图案化的栅介质层具有第三部分和第四部分，其中第四部分的厚度小于第三部分的厚度。栅极层位于第三部分上。源极区域和漏极区域位于第四部分下面的多晶硅层中。沟道区位于栅极层下面的多晶硅层中。 LDD区域位于第三部分下面的多晶硅层中，并且位于沟道区域和源极区域之间或沟道区域和漏极区域之间。

5. 发明授权

US07192815B2 Method of manufacturing a thin film transistor 有权
标题翻译：制造薄膜晶体管的方法
公开(公告)号：US07192815B2
公开(公告)日：2007-03-20
申请号：US10904513
申请日：2004-11-15
申请人： Chia-Nan Shen
发明人： Chia-Nan Shen
IPC分类号： H01L21/84
CPC分类号： H01L29/66757 , H01L21/84 , H01L29/78621
摘要： A method of manufacturing a thin film transistor is described. A polysilicon island is formed over a substrate. A gate insulating layer is formed over the substrate to cover the polysilicin island. A gate is formed on the gate insulating layer above the polysilicon island. A passivation layer is formed over the substrate to cover the gate and the gate insulating layer. An ion implanting process is carried out to form a source/drain in the polysilicon island beside the gate, wherein a region between the source and the drain is a channel. After the first passivation layer is removed, a patterned dielectric layer is formed over the substrate, wherein the dielectric layer exposes a portion of the source/drain. A source/drain conductive layer is formed over the dielectric layer and is electrically connected to the source/drain.
摘要翻译：描述制造薄膜晶体管的方法。在衬底上形成多晶硅岛。在衬底上形成栅极绝缘层以覆盖多晶硅岛。栅极形成在多晶硅岛上方的栅极绝缘层上。在衬底上形成钝化层以覆盖栅极和栅极绝缘层。进行离子注入工艺以在栅极旁边的多晶硅岛中形成源极/漏极，其中源极和漏极之间的区域是沟道。在去除第一钝化层之后，在衬底上形成图案化的介电层，其中电介质层露出源极/漏极的一部分。源极/漏极导电层形成在电介质层上并且电连接到源极/漏极。

6. 发明申请

US20060105506A1 METHOD OF MANUFACTURING A THIN FILM TRANSISTOR 有权
标题翻译：制造薄膜晶体管的方法
公开(公告)号：US20060105506A1
公开(公告)日：2006-05-18
申请号：US10904513
申请日：2004-11-15
申请人： Chia-Nan Shen
发明人： Chia-Nan Shen
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L29/66757 , H01L21/84 , H01L29/78621
摘要： A method of manufacturing a thin film transistor is described. A polysilicon island is formed over a substrate. A gate insulating layer is formed over the substrate to cover the polysilicin island. A gate is formed on the gate insulating layer above the polysilicon island. A passivation layer is formed over the substrate to cover the gate and the gate insulating layer. An ion implanting process is carried out to form a source/drain in the polysilicon island beside the gate, wherein a region between the source and the drain is a channel. After the first passivation layer is removed, a patterned dielectric layer is formed over the substrate, wherein the dielectric layer exposes a portion of the source/drain. A source/drain conductive layer is formed over the dielectric layer and is electrically connected to the source/drain.
摘要翻译：描述制造薄膜晶体管的方法。在衬底上形成多晶硅岛。在衬底上形成栅极绝缘层以覆盖多晶硅岛。栅极形成在多晶硅岛上方的栅极绝缘层上。在衬底上形成钝化层以覆盖栅极和栅极绝缘层。进行离子注入工艺以在栅极旁边的多晶硅岛中形成源极/漏极，其中源极和漏极之间的区域是沟道。在去除第一钝化层之后，在衬底上形成图案化的介电层，其中电介质层露出源极/漏极的一部分。源极/漏极导电层形成在电介质层上并且电连接到源极/漏极。

7. 发明授权

US07425477B2 Manufacturing method of thin film transistor including implanting ions through polysilicon island and into underlying buffer layer 有权
标题翻译：薄膜晶体管的制造方法，包括通过多晶硅岛注入离子并进入下面的缓冲层
公开(公告)号：US07425477B2
公开(公告)日：2008-09-16
申请号：US11306105
申请日：2005-12-16
申请人： Chia-Nan Shen , Wen-Chun Yeh , Chia-Chien Chen , Bing-Wei Wu , Hung-Chi Liao
发明人： Chia-Nan Shen , Wen-Chun Yeh , Chia-Chien Chen , Bing-Wei Wu , Hung-Chi Liao
IPC分类号： H01L21/84
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1288
摘要： A manufacturing method of a thin film transistor is provided. A buffer layer is formed on a substrate, and then a first and a second poly-silicon island are formed thereon. A gate-insulating layer is formed on the substrate, and a first and a second gate are formed thereon. A sacrificed layer is formed on the substrate and a photo-resist layer is formed thereon. The sacrificed layer above the first poly-silicon island is removed by using the photo-resist layer as a mask. A first ion implantation process is performed to form a first source/drain. The photo-resist layer is removed and a second ion implantation process is performed to form a second source/drain. At the same time, the second ion implantation process is used to implant ions into the buffer layer below the two sides of the second gate. A lightly-doped ion implantation process is performed after removing the sacrificed layer.
摘要翻译：提供了薄膜晶体管的制造方法。在衬底上形成缓冲层，然后在其上形成第一和第二多晶硅岛。在基板上形成栅极绝缘层，在其上形成第一和第二栅极。在基板上形成牺牲层，并在其上形成光致抗蚀剂层。通过使用光致抗蚀剂层作为掩模去除第一多晶硅岛上方的牺牲层。执行第一离子注入工艺以形成第一源极/漏极。去除光致抗蚀剂层，并执行第二离子注入工艺以形成第二源极/漏极。同时，使用第二离子注入工艺将离子注入到位于第二栅极两侧下方的缓冲层中。在去除牺牲层后进行轻掺杂离子注入工艺。

8. 发明申请

US20070122949A1 MANUFACTURING METHOD OF THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管的制造方法
公开(公告)号：US20070122949A1
公开(公告)日：2007-05-31
申请号：US11306105
申请日：2005-12-16
申请人： Chia-Nan Shen , Wen-Chun Yeh , Chia-Chien Chen , Bing-Wei Wu , Hung-Chi Liao
发明人： Chia-Nan Shen , Wen-Chun Yeh , Chia-Chien Chen , Bing-Wei Wu , Hung-Chi Liao
IPC分类号： H01L21/84
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1288
摘要： A manufacturing method of a thin film transistor is provided. A buffer layer is formed on a substrate, and then a first and a second poly-silicon island are formed thereon. A gate-insulating layer is formed on the substrate, and a first and a second gate are formed thereon. A sacrificed layer is formed on the substrate and a photo-resist layer is formed thereon. The sacrificed layer above the first poly-silicon island is removed by using the photo-resist layer as a mask. A first ion implantation process is performed to form a first source/drain. The photo-resist layer is removed and a second ion implantation process is performed to form a second source/drain. At the same time, the second ion implantation process is used to implant ions into the buffer layer below the two sides of the second gate. A lightly-doped ion implantation process is performed after removing the sacrificed layer.
摘要翻译：提供了薄膜晶体管的制造方法。在衬底上形成缓冲层，然后在其上形成第一和第二多晶硅岛。在基板上形成栅极绝缘层，在其上形成第一和第二栅极。在基板上形成牺牲层，并在其上形成光致抗蚀剂层。通过使用光致抗蚀剂层作为掩模去除第一多晶硅岛上方的牺牲层。执行第一离子注入工艺以形成第一源极/漏极。去除光致抗蚀剂层，并执行第二离子注入工艺以形成第二源极/漏极。同时，使用第二离子注入工艺将离子注入到位于第二栅极两侧下方的缓冲层中。在去除牺牲层后进行轻掺杂离子注入工艺。

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