专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090135978A1 Apparatus and method for estimating and compensating sampling frequency offset 审中-公开
标题翻译：用于估计和补偿采样频率偏移的装置和方法
公开(公告)号：US20090135978A1
公开(公告)日：2009-05-28
申请号：US12073819
申请日：2008-03-11
申请人： Chi-Tung Chang , Tzu-Wen Sung , Chuen-Heng Wang , Yu-Ling Chen
发明人： Chi-Tung Chang , Tzu-Wen Sung , Chuen-Heng Wang , Yu-Ling Chen
IPC分类号： H04L7/00 , H04L25/00
CPC分类号： H04L27/2657 , H04L27/0014 , H04L27/2675 , H04L2027/0067
摘要： An apparatus and method for estimating and compensating sampling frequency offset are disclosed. Particularly, a linear mathematical scheme is employed to calculate the related phase difference for saving use of multipliers and storage circuit used for sampling frequency offset estimation and compensation in the conventional art. The preferred embodiment of the invention has a first step to receive signals by the offset estimating circuit. Next, the phase value for each signal is calculated, and the pilot signal therein is retrieved. Next, a phase difference is obtained by subtraction operation between the received symbols and the delayed pilot symbols. And a circuit for storing the phase differences is incorporated. Next, a phase difference between the adjacent symbols is obtained by accumulating the phases and processing the least-error-sum-of-squares operation. Therefore, an estimation value of the sampling frequency offset of a communication system is obtained, and further to compensate the offset.
摘要翻译：公开了一种用于估计和补偿采样频率偏移的装置和方法。特别地，采用线性数学方案来计算用于节省使用乘法器的相关相位差和用于采样频率偏移估计和补偿的存储电路。本发明的优选实施例具有通过偏移估计电路接收信号的第一步骤。接下来，计算每个信号的相位值，并且检索其中的导频信号。接下来，通过在接收到的符号和延迟的导频符号之间的减法运算获得相位差。并且并入存储相位差的电路。接下来，相邻符号之间的相位差通过累积相位和处理最小二乘方差运算来获得。因此，获得通信系统的采样频率偏移的估计值，并进一步补偿偏移。

2. 发明申请

US20100124175A1 Apparatus and method for adaptively calculating symbolic start position 审中-公开
标题翻译：自适应计算符号起始位置的装置和方法
公开(公告)号：US20100124175A1
公开(公告)日：2010-05-20
申请号：US12292223
申请日：2008-11-14
申请人： Chi-Tung Chang , Tzu-Wen Sung , Yu-Ling Chen
发明人： Chi-Tung Chang , Tzu-Wen Sung , Yu-Ling Chen
IPC分类号： H04J1/16 , H04L12/56
CPC分类号： H04L7/042 , H04L27/2656 , H04L27/2675 , H04L27/2692
摘要： An apparatus and a method for adaptively calculating a start position of a series of symbols are provided. The method is applied to a frame synchronization circuit that implements the apparatus for calculating the symbolic start position of a packet-switching communication system. Even under the situations such as higher frequency offset, the frequency offset value approaching zero or unstable frequency offset, the frame synchronization circuit using the claimed method still can estimate the symbolic start position. The preferred method includes a first step of retrieving the signals in a unit of packets, and calculating their delay correlation value. Next, a control circuit is incorporated to retrieve multiple groups of symbols, and to set the parameters of the systems as a basis for identifying the system's property. After that, it's to estimate the symbolic start position.
摘要翻译：提供了一种用于自适应地计算一系列符号的开始位置的装置和方法。该方法应用于实现用于计算分组交换通信系统的符号开始位置的装置的帧同步电路。即使在较高的频率偏移，频率偏移值接近零或不稳定的频率偏移的情况下，使用所要求保护的方法的帧同步电路仍然可以估计符号开始位置。优选的方法包括以分组为单位检索信号并计算其延迟相关值的第一步骤。接下来，结合控制电路来检索多组符号，并且将系统的参数设置为用于识别系统属性的基础。之后，它是估计象征性的起始位置。

3. 发明申请

US20090089349A1 Angle Computation Method and Related Circuit 审中-公开
标题翻译：角度计算方法及相关电路
公开(公告)号：US20090089349A1
公开(公告)日：2009-04-02
申请号：US11941072
申请日：2007-11-15
申请人： Chi-Tung Chang , Hua-Han Lee , Yu-Ling Chen
发明人： Chi-Tung Chang , Hua-Han Lee , Yu-Ling Chen
IPC分类号： G06F7/548
CPC分类号： G06F7/548
摘要： Computing an angle between a real part and an imaginary part of a complex number includes receiving complex number data; generating a first value, a second value and a determination result according to the complex number data; choosing a dividend and a divisor of a division operation from the first value and the second value for generating a division result according to magnitudes of the first value and the second value; performing table look-up for the division result to generate a table look-up result according to a preserved table; and adjusting the table look-up result for generating an angle corresponding to the complex number data according to the determination result.
摘要翻译：计算复数的实部和虚部之间的角度包括接收复数数据; 根据复数数据生成第一值，第二值和确定结果; 从所述第一值和所述第二值中选择除数运算的除数和除数，以根据所述第一值和所述第二值的大小来产生除法结果; 执行表查找划分结果以根据保留表生成表查找结果; 以及根据确定结果调整表查找结果以产生与复数数据对应的角度。

4. 发明申请

US20090154618A1 Device and method for calculating Channel State Information 审中-公开
标题翻译：用于计算通道状态信息的设备和方法
公开(公告)号：US20090154618A1
公开(公告)日：2009-06-18
申请号：US12076026
申请日：2008-03-13
申请人： Chi-Tung Chang , Chun-Yi Wu , Yu-Ling Chen
发明人： Chi-Tung Chang , Chun-Yi Wu , Yu-Ling Chen
IPC分类号： H04B1/10
CPC分类号： H04L25/03019 , H04L5/0007 , H04L5/0064 , H04L25/0228 , H04L27/2601 , H04L2025/03414 , H04L2025/03802
摘要： Device and method for calculating channel state information (CSI) are disclosed. The device and method are applied to calculate the channel state information of a dual-carrier modulation system. When a channel equalization value is transmitted into this system, an absolute-value computing unit computes the absolute value for each equalization value. The absolute-value computing unit is electrically connected to a channel classifying unit that is used to separate signals to two channels. Every channel is connected to the equalization-value comparing unit. One smaller value resulted from a comparison operation is employed as the new-defined CSI for these two channels. Afterward, this CSI can be used in a decoder for enhancing the performance of dual-carrier modulation system in a multi-path fading channel.
摘要翻译：公开了用于计算信道状态信息（CSI）的装置和方法。应用该装置和方法来计算双载波调制系统的信道状态信息。当信道均衡值被发送到该系统中时，绝对值计算单元计算每个均衡值的绝对值。绝对值计算单元电连接到用于将信号分离成两个信道的信道分类单元。每个通道连接到均衡值比较单元。采用比较操作产生的一个较小的值作为这两个通道的新定义的CSI。此后，该CSI可用于解码器，以增强多路径衰落信道中双载波调制系统的性能。

5. 发明授权

US07538595B2 DC offset canceling circuit 失效
标题翻译：直流偏移消除电路
公开(公告)号：US07538595B2
公开(公告)日：2009-05-26
申请号：US11745456
申请日：2007-05-08
申请人： Chi-Tung Chang , Chuen-Heng Wang , Yu-Ling Chen
发明人： Chi-Tung Chang , Chuen-Heng Wang , Yu-Ling Chen
IPC分类号： H03L5/00
CPC分类号： H03F3/21 , H03F2200/375
摘要： The present invention provides a $ for canceling DC offset, comprising: a first circuit accumulating a first square value of a plurality of signal values in a time period; a second circuit calculation a second square value of an accumulation of said signal values in said time period, wherein said square value is divided by a quantity of said signal values in said time period to generate a DC offset value; and a third circuit, connected to said first circuit and second circuit, calculating a difference between said first square value and said DC offset value.
摘要翻译：本发明提供一种用于消除DC偏移的$，包括：在一段时间内累积多个信号值的第一平方值的第一电路; 第二电路计算所述时间段内的所述信号值的累积的第二平方值，其中所述平方值除以所述时间段内的所述信号值的量，以产生DC偏移值; 以及连接到所述第一电路和第二电路的第三电路，计算所述第一平方值和所述DC偏移值之间的差。

6. 发明申请

US20090092179A1 Method and a circuit for estimating the signal quality of a communication channel and a wireless receiving apparatus using the same 审中-公开
标题翻译：用于估计通信信道的信号质量的方法和电路以及使用该通信信道的无线接收装置
公开(公告)号：US20090092179A1
公开(公告)日：2009-04-09
申请号：US11987028
申请日：2007-11-27
申请人： Chi-Tung Chang , Chun-Yi Wu , Yu-Ling Chen
发明人： Chi-Tung Chang , Chun-Yi Wu , Yu-Ling Chen
IPC分类号： H04Q1/20
CPC分类号： H04L1/20 , H04L1/0002
摘要： A method for estimating the signal quality of a communication channel is disclosed. Firstly, an input signal passes through a match filter at the initial stage of an estimation period. Next, the output of the match filter is calculated to obtain the noise reference value within a pre-determined period. The output value of the match filter and the noise reference value are compared. When the output value of the match filter is larger than the noise reference value, a valid power value is obtained according to the output value of the match filter. The valid power values are accumulated. Finally, a SNR is calculated according to the noise reference value and the accumulated valid power value at the end of the estimation period. Thereby, the signal quality of the wireless communication channel is estimated according to the SNR, and the signal transmission rate is determined.
摘要翻译：公开了一种用于估计通信信道的信号质量的方法。首先，在估计周期的初始阶段，输入信号通过匹配滤波器。接下来，计算匹配滤波器的输出，以在预定周期内获得噪声参考值。比较匹配滤波器的输出值和噪声参考值。当匹配滤波器的输出值大于噪声参考值时，根据匹配滤波器的输出值获得有效的功率值。累积有效功率值。最后，根据估计周期结束时的噪声参考值和累计有效功率值计算SNR。因此，根据SNR估计无线通信信道的信号质量，并确定信号传输速率。

7. 发明授权

US07516296B2 Flash memory storage device and read/write method 有权
标题翻译：闪存存储设备和读/写方式
公开(公告)号：US07516296B2
公开(公告)日：2009-04-07
申请号：US11581430
申请日：2006-10-17
申请人： Chi-Tung Chang , Chia-Wei Hou , Kuo-Hsiang Hsu , Wen-Hao Cheng
发明人： Chi-Tung Chang , Chia-Wei Hou , Kuo-Hsiang Hsu , Wen-Hao Cheng
IPC分类号： G06F12/06
CPC分类号： G06F12/0246
摘要： A memory storage device and a read/write method thereof, first defining logically the flash memory as at least one particular data management area and at least one common data management area; next, determining the logical block address located in the particular data management area or the common data management area according to data transmitted to an external system by an area decision mechanism, wherein the method of writing to the particular data management area is by using a method of dynamic deviation value, and the method of writing to the common data management area is by using a method of same displacement value. Whereby, the particular data management area can be avoided moving frequently caused by updating data from the external system to improve read/write performance of the flash memory.
摘要翻译：一种存储器存储设备及其读/写方法，首先将闪速存储器逻辑地定义为至少一个特定数据管理区域和至少一个公共数据管理区域; 接下来，根据通过区域判定机构发送给外部系统的数据来确定位于特定数据管理区域或公共数据管理区域中的逻辑块地址，其中写入特定数据管理区域的方法是使用方法的动态偏差值，并且写入公共数据管理区域的方法是通过使用相同位移值的方法。由此，可以避免特定的数据管理区域通过从外部系统更新数据而频繁地移动，以提高闪速存储器的读/写性能。

8. 发明申请

US20080276037A1 Method to Access Storage Device Through Universal Serial Bus 审中-公开
标题翻译：通过通用串行总线访问存储设备的方法
公开(公告)号：US20080276037A1
公开(公告)日：2008-11-06
申请号：US12172672
申请日：2008-07-14
申请人： Chi-Tung Chang , Ching-Wen Wang
发明人： Chi-Tung Chang , Ching-Wen Wang
IPC分类号： G06F12/02
CPC分类号： G06F3/0656 , G06F3/0613 , G06F3/0679
摘要： A method accessing a flash memory storage device through universal serial bus (USB) of the present invention includes a flash controller and a flash memory, wherein the method includes connecting the storage device to a USB interface of an electronic device; outputting a plurality of accessing instructions to the flash controller via the electronic device; deciding which data is needed to be temporarily saved in a cache memory and a priority of the accessing instructions according to the characteristic of the file system and the content of preceding instructions of the flash controller; and writing the data temporarily saved in the cache memory into the flash memory according to the priority of the flash controller. The objective of the method of the present invention is to enhance the operation efficiency of the storage device.
摘要翻译：通过本发明的通用串行总线（USB）访问闪存存储设备的方法包括闪存控制器和闪速存储器，其中该方法包括将存储设备连接到电子设备的USB接口; 经由电子设备向闪存控制器输出多个访问指令; 根据文件系统的特性和闪存控制器的前述指令的内容，确定需要临时保存在高速缓冲存储器中的数据和访问指令的优先级; 并根据闪存控制器的优先级将临时保存在高速缓冲存储器中的数据写入闪速存储器。本发明的方法的目的是提高存储装置的操作效率。

9. 发明申请

US20080250180A1 USB peripheral device with dynamic modification class and operation method of the same 审中-公开
标题翻译： USB外围设备具有动态修改类和操作方法相同
公开(公告)号：US20080250180A1
公开(公告)日：2008-10-09
申请号：US12155778
申请日：2008-06-10
申请人： Chi-Tung Chang , Shin-Min Lan , Chao-Yu Chen
发明人： Chi-Tung Chang , Shin-Min Lan , Chao-Yu Chen
IPC分类号： G06F13/00
CPC分类号： G06F13/385
摘要： A USB peripheral device with dynamic modification class is connected to a basic system of processor through a USB transmission interface. The USB peripheral device contains a card connection unit and a USB microprocessor. By judging whether the card connection unit is inserted with a card device, the USB microprocessor is determined to transmit the data or not with the basic system of processor. If one card device is inserted into the card connection unit, the USB microprocessor outputs the corresponding class code according to the device class of the card device for the basic system of processor distinguishing and confirming said class code. Therefore, dynamically changing the device class in accordance with various card devices is achieved.
摘要翻译：具有动态修改类别的USB外围设备通过USB传输接口连接到处理器的基本系统。 USB外围设备包含一个卡连接单元和一个USB微处理器。通过判断卡连接单元是否插入卡装置，确定USB微处理器与基本的处理器系统传输数据。如果一个卡设备插入卡连接单元，则USB微处理器根据用于基本系统处理器的卡设备的设备类别输出相应的类代码，以区分并确认所述类代码。因此，实现了根据各种卡设备动态地改变设备类别。

10. 发明申请

US20080120454A1 Integrated hub control chip 审中-公开
标题翻译：集成集线器控制芯片
公开(公告)号：US20080120454A1
公开(公告)日：2008-05-22
申请号：US11638481
申请日：2006-12-14
申请人： Chi-Tung Chang , Shih-Min Lan , I-Chieh Lin
发明人： Chi-Tung Chang , Shih-Min Lan , I-Chieh Lin
IPC分类号： G06F3/00
CPC分类号： G06F13/4022 , G06F2213/0042
摘要： An integrated hub control chip is applied to a motherboard of an application system. The integrated hub control chip contains an upstream port transceiver, an upstream port controller, a relaying circuit unit, a keyboard control module, a digital camera control module, a storage medium control module, and a relaying circuit controller. The keyboard control module, the digital camera control module, and the storage medium control module are directly connected to the relaying circuit controller. The relaying circuit controller switches the transmission path of the relaying circuit unit according to the transmission speed of these control modules. The upstream port controller controls the transmission direction of the upstream port transceiver to accomplish the data communication with the motherboard. The objects of saving the circuit space of motherboard, reducing the hardware cost, and increasing the purposes and expansibility of the integrated hub control chip can therefore be achieved.
摘要翻译：将集成的集线器控制芯片应用于应用系统的主板。集成集线器控制芯片包括上行端口收发器，上游端口控制器，中继电路单元，键盘控制模块，数字照相机控制模块，存储介质控制模块和中继电路控制器。键盘控制模块，数码相机控制模块和存储介质控制模块直接连接到继电电路控制器。中继电路控制器根据这些控制模块的传输速度切换中继电路单元的传输路径。上行端口控制器控制上行端口收发器的传输方向，完成与主板的数据通信。因此可以实现节省主板电路空间，降低硬件成本，增加集成集线器控制芯片的目的和可扩展性的目的。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式