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    • 2. 发明申请
    • LOW POWER LAYERED DECODING FOR LOW DENSITY PARITY CHECK DECODERS
    • 低密度奇偶校验解码器的低功率分层解码
    • US20100037121A1
    • 2010-02-11
    • US12185987
    • 2008-08-05
    • Jie JinChi Ying Tsui
    • Jie JinChi Ying Tsui
    • G11C29/04G06F11/08G06F13/00G06F12/00
    • H03M13/114H03M13/1117H03M13/1122H03M13/6527
    • The disclosed subject matter provides low power layered LDPC decoders and related systems and methods. Exemplary embodiments of the disclosed subject matter can achieve significant reduction in memory access of the associated memories by bypassing the associated memories depending on the decoding algorithm (e.g., code rate) and the characteristic of the LDPC parity check matrix, thereby providing significant reductions power consumption of LDPC decoders. According to various embodiment, an optimal decoding order can be determined and scheduled to maximize the power reduction available by bypassing the associated memories. In addition, various algorithms are disclosed that determine optimal search orders under various constraints. According to the disclosed subject matter, particular embodiments can further reduce power consumption by employing the disclosed thresholding to further reduce memory access. Additionally, various modifications are provided, which achieve a wide range of performance and computational overhead trade-offs according to system design considerations.
    • 所公开的主题提供了低功率分层LDPC解码器及相关系统和方法。 所公开的主题的示例性实施例可以通过根据解码算法(例如,码率)和LDPC奇偶校验矩阵的特性绕过相关联的存储器来实现相关存储器的存储器访问的显着减少,从而提供显着的降低功耗 的LDPC解码器。 根据各种实施例,可以确定和调度最佳解码顺序,以通过绕过相关联的存储器来最大化可用的功率降低。 另外,公开了在各种约束下确定最佳搜索顺序的各种算法。 根据所公开的主题,特定实施例可以通过采用所公开的阈值来进一步减少功耗,从而进一步减少存储器访问。 此外,提供了各种修改,其根据系统设计考虑实现了广泛的性能和计算开销权衡。
    • 10. 发明授权
    • Symmetrically matched voltage mirror and applications therefor
    • 对称匹配的电压镜及其应用
    • US07215187B2
    • 2007-05-08
    • US11185294
    • 2005-07-20
    • Yat Hei LamWing Hung KiChi Ying Tsui
    • Yat Hei LamWing Hung KiChi Ying Tsui
    • G05F1/10
    • G05F3/262
    • A voltage mirror circuit using a symmetrically matched transistor structure is provided. The circuit includes an input reference voltage node on a first side of said circuit and an output mirror voltage node on a second side of said circuit, and a plurality of matched transistor pairs wherein the transistors in each pair have the same aspect ratio and wherein one transistor in each pair is provided on the first side of the circuit and the second transistor in each pair is provided on the second side of said circuit. The transistor pairs may include pairs of NMOS transistors and pairs of PMOS transistors or pairs of bipolar npn transistors and pairs of bipolar pnp transistors.
    • 提供了使用对称匹配晶体管结构的电压镜电路。 电路包括在所述电路的第一侧上的输入参考电压节点和所述电路的第二侧的输出镜电压节点,以及多个匹配的晶体管对,其中每对中的晶体管具有相同的纵横比,并且其中一个 每对中的晶体管设置在电路的第一侧上,并且每对中的第二晶体管设置在所述电路的第二侧上。 晶体管对可以包括一对NMOS晶体管和一对PMOS晶体管或双极npn晶体管对以及双极pnp晶体管对。