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1. 发明授权

US07694281B2 Two-pass MRET trace selection for dynamic optimization 有权
标题翻译：双向MRET跟踪选择用于动态优化
公开(公告)号：US07694281B2
公开(公告)日：2010-04-06
申请号：US11241527
申请日：2005-09-30
申请人： Cheng Wang , Bixia Zheng , Ho-seop Kim , Mauricio Breternitz, Jr. , Youfeng Wu
发明人： Cheng Wang , Bixia Zheng , Ho-seop Kim , Mauricio Breternitz, Jr. , Youfeng Wu
IPC分类号： G06F9/44
CPC分类号： G06F9/45516
摘要： A first potential hot trace of a program is determined. A second potential hot trace of the program is determined. A common path from the first potential hot trace and the second potential hot trace is selected as the selected hot trace of the program.
摘要翻译：确定程序的第一个潜在的热迹。确定程序的第二个潜在的热迹。选择第一个潜在热痕迹和第二个潜在热痕迹的常见路径作为程序的选定热痕迹。

2. 发明授权

US07757221B2 Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization constraints 有权
标题翻译：用于动态二进制转换器的装置和方法，以最小的优化约束来支持精确异常
公开(公告)号：US07757221B2
公开(公告)日：2010-07-13
申请号：US11241610
申请日：2005-09-30
申请人： Bixia Zheng , Cheng C. Wang , Ho-seop Kim , Mauricio Breternitz, Jr. , Youfeng Wu
发明人： Bixia Zheng , Cheng C. Wang , Ho-seop Kim , Mauricio Breternitz, Jr. , Youfeng Wu
IPC分类号： G06F9/45
CPC分类号： G06F9/45516 , G06F8/443
摘要： A method and apparatus for dynamic binary translator to support precise exceptions with minimal optimization constraints. In one embodiment, the method includes the translation of a source binary application generated for a source instruction set architecture (ISA) into a sequential, intermediate representation (IR) of the source binary application. In one embodiment, the sequential IR is modified to incorporate exception recovery information for each of the exception instructions identified from the source binary application to enable a dynamic binary translator (DBT) to represent exception recovery values as regular values used by IR instructions. In one embodiment, the sequential IR may be optimized with a constraint on movement of an exception instruction downward past an irreversible instruction to form a non-sequential IR. In one embodiment, the non-sequential IR is optimized to form a translated binary application for a target ISA. Other embodiments are described and claimed.
摘要翻译：一种用于动态二进制转换器的方法和装置，以最小的优化约束来支持精确的异常。在一个实施例中，该方法包括将源指令集架构（ISA）生成的源二进制应用程序转换为源二进制应用程序的顺序中间表示（IR）。在一个实施例中，顺序IR被修改为包含从源二进制应用程序识别的每个异常指令的异常恢复信息，以使动态二进制转换器（DBT）能够将异常恢复值表示为由IR指令使用的常规值。在一个实施例中，可以对异常指令向下移动通过不可逆指令以形成非顺序IR的限制来优化顺序IR。在一个实施例中，非顺序IR被优化以形成目标ISA的翻译二进制应用程序。描述和要求保护其他实施例。

3. 发明申请

US20070079293A1 Two-pass MRET trace selection for dynamic optimization 有权
标题翻译：双向MRET跟踪选择用于动态优化
公开(公告)号：US20070079293A1
公开(公告)日：2007-04-05
申请号：US11241527
申请日：2005-09-30
申请人： Cheng Wang , Bixia Zheng , Ho-seop Kim , Mauricio Breternitz , Youfeng Wu
发明人： Cheng Wang , Bixia Zheng , Ho-seop Kim , Mauricio Breternitz , Youfeng Wu
IPC分类号： G06F9/44
CPC分类号： G06F9/45516
摘要： A first potential hot trace of a program is determined. A second potential hot trace of the program is determined. A common path from the first potential hot trace and the second potential hot trace is selected as the selected hot trace of the program.
摘要翻译：确定程序的第一个潜在的热迹。确定程序的第二个潜在的热迹。选择第一个潜在热痕迹和第二个潜在热痕迹的常见路径作为程序的选定热痕迹。

4. 发明申请

US20070079304A1 Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization constraints 有权
标题翻译：用于动态二进制转换器的装置和方法，以最小的优化约束来支持精确异常
公开(公告)号：US20070079304A1
公开(公告)日：2007-04-05
申请号：US11241610
申请日：2005-09-30
申请人： Bixia Zheng , Cheng Wang , Ho-seop Kim , Mauricio Breternitz , Youfeng Wu
发明人： Bixia Zheng , Cheng Wang , Ho-seop Kim , Mauricio Breternitz , Youfeng Wu
IPC分类号： G06F9/45
CPC分类号： G06F9/45516 , G06F8/443
摘要： A method and apparatus for dynamic binary translator to support precise exceptions with minimal optimization constraints. In one embodiment, the method includes the translation of a source binary application generated for a source instruction set architecture (ISA) into a sequential, intermediate representation (IR) of the source binary application. In one embodiment, the sequential IR is modified to incorporate exception recovery information for each of the exception instructions identified from the source binary application to enable a dynamic binary translator (DBT) to represent exception recovery values as regular values used by IR instructions. In one embodiment, the sequential IR may be optimized with a constraint on movement of an exception instruction downward past an irreversible instruction to form a non-sequential IR. In one embodiment, the non-sequential IR is optimized to form a translated binary application for a target ISA. Other embodiments are described and claimed.
摘要翻译：一种用于动态二进制转换器的方法和装置，以最小的优化约束来支持精确的异常。在一个实施例中，该方法包括将源指令集架构（ISA）生成的源二进制应用程序转换为源二进制应用程序的顺序中间表示（IR）。在一个实施例中，顺序IR被修改为包含从源二进制应用程序识别的每个异常指令的异常恢复信息，以使动态二进制转换器（DBT）能够将异常恢复值表示为由IR指令使用的常规值。在一个实施例中，可以对异常指令向下移动通过不可逆指令以形成非顺序IR的限制来优化顺序IR。在一个实施例中，非顺序IR被优化以形成目标ISA的翻译二进制应用程序。描述和要求保护其他实施例。

5. 发明申请

US20080126764A1 Using transactional memory for precise exception handling in aggressive dynamic binary optimizations 有权
标题翻译：在积极的动态二进制优化中使用事务内存进行精确的异常处理
公开(公告)号：US20080126764A1
公开(公告)日：2008-05-29
申请号：US11528801
申请日：2006-09-27
申请人： Youfeng Wu , Cheng Wang , Ho-seop Kim
发明人： Youfeng Wu , Cheng Wang , Ho-seop Kim
IPC分类号： G06F9/44 , G06F9/318
CPC分类号： G06F9/466
摘要： Dynamic optimization of application code is performed by selecting a portion of the application code as a possible transaction. A transaction has a property that when it is executed, it is either atomically committed or atomically aborted. Determining whether to convert the selected portion of the application code to a transaction includes determining whether to apply at least one of a group of code optimizations to the portion of the application code. If it is determined to apply at least one of the code optimizations of the group of optimizations to the portion of application code, then the optimization is applied to the portion of the code and the portion of the code is converted to a transaction.
摘要翻译：通过选择应用代码的一部分作为可能的事务来执行应用代码的动态优化。事务有一个属性，当它被执行时，它被原子地提交或原子地中止。确定是否将应用程序代码的所选部分转换为事务包括确定是否将应用程序代码的一部分中的至少一个代码优化组合应用。如果确定将优化组的代码优化中的至少一个应用于应用代码的部分，则优化被应用于代码的该部分，并将该部分代码转换为事务。

6. 发明授权

US07865885B2 Using transactional memory for precise exception handling in aggressive dynamic binary optimizations 有权
标题翻译：在积极的动态二进制优化中使用事务内存进行精确的异常处理
公开(公告)号：US07865885B2
公开(公告)日：2011-01-04
申请号：US11528801
申请日：2006-09-27
申请人： Youfeng Wu , Cheng Wang , Ho-seop Kim
发明人： Youfeng Wu , Cheng Wang , Ho-seop Kim
IPC分类号： G06F9/45
CPC分类号： G06F9/466
摘要： Dynamic optimization of application code is performed by selecting a portion of the application code as a possible transaction. A transaction has a property that when it is executed, it is either atomically committed or atomically aborted. Determining whether to convert the selected portion of the application code to a transaction includes determining whether to apply at least one of a group of code optimizations to the portion of the application code. If it is determined to apply at least one of the code optimizations of the group of optimizations to the portion of application code, then the optimization is applied to the portion of the code and the portion of the code is converted to a transaction.
摘要翻译：通过选择应用代码的一部分作为可能的事务来执行应用代码的动态优化。事务有一个属性，当它被执行时，它被原子地提交或原子地中止。确定是否将应用程序代码的所选部分转换为事务包括确定是否将应用程序代码的一部分中的至少一个代码优化组合应用。如果确定将优化组的代码优化中的至少一个应用于应用代码的部分，则优化被应用于代码的该部分，并将该部分代码转换为事务。

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