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1. 发明申请

US20080197461A1 Apparatus for wire bonding and integrated circuit chip package 审中-公开
标题翻译：导线接合装置和集成电路芯片封装
公开(公告)号：US20080197461A1
公开(公告)日：2008-08-21
申请号：US11706193
申请日：2007-02-15
申请人： Chen-Hua Yu , Hui-Lin Chang , Yung-Cheng Lu , Mirng-Ji Lii , Yung-Ching Chen
发明人： Chen-Hua Yu , Hui-Lin Chang , Yung-Cheng Lu , Mirng-Ji Lii , Yung-Ching Chen
IPC分类号： H01L21/60 , B23K37/00 , H01L23/495
CPC分类号： H01L23/4952 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/85 , H01L2224/05554 , H01L2224/45012 , H01L2224/45013 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/4516 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4845 , H01L2224/48465 , H01L2224/48599 , H01L2224/48699 , H01L2224/49175 , H01L2224/78268 , H01L2224/78301 , H01L2224/85043 , H01L2224/85045 , H01L2224/85181 , H01L2224/85201 , H01L2224/85203 , H01L2224/85205 , H01L2924/00011 , H01L2924/00014 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/20751 , H01L2924/00 , H01L2924/01006 , H01L2224/85399 , H01L2224/05599
摘要： An apparatus for wire bonding and a capillary tool thereof are provided. An exemplary embodiment of a capillary tool capable of a wire bonding comprises a body having a first internal channel of a first diameter for accommodating a flow of a conductive wire. A compressible head is connected to the body, having a second internal channel of a second diameter for accommodating the flow of the conductive wire, wherein the first diameter is fixed and the second diameter is variable, the second diameter is not more than the first diameter and a diameter the conductive wire flowed through the compressible head is adjustable. An integrated circuit (IC) package is also provided.
摘要翻译：提供一种用于引线接合的装置及其毛细管工具。能够引线接合的毛细管工具的示例性实施例包括具有用于容纳导线流动的第一直径的第一内部通道的主体。可压缩头连接到主体，具有用于容纳导线流动的第二直径的第二内部通道，其中第一直径是固定的，第二直径是可变的，第二直径不大于第一直径并且流过可压缩头的导线的直径是可调节的。还提供集成电路（IC）封装。

2. 发明申请

US20100081273A1 METHOD FOR FABRICATING CONDUCTIVE PATTERN 审中-公开
标题翻译：制作导电图案的方法
公开(公告)号：US20100081273A1
公开(公告)日：2010-04-01
申请号：US12242850
申请日：2008-09-30
申请人： Jung-Yuan Hsieh , Yung-Ching Chen
发明人： Jung-Yuan Hsieh , Yung-Ching Chen
IPC分类号： H01L21/768
CPC分类号： H01L21/76885 , H01L21/76877
摘要： A method for fabricating a conductive pattern including following steps is provided. A first conductive layer is formed on a substrate. A patterned hard mask layer is formed on the first conductive layer. A portion of the first conductive layer is removed to expose a portion of the substrate by using the patterned hard mask layer as a mask. A dielectric layer covering the patterned hard mask layer is formed on the substrate. A portion of the dielectric layer is removed to expose the patterned hard mask layer. The patterned hard mask layer is removed to form an opening in the dielectric layer. A second conductive layer is formed in the opening.
摘要翻译：提供一种制造包括以下步骤的导电图案的方法。在基板上形成第一导电层。图案化的硬掩模层形成在第一导电层上。通过使用图案化的硬掩模层作为掩模，去除第一导电层的一部分以露出衬底的一部分。覆盖图案化的硬掩模层的电介质层形成在衬底上。去除介电层的一部分以暴露图案化的硬掩模层。图案化的硬掩模层被去除以在介电层中形成开口。在开口中形成第二导电层。

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