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    • 4. 发明申请
    • Fast-settling digital automatic gain control
    • 快速建立数字自动增益控制
    • US20070139118A1
    • 2007-06-21
    • US11312089
    • 2005-12-20
    • Chee TeoLian-Chun XuKok-Soon YeoJohn AsuncionWai Tai
    • Chee TeoLian-Chun XuKok-Soon YeoJohn AsuncionWai Tai
    • H03G3/10
    • H03G3/001H03G1/0088
    • A fast-settling digital automatic gain control circuit comprises first and second gain-controllable amplifiers in series. Each amplifier can be digitally switched between minimum and maximum gains by control logic that receives inputs from a multi-level voltage comparator. A peak detector connected to the output of the first gain-controlled amplifier is used to set the overall operating ranges for several threshold detectors. Four reference voltages are generated from the peak detector. The highest reference voltage is used to clock and reset the gain control logic with a hysteresis comparator to the instantaneous input signal from the first gain-controlled amplifier. The three other lower reference voltages are used to provide three-bits of digital input data to the gain control logic. Two digital controls are output, a min/max gain bit for the first gain-controlled amplifier, and a similar min/max gain bit for the second gain-controlled amplifier.
    • 快速稳定的数字自动增益控制电路包括串联的第一和第二增益可控放大器。 每个放大器可以通过从多电平电压比较器接收输入的控制逻辑在最小和最大增益之间进行数字切换。 连接到第一增益控制放大器的输出端的峰值检测器用于设置多个阈值检测器的总体工作范围。 从峰值检测器产生四个参考电压。 最高参考电压用于使用滞后比较器对增益控制逻辑进行时钟并复位为来自第一增益控制放大器的瞬时输入信号。 三个较低的参考电压用于向增益控制逻辑提供三位数字输入数据。 输出两个数字控制,第一增益控制放大器的最小/最大增益位,以及第二增益控制放大器的类似最小/最大增益位。