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1. 发明授权

US6010954A Cmos gate architecture for integration of salicide process in sub 0.1 . .muM devices 失效
标题翻译： Cmos门结构，用于将0.1％以上设备的自杀过程整合
公开(公告)号：US6010954A
公开(公告)日：2000-01-04
申请号：US156359
申请日：1998-09-18
申请人： Chaw Sing Ho , R. P. G. Karunasiri , Soo Jin Chua , Kin Leong Pey , Kong Hean Lee
发明人： Chaw Sing Ho , R. P. G. Karunasiri , Soo Jin Chua , Kin Leong Pey , Kong Hean Lee
IPC分类号： H01L21/28 , H01L21/336 , H01L29/423 , H01L21/18 , H01L21/283 , H01L21/335 , H01L21/461
CPC分类号： H01L29/665 , H01L21/28114 , H01L29/42376 , H01L29/66545
摘要： A method to form a "mushroom shaped" gate structure 18 22 44A 70 that increases the top gate silicide contact area and improves the salicide process, especially TiSi.sub.2 salicide. The novel upper gate extensions 44A increase the top gate surface area so that the silicide gate contacts 70 will have a low resistivity. The invention includes forming a gate stack 18 22 26 comprised of a gate oxide layer 18, a center gate portion 22 and a hard mask 26. Next, we form a first insulating layer 40 over the gate stack 22 26 18. The hard mask 26 and a first thickness of the first insulating layer 40 are removed to expose sidewalls of the center gate portion 22. A second conductive layer 44 is formed over the first insulating layer 46 and the center gate portion 22. The second conductive layer 44 is etched to form critical rounded upper gate extensions 44A on the sidewalls of the center gate portion 22. Lower rectangular sidewall spacers 52 are formed on the sidewalls of the center gate portion 22. Source/drain regions 54 are formed. A salicide process forms silicide source/drain contacts 64 and forms extra large silicided gate contacts 70 to reduce parasitic resistance.
摘要翻译：形成增加顶栅硅化物接触面积并改善自对准硅化物工艺的“蘑菇形”门结构18 22 44A 70的方法，特别是TiSi 2自对准硅化物。新颖的上部栅极延伸部分44A增加了顶部栅极表面积，使得硅化物栅极接触70将具有低电阻率。本发明包括形成由栅极氧化物层18，中心栅极部分22和硬掩模26组成的栅极堆叠18 22 26.接下来，我们在栅极叠层22 26上形成第一绝缘层40.硬掩模26 并且去除第一绝缘层40的第一厚度以暴露中心栅极部分22的侧壁。第二导电层44形成在第一绝缘层46和中心栅极部分22上。第二导电层44被蚀刻到在中心栅极部分22的侧壁上形成关键的圆形上部栅极延伸部分44A。下部矩形侧壁间隔件52形成在中心栅极部分22的侧壁上。形成源极/漏极区域54。自对准硅化物工艺形成硅化物源极/漏极触点64并形成特大的硅化物栅极触点70以减小寄生电阻。

2. 发明授权

US06410429B1 Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctions 失效
标题翻译：具有超浅结的无空隙外延CoSi2的制造方法
公开(公告)号：US06410429B1
公开(公告)日：2002-06-25
申请号：US09795113
申请日：2001-03-01
申请人： Chaw Sing Ho , Kheng Chok Tee , Kin Leong Pey , G. Karunasiri , Soo Jin Chua , Kong Hean Lee , Alex Kalhung See
发明人： Chaw Sing Ho , Kheng Chok Tee , Kin Leong Pey , G. Karunasiri , Soo Jin Chua , Kong Hean Lee , Alex Kalhung See
IPC分类号： H01L2144
CPC分类号： H01L29/6659 , H01L21/2257 , H01L21/28518 , H01L29/665
摘要： A method for forming a void-free epitaxial cobalt silicide (CoSi2) layer on an ultra-shallow source/drain junction. A patterned silicon structure is cleaned using HF. A first titanium layer, a cobalt layer, and a second titanium layer are successively formed on the patterned silicon substrate. The patterned silicon substrate is annealed at a temperature of between about 550° C. and 580° C. in a nitrogen ambient at atmospheric pressure; whereby the cobalt migrates downward and reacts with the silicon structure to form a CoSi2/CoSi layer, and the first titanium layer migrates upward and the first titanium layer and the second titanium layer react with the nitrigen ambient to form TiN. The TiN and unreacted cobalt are removed. The silicon structure is annealed at a temperature of between about 825° C. and 875° C. to convert the CoSi2/CoSi layer to a CoSi2 layer. The CoSi2 layer can optionally be implanted with impurity ions which are subsequently diffused to form ultra-shallow junctions.
摘要翻译：在超浅源极/漏极结上形成无空隙的外延钴硅化物（CoSi 2）层的方法。使用HF清洁图案化的硅结构。在图案化的硅衬底上依次形成第一钛层，钴层和第二钛层。图案化的硅衬底在大气压下在氮气环境中在约550℃和580℃之间的温度下退火; 由此钴向下迁移并与硅结构反应以形成CoSi 2 / CoSi层，并且第一钛层向上迁移，并且第一钛层和第二钛层与硝化环境反应形成TiN。去除TiN和未反应的钴。将硅结构在约825℃和875℃之间的温度下退火，以将CoSi 2 / CoSi层转化为CoSi 2层。 CoSi2层可以任选地被杂质离子注入，后者被扩散以形成超浅结。

3. 发明授权

US08603825B2 Sensor for measuring gas permeability of a test material 有权
标题翻译：用于测量测试材料的透气度的传感器
公开(公告)号：US08603825B2
公开(公告)日：2013-12-10
申请号：US10594789
申请日：2004-03-31
申请人： Soo Jin Chua , Senthil Kumar Ramadas , Xinbo He
发明人： Soo Jin Chua , Senthil Kumar Ramadas , Xinbo He
IPC分类号： G01N15/08 , B01J19/00
CPC分类号： G01N15/0826 , G01N27/121
摘要： A sensor for measuring gas permeability of a test material, comprising: an electrically conductive sensing element that comprises a water and/or oxygen sensitive material, wherein the reaction of said material with water or oxygen when the sensing element is contacted with water and/or oxygen results in a change in the electrical conductivity of the sensing element, and two electrodes electrically connected to the sensing element.
摘要翻译：一种用于测量测试材料的透气性的传感器，包括：导电感测元件，其包括水和/或氧敏感材料，其中当感测元件与水接触时，所述材料与水或氧的反应和/或氧导致感测元件的电导率的变化，以及电连接到感测元件的两个电极。

4. 发明授权

US08211321B2 Method for fabricating micro and nano structures 失效
标题翻译：制造微结构和纳米结构的方法
公开(公告)号：US08211321B2
公开(公告)日：2012-07-03
申请号：US12938973
申请日：2010-11-03
申请人： Benzhong Wang , Soo Jin Chua
发明人： Benzhong Wang , Soo Jin Chua
IPC分类号： B29D11/00
CPC分类号： B29D11/00365 , B82Y20/00 , B82Y30/00 , G02B3/0012 , G02B3/0056 , Y10S977/888 , Y10T428/24165 , Y10T428/24893 , Y10T428/24909
摘要： A method of forming an array of selectively shaped optical elements on a substrate, the method including the steps of providing the substrate, the substrate having an optical layer placed thereon; placing a layer of particles on the optical layer; performing an etching cycle. The cycle includes the steps of: etching the layer of particles, using a first etching process so as to reduce the size of the particles within the layer, then; simultaneously etching the optical layer and the layer of particles, using a second etching process, the further reducing particles forming a mask over areas of the optical layer to create discrete optical elements from the optical layer.
摘要翻译：一种在衬底上形成选择性地成形的光学元件的阵列的方法，所述方法包括以下步骤：提供衬底，所述衬底具有放置在其上的光学层; 在光学层上放置一层颗粒; 执行蚀刻循环。该循环包括以下步骤：使用第一蚀刻工艺蚀刻颗粒层，以减小层内的颗粒的尺寸，然后; 使用第二蚀刻工艺同时蚀刻光学层和颗粒层，在光学层的区域上形成进一步的还原颗粒形成掩模以从光学层产生离散的光学元件。

5. 发明授权

US07910937B2 Method and structure for fabricating III-V nitride layers on silicon substrates 失效
标题翻译：在硅衬底上制造III-V族氮化物层的方法和结构
公开(公告)号：US07910937B2
公开(公告)日：2011-03-22
申请号：US11344472
申请日：2006-02-01
申请人： Peng Chen , Soo Jin Chua , Zhonglin Miao , Sudhiranjan Tripathy
发明人： Peng Chen , Soo Jin Chua , Zhonglin Miao , Sudhiranjan Tripathy
IPC分类号： H01L33/00
CPC分类号： B82Y20/00 , H01L21/02381 , H01L21/02458 , H01L21/02491 , H01L21/02507 , H01L21/0254 , H01L21/0262 , H01L21/02658 , H01L33/007 , H01L33/04
摘要： A method and structure for fabricating III-V nitride layers on silicon substrates includes a substrate, a transition structure having AlGaN, AlN and GaN layers, and a superlattice structure having AlGaN and GaN layers. In the invention, the large lattice mismatch (17%) between GaN and silicon is solved by using AlN as the first buffer layer with a 5:4 coincidence between AlN(0001) and Si(111) lattice to reduce the lattice mismatch to 1.3%.
摘要翻译：用于在硅衬底上制造III-V族氮化物层的方法和结构包括衬底，具有AlGaN，AlN和GaN层的过渡结构，以及具有AlGaN和GaN层的超晶格结构。在本发明中，通过使用AlN作为第一缓冲层，在AlN（0001）和Si（111）晶格之间具有5:4的一致性来解决GaN和硅之间的大晶格失配（17％），以将晶格失配减小到1.3 ％。

6. 发明授权

US07419842B2 Encapsulation of electroluminescent devices with shaped spacers 失效
标题翻译：具有成型间隔物的电致发光器件的封装
公开(公告)号：US07419842B2
公开(公告)日：2008-09-02
申请号：US11674098
申请日：2007-02-12
申请人： Mark Auch , Ewald Guenther , Soo Jin Chua
发明人： Mark Auch , Ewald Guenther , Soo Jin Chua
IPC分类号： H01L21/00
CPC分类号： H01L51/525 , H01L27/3241 , H01L33/483 , H01L51/5246
摘要： A method of encapsulating a device is disclosed. Spacer particles are randomly located in a device region to prevent a cap mounted on the substrate from contacting the active components when pressure is applied to the cap, thereby protecting the active components from damage. The spacer particles comprise a base and an upper portion, the base being at least equal to or wider than the upper portion.
摘要翻译：公开了封装装置的方法。间隔物颗粒随机地位于装置区域中，以防止当将压力施加到盖子上时，安装在基板上的盖子与活性组分接触，从而保护活性成分免受损坏。间隔物颗粒包括基部和上部，基部至少等于或大于上部。

7. 发明授权

US07223623B2 Method for forming a modified semiconductor having a plurality of band gaps 失效
标题翻译：用于形成具有多个带隙的改性半导体的方法
公开(公告)号：US07223623B2
公开(公告)日：2007-05-29
申请号：US10510357
申请日：2003-04-04
申请人： Jing Hua Teng , Soo Jin Chua , Jian Rong Dong
发明人： Jing Hua Teng , Soo Jin Chua , Jian Rong Dong
IPC分类号： H01L21/00
CPC分类号： B82Y10/00 , B82Y20/00 , H01L21/182 , H01L29/122 , H01L29/125 , H01L29/127 , H01L33/0095 , H01S5/1003 , H01S5/1092 , H01S5/162 , H01S5/3412 , H01S5/3414 , H01S5/4087
摘要： A method for forming a modified semiconductor having a number of band gaps involves providing a semiconductor having a surface and a quantum region which emits photons in response to electrical or optical stimulation, the quantum region having an original band gap and being disposed under the surface and applying a number of layers of a number of materials to a number of selected regions of the surface, the materials being adapted to cause, upon thermal annealing, a number of different degrees of intermixing in a number of portions of the quantum region disposed immediately below each of the selected regions of the surface. The layers of materials can be applied in a dot or line pattern, or both, to increase the plurality of band gap tuning. The method includes thermally annealing the layers to the surface. The methods result in a modified semiconductor which exhibits a number of different band gaps in a number of portions of the quantum region depending upon the positioning of the layers of materials on the surface immediately above the respective portions of the quantum region.
摘要翻译：用于形成具有多个带隙的修改的半导体的方法涉及提供具有表面的半导体和响应于电或光刺激而发射光子的量子区域，该量子区域具有原始带隙并设置在该表面下方，将多个材料层施加到表面的多个选定区域，该材料适于在热退火时引起在紧邻下面布置的量子区域的多个部分中的多个不同程度的混合每个表面的选定区域。可以以点或线图案或两者来施加材料层以增加多个带隙调谐。该方法包括将层热层退火到表面。该方法产生一种修饰的半导体，其取决于材料层在量子区的相应部分上方的表面上的位置，在量子区的多个部分中表现出许多不同的带隙。

8. 发明授权

US06887972B2 Blue electroluminescent materials for polymer light-emitting diodes 失效
标题翻译：用于高分子发光二极管的蓝色电致发光材料
公开(公告)号：US06887972B2
公开(公告)日：2005-05-03
申请号：US09841705
申请日：2001-04-24
申请人： Wei Huang , Wang Lin Yu , Jian Pei , Soo Jin Chua
发明人： Wei Huang , Wang Lin Yu , Jian Pei , Soo Jin Chua
IPC分类号： H01L51/30 , H01L51/50 , C08G73/00
CPC分类号： H01L51/0039 , H01L51/0035 , H01L51/0043 , H01L51/5012 , Y10S428/917
摘要： A polymeric material comprising alternate substituted fluorene and phenylene units, as represented by the following formula wherein R1, R2, R3 and R4, which may be identical or different, are each selected from the group consisting of H, a (C1-C22) linear or branched alkyl, alkoxy or oligo (oxyetylene) group, a (C6-C30) cycloalkyl group, and an unsubstituted or substituted aryl group, and n is from about 3 to about 5000.
摘要翻译：包含交替取代的芴和亚苯基单元的聚合物材料，如下式所示：其中R 1，R 2，R 3和R 3，其可以相同或不同，各自选自H，直链或支链的H（C 1 -C 12 -C 22）烷基，烷氧基或低聚（亚乙烯基），（C 6 -C 30）环烷基和未取代或取代的芳基，n为约3〜约5000。

9. 发明授权

US09011705B2 Method of forming a polymer substrate with variable refractive index sensitivity 有权
$Method of forming a polymer substrate with variable refractive index sensitivity$
标题翻译：形成具有可变折射率灵敏度的聚合物基材的方法
公开(公告)号：US09011705B2
公开(公告)日：2015-04-21
申请号：US13559533
申请日：2012-07-26
申请人： Kwok Wei Shah , Xiaodi Su , Soo Jin Chua , Hong Yee Low
发明人： Kwok Wei Shah , Xiaodi Su , Soo Jin Chua , Hong Yee Low
IPC分类号： B44C1/22 , G01N21/552
CPC分类号： G01N21/554 , B44C1/227 , Y10S977/888 , Y10T428/24331
摘要： The present invention relates to a method of forming polymer substrate with variable refractive index sensitivity, the method comprising the steps of: (a) contacting a metal-coated patterned mold with a polymer substrate at a temperature sufficient to deform said polymer substrate to thereby deposit a patterned mask of a metal film on the polymer substrate; and (b) etching away portions of said polymer substrate not covered by said patterned mask under conditions to form a region of variable refractive index sensitivity on said polymer substrate.
摘要翻译：本发明涉及一种形成具有可变折射率灵敏度的聚合物基材的方法，所述方法包括以下步骤：（a）使金属涂覆的图案化模具与聚合物基材在足以使所述聚合物基材变形以使其沉积的温度下接触在聚合物基材上的金属膜的图案化掩模; 和（b）在所述聚合物基材上形成可变折射率敏感区域的条件下，蚀刻除去未被所述图案化掩模覆盖的所述聚合物基材的部分。

10. 发明申请

US20120142170A1 METHOD OF FORMING PHOTONIC CRYSTALS 审中-公开
标题翻译：形成光子晶体的方法
公开(公告)号：US20120142170A1
公开(公告)日：2012-06-07
申请号：US13377521
申请日：2010-06-09
申请人： Jinghua Teng , Eo Lim , Soo Jin Chua , Soo Seng Nirman Ang
发明人： Jinghua Teng , Eo Lim , Soo Jin Chua , Soo Seng Nirman Ang
IPC分类号： H01L21/20
CPC分类号： G02B6/1225 , B82Y20/00 , G02B6/136 , G02B2006/12176
摘要： According to an embodiment of the present invention, a method of forming photonic crystals is provided. The method includes: forming a layer arrangement on a support substrate. The layer arrangement includes a first partial layer arrangement and a second partial layer arrangement, wherein the second partial layer arrangement is disposed over the first partial layer arrangement, wherein each partial layer arrangement comprises a first layer and a second layer, wherein the second layer is disposed over the first layer, and wherein the material of the second layer has a different etching characteristic than the material of the first layer. The method further includes removing at least one portion of the second layer and removing the first layer, wherein forming the layer arrangement occurs prior to removing the at least one portion of the second layer and the first layer.
摘要翻译：根据本发明的实施例，提供了形成光子晶体的方法。该方法包括：在支撑衬底上形成层布置。层布置包括第一部分层布置和第二部分层布置，其中第二部分层布置设置在第一部分层布置之上，其中每个部分层布置包括第一层和第二层，其中第二层是设置在所述第一层上，并且其中所述第二层的材料具有与所述第一层的材料不同的蚀刻特性。该方法还包括去除第二层的至少一部分并去除第一层，其中形成层布置发生在去除第二层和第一层的至少一部分之前。

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