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1. 发明授权

US07461364B2 Methods and readable media for using relative positioning in structures with dynamic ranges 有权
标题翻译：在具有动态范围的结构中使用相对定位的方法和可读介质
公开(公告)号：US07461364B2
公开(公告)日：2008-12-02
申请号：US11279237
申请日：2006-04-10
申请人： Charles L. Alley , Robert B. Likovich, Jr. , Joseph D. Mendenhall , Chad E. Winemiller
发明人： Charles L. Alley , Robert B. Likovich, Jr. , Joseph D. Mendenhall , Chad E. Winemiller
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： Methods and readable media for using relative positioning of items or components in a structure with dynamic ranges, such as an elastic I/O bus design for an Integrated Circuit (IC), are disclosed. Embodiments may include a user-defined type module having user-defined types representing relative instance positions within a structure. Embodiments may also include a translation helper module to receive information associated with a hierarchy and to return location information associated with the hierarchy and a translation module to translate between a specific location and a relative position of the instance based on one or more user-defined types and location information returned from the translation helper module to generate a list of translated results. Further embodiments of the translation module may include a relative position determiner to translate specific locations to relative positions and may also include a specific location determiner to translate relative positions to specific locations.
摘要翻译：公开了用于使物品或部件在具有动态范围的结构中的相对定位的方法和可读介质，例如用于集成电路（IC）的弹性I / O总线设计。实施例可以包括具有表示结构内的相对实例位置的用户定义类型的用户定义类型模块。实施例还可以包括翻译帮助器模块，用于接收与层级相关联的信息并返回与层级相关联的位置信息，以及翻译模块，用于基于一个或多个用户定义的类型在实例的特定位置和相对位置之间进行转换和从翻译助手模块返回的位置信息以生成翻译结果的列表。翻译模块的其他实施例可以包括将特定位置转换为相对位置的相对位置确定器，并且还可以包括将相对位置转换为特定位置的特定位置确定器。

2. 发明授权

US07784002B2 Systems for using relative positioning in structures with dynamic ranges 失效
标题翻译：在具有动态范围的结构中使用相对定位的系统
公开(公告)号：US07784002B2
公开(公告)日：2010-08-24
申请号：US12253481
申请日：2008-10-17
申请人： Charles L. Alley , Robert B. Likovich , Joseph D. Mendenhall , Chad E. Winemiller
发明人： Charles L. Alley , Robert B. Likovich , Joseph D. Mendenhall , Chad E. Winemiller
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： Systems for using relative positioning of items or components in a structure with dynamic ranges, such as an elastic I/O bus design for an Integrated Circuit (IC), are disclosed. Embodiments may include a user-defined type module having user-defined types representing relative instance positions within a structure. Embodiments may also include a translation helper module to receive information associated with a hierarchy and to return location information associated with the hierarchy and a translation module to translate between a specific location and a relative position of the instance based on one or more user-defined types and location information returned from the translation helper module to generate a list of translated results. Further embodiments of the translation module may include a relative position determiner to translate specific locations to relative positions and may also include a specific location determiner to translate relative positions to specific locations.
摘要翻译：公开了在具有动态范围的结构中使用项目或部件的相对定位的系统，例如用于集成电路（IC）的弹性I / O总线设计。实施例可以包括具有表示结构内的相对实例位置的用户定义类型的用户定义类型模块。实施例还可以包括翻译帮助器模块，用于接收与层级相关联的信息并返回与层级相关联的位置信息，以及翻译模块，用于基于一个或多个用户定义的类型在实例的特定位置和相对位置之间进行转换和从翻译助手模块返回的位置信息以生成翻译结果的列表。翻译模块的其他实施例可以包括将特定位置转换为相对位置的相对位置确定器，并且还可以包括将相对位置转换为特定位置的特定位置确定器。

3. 发明申请

US20090089728A1 SYSTEMS FOR USING RELATIVE POSITIONING IN STRUCTURES WITH DYNAMIC RANGES 失效
标题翻译：在具有动态范围的结构中使用相对定位的系统
公开(公告)号：US20090089728A1
公开(公告)日：2009-04-02
申请号：US12253481
申请日：2008-10-17
申请人： Charles L. Alley , Robert B. Likovich, JR. , Joseph D. Mendenhall , Chad E. Winemiller
发明人： Charles L. Alley , Robert B. Likovich, JR. , Joseph D. Mendenhall , Chad E. Winemiller
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： Systems for using relative positioning of items or components in a structure with dynamic ranges, such as an elastic I/O bus design for an Integrated Circuit (IC), are disclosed. Embodiments may include a user-defined type module having user-defined types representing relative instance positions within a structure. Embodiments may also include a translation helper module to receive information associated with a hierarchy and to return location information associated with the hierarchy and a translation module to translate between a specific location and a relative position of the instance based on one or more user-defined types and location information returned from the translation helper module to generate a list of translated results. Further embodiments of the translation module may include a relative position determiner to translate specific locations to relative positions and may also include a specific location determiner to translate relative positions to specific locations.
摘要翻译：公开了在具有动态范围的结构中使用项目或部件的相对定位的系统，例如用于集成电路（IC）的弹性I / O总线设计。实施例可以包括具有表示结构内的相对实例位置的用户定义类型的用户定义类型模块。实施例还可以包括翻译帮助器模块，用于接收与层级相关联的信息并返回与层级相关联的位置信息，以及翻译模块，用于基于一个或多个用户定义的类型在实例的特定位置和相对位置之间进行转换和从翻译助手模块返回的位置信息以生成翻译结果的列表。翻译模块的其他实施例可以包括将特定位置转换为相对位置的相对位置确定器，并且还可以包括将相对位置转换为特定位置的特定位置确定器。

4. 发明申请

US20080162998A1 AUTOMATIC RECONFIGURATION OF AN I/O BUS TO CORRECT FOR AN ERROR BIT 审中-公开
标题翻译：自动重新配置I / O总线以纠正错误位
公开(公告)号：US20080162998A1
公开(公告)日：2008-07-03
申请号：US12048284
申请日：2008-03-14
申请人： Robert B. Likovich , Robert J. Reese , Joseph D. Mendenhall , Kenneth J. Barker
发明人： Robert B. Likovich , Robert J. Reese , Joseph D. Mendenhall , Kenneth J. Barker
IPC分类号： G06F11/00
CPC分类号： H04L1/22 , H04L1/242
摘要： A test pattern is loaded into a driver data shift register and sent from a driver chip to a receive chip over an M bit bus (0 to M−1). The test pattern is also generated at the receiver chip and used to compare to the actual received data. Failed compares are stored as logic ones in a bit error register (BER). A counter determines the number of failures by counting logic ones from the BER. The contents of a error position counter are latched in a error position latch and used to load a logic one (at the error bit position) into daisy chained self-heal control registers (SCR) in the receiver chip and the driver chip. The SCR sets a logic one into all bit positions after the error bit isolating the failed bit path and adding a spare bit path which is in bit position M.
摘要翻译：测试模式被加载到驱动器数据移位寄存器中，并通过M位总线（0到M-1）从驱动器芯片发送到接收芯片。测试模式也在接收芯片处产生，用于与实际接收的数据进行比较。失败的比较被存储为位错误寄存器（BER）中的逻辑比较。计数器通过从BER计数逻辑值来确定故障次数。错误位置计数器的内容被锁存在错误位置锁存器中，用于将逻辑1（在错误位位置）加载到接收器芯片和驱动器芯片中的菊花链自愈控制寄存器（SCR）中。在错误位隔离故障位路径并添加位位置M中的备用位路径之后，SCR将逻辑1设置为所有位位置。

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