专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06605527B2 Reduced area intersection between electrode and programming element 有权
公开(公告)号：US06605527B2
公开(公告)日：2003-08-12
申请号：US09896531
申请日：2001-06-30
申请人： Charles H. Dennison , Alice T. Wang , Patel Kanaiyalal Chaturbhai , Jenn C. Chow
发明人： Charles H. Dennison , Alice T. Wang , Patel Kanaiyalal Chaturbhai , Jenn C. Chow
IPC分类号： H01L214763
CPC分类号： H01L27/1021 , H01L21/761 , H01L27/24
摘要： A method comprising forming a first dielectric layer over an electrode formed to a first contact point on a substrate, the electrode having a contact area; patterning the first dielectric layer into a body, a thickness of the first dielectric layer defining a side wall; forming at least one spacer along the side wall of the first dielectric body, the at least one spacer overlying a portion of the contact area; forming a second dielectric layer on the contact area; removing the at least one spacer; and forming a material comprising a second contact point to the contact area. An apparatus comprising a volume of programmable material; a conductor; and an electrode disposed between the volume of programmable material and the conductor, the electrode having a contact area coupled to the volume of programmable material.

2. 发明授权

US07572666B2 Reduced area intersection between electrode and programming element 有权
标题翻译：电极与编程元件之间的减少交点
公开(公告)号：US07572666B2
公开(公告)日：2009-08-11
申请号：US10438146
申请日：2003-05-13
申请人： Charles H. Dennison , Alice T. Wang , Kanaiyalal Chaturbhai Patel , Jenn C. Chow
发明人： Charles H. Dennison , Alice T. Wang , Kanaiyalal Chaturbhai Patel , Jenn C. Chow
IPC分类号： H01L21/00
CPC分类号： H01L27/1021 , H01L21/761 , H01L27/24
摘要： A method comprising forming a first dielectric layer over an electrode formed to a first contact point on a substrate, the electrode having a contact area; patterning the first dielectric layer into a body, a thickness of the first dielectric layer defining a side wall; forming at least one spacer along the side wall of the first dielectric body, the at least one spacer overlying a portion of the contact area; forming a second dielectric layer on the contact area; removing the at least one spacer; and forming a material comprising a second contact point to the contact area. An apparatus comprising a volume of programmable material; a conductor; and an electrode disposed between the volume of programmable material and the conductor, the electrode having a contact area coupled to the volume of programmable material.
摘要翻译：一种方法，包括在形成于基底上的第一接触点的电极上形成第一介电层，所述电极具有接触面积; 将第一介电层图案化成体，第一介电层的厚度限定侧壁; 沿着所述第一电介质体的侧壁形成至少一个间隔物，所述至少一个间隔件覆盖所述接触区域的一部分; 在所述接触区域上形成第二电介质层; 去除所述至少一个间隔物; 以及形成包括接触区域的第二接触点的材料。一种包括一定量的可编程材料的装置; 指挥以及设置在所述可编程材料的体积和所述导体之间的电极，所述电极具有耦合到所述可编程材料的体积的接触面积。

3. 发明授权

US08455298B2 Method for forming self-aligned phase-change semiconductor diode memory 有权
标题翻译：用于形成自对准相变半导体二极管存储器的方法
公开(公告)号：US08455298B2
公开(公告)日：2013-06-04
申请号：US12543086
申请日：2009-08-18
申请人： Mac D. Apodaca , Ailian Zhao , Jenn C. Chow , Thomas Brown , Lisa Ceder
发明人： Mac D. Apodaca , Ailian Zhao , Jenn C. Chow , Thomas Brown , Lisa Ceder
IPC分类号： H01L21/06
CPC分类号： H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1683
摘要： A method for fabricating a memory device includes depositing a phase-change and/or a resistive change material. The memory device is formed photolithographically using sixteen or fewer masks.
摘要翻译：一种用于制造存储器件的方法，包括沉积相变和/或电阻变化材料。使用十六个或更少的掩模光刻地形成存储器件。

4. 发明申请

US20100047995A1 METHOD FOR FORMING SELF-ALIGNED PHASE-CHANGE SEMICONDUCTOR DIODE MEMORY 有权
标题翻译：用于形成自对准的相变半导体二极管存储器的方法
公开(公告)号：US20100047995A1
公开(公告)日：2010-02-25
申请号：US12543086
申请日：2009-08-18
申请人： Mac D. Apodaca , Ailian Zhao , Jenn C. Chow , Thomas Brown , Lisa Ceder
发明人： Mac D. Apodaca , Ailian Zhao , Jenn C. Chow , Thomas Brown , Lisa Ceder
IPC分类号： H01L21/768
CPC分类号： H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1683
摘要： A method for fabricating a memory device includes depositing a phase-change and/or a resistive change material. The memory device is formed photolithographically using sixteen or fewer masks.
摘要翻译：一种用于制造存储器件的方法，包括沉积相变和/或电阻变化材料。使用十六个或更少的掩模光刻地形成存储器件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式