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    • 1. 发明授权
    • Passivation layer for a metal film to prevent metal corrosion
    • 钝化层为金属膜防止金属腐蚀
    • US5854134A
    • 1998-12-29
    • US851399
    • 1997-05-05
    • Chao-Yi LanShean-Ren HorngYun-Hung ShenHung-Jen Tsai
    • Chao-Yi LanShean-Ren HorngYun-Hung ShenHung-Jen Tsai
    • H01L21/02H01L21/3213H01L21/302
    • H01L21/02071
    • The invention provides a method of fabricating corrosion free metal lines. The method involves forming a thin polymeric passivation layer 30 over the metal layer 20 immediately after the metal deposition and before any photolithographic or etching processes. The polymeric passivation layer 30 is formed using a F-containing gas plasma treatment. The passivation layer prevents corrosion of the metal layer before a metal etch. The passivation layer is preferably composed of a polymeric of C, O, and F and has a thickness in a range of between about 40 and 80 .ANG.. The passivation layer is formed using a F-containing plasma treatment at a power of between 225 and 275 W, a pressure between about 80 and 120 mtorr, a CHF.sub.3 flow between about 40 and 60 sccm and for a duration between about 10 to 30 seconds. Following this, the metal layer is patterned using photo and etch steps.
    • 本发明提供一种制造无腐蚀金属线的方法。 该方法包括在金属沉积之后和在任何光刻或蚀刻工艺之前立即在金属层20上形成薄的聚合物钝化层30。 使用含F气体等离子体处理形成聚合物钝化层30。 钝化层在金属蚀刻之前防止金属层的腐蚀。 钝化层优选由C,O和F的聚合物组成,并且具有在约40至80埃范围内的厚度。 钝化层使用含氟等离子体处理形成,功率为225-275W,压力为约80至120毫托,CHF 3流量为约40至60sccm,持续时间为约10至30秒 。 之后,使用光刻和蚀刻步骤对金属层进行构图。
    • 4. 发明申请
    • Noise reduction method
    • 降噪方法
    • US20060262206A1
    • 2006-11-23
    • US11433446
    • 2006-05-15
    • Wei-Kuo LeeYun-Hung ShenJi-Wei Wan
    • Wei-Kuo LeeYun-Hung ShenJi-Wei Wan
    • H04N5/217
    • G06T5/002G06T5/20G06T2207/10024H04N1/409
    • The present invention provides a noise reduction method for use in reducing noise of a digital image, the method comprising steps of: defining a target window on a coordinate plane defined by the first chrominance and the second chrominance as the horizontal axis and the vertical axis; determining a noise threshold value according to whether an input pixel having a first chrominance value and a second chrominance value is located inside the window; determining whether the input pixel is a noise point according to the noise threshold value and luminance values of neighboring pixels of the input pixel; and adjusting the luminance value of the input pixel if the input pixel is determined a noise point. Using the noise reduction method of the present invention, not only noise of a digital image can be identified, but also the degradation caused by the noise can be reduced and thus the overall picture quality can be improved.
    • 本发明提供一种用于降低数字图像噪声的噪声降低方法,该方法包括以下步骤:在由第一色度和第二色度定义的坐标平面上定义为水平轴和垂直轴的目标窗口; 根据具有第一色度值和第二色度值的输入像素是否位于窗口内,确定噪声阈值; 根据输入像素的噪声阈值和相邻像素的亮度值来确定输入像素是否是噪声点; 以及如果所述输入像素被确定为噪声点,则调整所述输入像素的亮度值。 使用本发明的降噪方法,不仅可以识别数字图像的噪声,而且可以降低由噪声引起的劣化,从而可以提高整体图像质量。
    • 6. 发明授权
    • Method to reduce the metal TiN ARC damage in etching back process
    • 减少蚀刻回蚀过程中金属TiN ARC损伤的方法
    • US06475917B1
    • 2002-11-05
    • US09428573
    • 1999-10-28
    • Yun-Hung ShenYu-Lun Lin
    • Yun-Hung ShenYu-Lun Lin
    • H01L21302
    • H01L21/76819H01L21/31055H01L21/31116H01L21/31138
    • A method for forming on a substrate employed within a microelectronics fabrication a planarized inter-level metal dielectric (IMD) layer employing spin-on-glass (SOG) dielectric material, with attenuated etching damage to underlying layers. There is provided a substrate upon which is formed a patterned microelectronics layer over which is formed an inter-level metal dielectric (IMD) layer comprising a first silicon oxide dielectric layer and a second spin-on-glass (SOG) dielectric layer. The IMD layer is then planarized by plasma etchback method employing an etch cycle interrupted by an inert gas flushing step and substrate backside cooling by helium gas to control substrate temperature and etching reaction rates, resulting in attenuated damage to underlying layers resulting from over-etching of the IMD layer.
    • 一种用于在微电子制造中使用的衬底上形成的使用旋涂玻璃(SOG)电介质材料的平坦化级间金属电介质(IMD)层的方法,对下层具有减弱的蚀刻损伤。 提供了一个基板,在其上形成图案化的微电子层,在其上形成包括第一氧化硅介电层和第二旋涂玻璃(SOG)介电层的层间金属介电层(IMD)层。 然后通过采用惰性气体冲洗步骤中断的蚀刻循环和氦气衬底背面冷却来控制衬底温度和蚀刻反应速率的等离子体回蚀法对IMD层进行平坦化,从而导致由于过度蚀刻 IMD层。
    • 8. 发明申请
    • Temperature-dependent overdrive circuit for LCD panel and method of implementing the same
    • LCD面板的温度依赖性过驱动电路及其实现方法
    • US20080224981A1
    • 2008-09-18
    • US11686960
    • 2007-03-16
    • Yun-Hung ShenSteve Wiyi Yang
    • Yun-Hung ShenSteve Wiyi Yang
    • G09G3/36G01K13/00
    • G01K13/00G09G3/3611G09G2320/0252G09G2320/041G09G2340/16
    • A circuit for overdriving an LCD panel according to an image data and a temperature, and the corresponding are disclosed. The circuit includes: a memory for storing a previous image data; a plurality of LUTs, each coupled to receive the previous image data from the memory and a present image data, for storing overdrive values; a first temperature sensor, for sensing the temperature of a first area of the LCD panel to generate a first temperature data; a control circuit, for generating a selection signal and a temperature correction coefficient according to the first temperature data; a selection circuit, coupled to the plurality of LUTs, for selecting one LUT from the plurality of LUTs according to the selection signal and outputting the overdrive value of the selected LUT; and an overdrive processor, for generating adjusted image data according to the overdrive value and the temperature correction coefficient.
    • 公开了根据图像数据和温度来过度驱动LCD面板的电路及其相应的电路。 该电路包括:用于存储先前图像数据的存储器; 多个LUT,每个LUT被耦合以从存储器接收先前的图像数据和当前图像数据,用于存储过驱动值; 第一温度传感器,用于感测LCD面板的第一区域的温度以产生第一温度数据; 控制电路,用于根据第一温度数据产生选择信号和温度校正系数; 耦合到所述多个LUT的选择电路,用于根据所述选择信号从所述多个LUT中选择一个LUT,并输出所选择的LUT的过驱动值; 以及过驱动处理器,用于根据过驱动值和温度校正系数产生调整图像数据。
    • 10. 发明授权
    • Integrated process flow to improve the electrical isolation within self aligned contact structure
    • 集成的工艺流程,以改善自对准接触结构内的电气隔离
    • US06194302B1
    • 2001-02-27
    • US09408495
    • 1999-09-30
    • Yun-Hung Shen
    • Yun-Hung Shen
    • H01L21336
    • H01L21/76897
    • A method of fabrication of a top half spacer on a first spacer on a gate structure for a self aligned contact (SAC) process. The method begins by providing at least two spaced gate structures having first spacers on a substrate. Next, we form a first insulating layer over the substrate. Then we form a first dielectric layer over the surface. The first dielectric layer is etched back to form an top spacer on the sidewalls of the first spacer. A second insulating layer is formed over the first insulating layer, the top spacer and the gate structures. A photoresist layer is formed over the second insulating layer. The photoresist layer having a contact photoresist opening over the top spacers and first spacers. The first and second insulating layers are etched using the first and the top spacers as etch masks to form a self aligned contact (SAC) opening. Lastly, a self aligned contact (SAC) is formed filling the self aligned contact (SAC) opening. The top spacers acts as an etch buffer during the SAC opening etch to protect the gate structure from shorting to the contact plug.
    • 一种制造用于自对准接触(SAC)工艺的栅极结构上的第一间隔物上的上半隔板的方法。 该方法开始于在衬底上提供具有第一间隔物的至少两个间隔开的栅极结构。 接下来,我们在衬底上形成第一绝缘层。 然后我们在表面上形成第一介电层。 第一电介质层被回蚀刻以在第一间隔物的侧壁上形成顶部间隔物。 在第一绝缘层,顶部间隔物和栅极结构之上形成第二绝缘层。 在第二绝缘层上形成光致抗蚀剂层。 光致抗蚀剂层具有在顶部间隔物和第一间隔物上开口的接触光刻胶。 使用第一和顶部间隔物作为蚀刻掩模来蚀刻第一和第二绝缘层以形成自对准接触(SAC)开口。 最后,形成填充自对准接触(SAC)开口的自对准接触(SAC)。 在SAC开口蚀刻期间,顶部间隔物用作蚀刻缓冲器,以保护栅极结构免于短路到接触插塞。