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1. 发明授权

US06838300B2 Chemical treatment of low-k dielectric films 有权
标题翻译：低k电介质薄膜的化学处理
公开(公告)号：US06838300B2
公开(公告)日：2005-01-04
申请号：US10357560
申请日：2003-02-04
申请人： Changming Jin , Phillip D. Matz , Heungsoo Park , Patricia B. Smith , Andrew J. McKerrow
发明人： Changming Jin , Phillip D. Matz , Heungsoo Park , Patricia B. Smith , Andrew J. McKerrow
IPC分类号： H01L21/3065 , H01L21/033 , H01L21/3105 , H01L21/316 , H01L21/768 , H01L23/522 , H01L21/00
CPC分类号： H01L21/0214 , H01L21/02126 , H01L21/02131 , H01L21/02321 , H01L21/02332 , H01L21/0234 , H01L21/0332 , H01L21/3105 , H01L21/31629 , H01L21/76826 , H01L21/76828 , H01L21/76829
摘要： A method of forming an integrated circuit including an organosilicate low dielectric constant insulating layer (40) formed of a substitution group depleted silicon oxide, such as an organosilicate glass, is disclosed. Subsequent plasma processing has been observed to break bonds in such an insulating layer (40), resulting in molecules at the surface of the film with dangling bonds. Eventually, the damaged insulating layer (40) includes silanol molecules, which results in a degraded film. The disclosed method exposes the damaged insulating layer (40) to a thermally or plasma activated fluorine, hydrogen, or nitrogen, which reacts with the damaged molecules to form a passivated surface for the insulating layer (40).
摘要翻译：公开了一种形成集成电路的方法，该集成电路包括由有机硅酸盐玻璃等取代基贫氧化硅形成的有机硅酸盐低介电常数绝缘层（40）。已经观察到随后的等离子体处理破坏了这种绝缘层（40）中的结合，从而导致具有悬挂键的膜表面的分子。最终，损坏的绝缘层（40）包括硅烷醇分子，这导致膜的退化。所公开的方法将损坏的绝缘层（40）暴露于热或等离子体活化的氟，氢或氮，其与损坏的分子反应以形成绝缘层（40）的钝化表面。

2. 发明授权

US07067441B2 Damage-free resist removal process for ultra-low-k processing 有权
标题翻译：用于超低k处理的无损伤抗蚀剂去除工艺
公开(公告)号：US07067441B2
公开(公告)日：2006-06-27
申请号：US10702949
申请日：2003-11-06
申请人： Patricia B. Smith , Phillip D. Matz
发明人： Patricia B. Smith , Phillip D. Matz
IPC分类号： H01L21/469
CPC分类号： H01L21/76802 , G03F7/427 , H01L21/02052 , H01L21/31116 , H01L21/31133 , H01L21/31138
摘要： A process for removing resist (114) from a CDO dielectric material (110) that uses a non-damaging plasma in a reducing atmosphere under high power and using a structure (150) or other means to limit ions from the plasma from reaching the surface of the CDO material (110).
摘要翻译：一种从CDO电介质材料（110）去除抗蚀剂（114）的方法，该方法在高功率下在还原气氛中使用非破坏性的等离子体，并且使用结构（150）或其它方法来限制来自等离子体的离子到达表面的CDO材料（110）。

3. 发明授权

US07232768B2 Hydrogen plasma photoresist strip and polymeric residue cleanup process for low dielectric constant materials 有权
标题翻译：用于低介电常数材料的氢等离子体光刻胶条和聚合物残渣清除工艺
公开(公告)号：US07232768B2
公开(公告)日：2007-06-19
申请号：US11622821
申请日：2007-01-12
申请人： Patricia B. Smith , Mona M. Eissa
发明人： Patricia B. Smith , Mona M. Eissa
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/02063 , G03F7/427 , H01L21/02052 , H01L21/31116 , H01L21/31138 , H01L21/76802 , H01L21/76814 , H01L21/76838 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a layer (215) of a first material in a fixed position relative to the wafer. The first material has a dielectric constant less than 3.6. The method also forms a photoresist layer in (216) a fixed position relative to the layer of the first material. The method also forms at least one void (220) through the layer of the first material in response to the photoresist layer. Further, the method subjects (106) the semiconductor wafer to a plasma which incorporates a gas which includes hydrogen so as to remove the photoresist layer.
摘要翻译：一种制造形成在半导体晶片上的电子器件（200）的方法（100）。该方法形成相对于晶片处于固定位置的第一材料层（215）。第一种材料的介电常数小于3.6。该方法还在（216）中形成相对于第一材料层的固定位置的光致抗蚀剂层。该方法还响应于光致抗蚀剂层形成穿过第一材料层的至少一个空隙（220）。此外，方法将半导体晶片（106）将等离子体（106）包括包含氢的气体以除去光致抗蚀剂层。

4. 发明授权

US07001848B1 Hydrogen plasma photoresist strip and polymeric residue cleanup process for oxygen-sensitive materials 有权
标题翻译：氢等离子体光刻胶条和聚合物残留物清除工艺用于氧敏感材料
公开(公告)号：US07001848B1
公开(公告)日：2006-02-21
申请号：US09199829
申请日：1998-11-25
申请人： Patricia B. Smith , David B. Aldrich , Stephen W. Russell
发明人： Patricia B. Smith , David B. Aldrich , Stephen W. Russell
IPC分类号： H01L21/302
CPC分类号： G03F7/427 , H01L21/02063 , H01L21/31138
摘要： Another embodiment of the instant invention is a method of fabricating a conductive interconnect for providing an electrical connection between a first conductor and a second conductor for an electrical device formed in a semiconductor substrate, the method comprising the steps of: forming a dielectric layer (layer 226 of FIG. 2a) on the first conductor (conductor 222 of FIG. 2a), the dielectric layer having at least one opening which exposes the first conductor; forming a layer of an oxygen-sensitive material (layer 234 of FIG. 2d) on the dielectric layer, the oxygen-sensitive material substantially filling the opening in the dielectric layer and for providing an electrical contact to the first conductor; forming a photoresist layer on the oxygen-sensitive material, the photoresist layer having a pattern so as to expose portions of the oxygen-sensitive material; removing the exposed portions of the oxygen-sensitive material on the dielectric material, the removal step causing a residue to be formed on exposed surfaces of the remaining portions of the oxygen-sensitive material; and removing the photoresist layer by subjecting the photoresist layer with a hydrogen-containing gas incorporated into a plasma.
摘要翻译：本发明的另一实施例是一种制造导电互连的方法，用于在第一导体和用于形成在半导体衬底中的电子器件的第二导体之间提供电连接，所述方法包括以下步骤：形成电介质层（层图2A的226）在第一导体（图2a的导体222）上，电介质层具有暴露第一导体的至少一个开口; 在电介质层上形成氧敏感材料层（图2d的层234），氧敏感材料基本上填充介电层中的开口并提供与第一导体的电接触; 在所述感氧材料上形成光致抗蚀剂层，所述光致抗蚀剂层具有图案以暴露所述氧敏感材料的部分; 去除电介质材料上的氧敏感材料的暴露部分，去除步骤，使残留物形成在氧敏感材料的剩余部分的暴露表面上; 以及通过将掺入等离子体的含氢气体对光致抗蚀剂层进行处理来除去光致抗蚀剂层。

5. 发明授权

US06967173B2 Hydrogen plasma photoresist strip and polymeric residue cleanup processs for low dielectric constant materials 有权
标题翻译：用于低介电常数材料的氢等离子体光刻胶条和聚合物残渣清除工艺
公开(公告)号：US06967173B2
公开(公告)日：2005-11-22
申请号：US09975639
申请日：2001-10-11
申请人： Patricia B. Smith , Mona M. Eissa
发明人： Patricia B. Smith , Mona M. Eissa
IPC分类号： G03F7/42 , H01L21/02 , H01L21/311 , H01L21/768 , H91L21/302
CPC分类号： H01L21/02063 , G03F7/427 , H01L21/31133 , H01L21/31138 , H01L21/76814 , H01L21/76838
摘要： A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a layer (215) of a first material in a fixed position relative to the wafer. The first material has a dielectric constant less than 3.6. The method also forms a photoresist layer in (216) a fixed position relative to the layer of the first material. The method also forms at least one void (220) through the layer of the first material in response to the photoresist layer. Further, the method subjects (106) the semiconductor wafer to a plasma which incorporates a gas which includes hydrogen so as to remove the photoresist layer.
摘要翻译：一种制造形成在半导体晶片上的电子器件（200）的方法（100）。该方法形成相对于晶片处于固定位置的第一材料层（215）。第一种材料的介电常数小于3.6。该方法还在（216）中形成相对于第一材料的层的固定位置的光致抗蚀剂层。该方法还响应于光致抗蚀剂层形成穿过第一材料层的至少一个空隙（220）。此外，方法将半导体晶片（106）将等离子体（106）包括包含氢的气体以除去光致抗蚀剂层。

6. 发明授权

US5318666A Method for via formation and type conversion in group II and group VI materials 失效
标题翻译： Ⅱ组和VI组材料通孔形成和类型转换的方法
公开(公告)号：US5318666A
公开(公告)日：1994-06-07
申请号：US049755
申请日：1993-04-19
申请人： Jerome L. Elkind , Glennis J. Orloff , Patricia B. Smith
发明人： Jerome L. Elkind , Glennis J. Orloff , Patricia B. Smith
IPC分类号： H01L21/461 , H01L21/465 , H01L21/475 , H01L27/146 , H01L21/00
CPC分类号： H01L21/76898 , H01L21/461 , H01L21/465 , H01L21/475 , H01L23/481 , H01L27/1467 , H01L2924/0002 , Y10S438/916 , Y10S438/971
摘要： A method of forming an n-p junction in a body (44, 44a, 44b) formed of Group II and Group VI elements. The body (44, 44a, 44b) initially is of p-type conductivity characteristic, and a dry reactive etching process is employed for forming a via (60, 60a, 60b) in the body by a chemical reaction which is also effective to type convert a portion of the body adjacent the via. An n-doped region (64, 64a, 64b) is thereby formed within the body around the via and between the via and the remaining, p-doped region of the body, thereby defining an n-p junction. In one embodiment, the body is mounted on an electrical device (50, 50a, 50b) having an input contact pad (58, 58a, 58b), and an electrically conductive layer (62, 46a, 90) is formed in connection with the contact pad and the n-doped region adjacent the via. In one application, a plurality of the n-p doped via junctions are formed in laterally spaced orientation for providing an array of infrared radiation sensitive photodiodes (24, 24a, 24b), the n-doped region of each diode having electrical connection with a respective contact pad of the electrical device.
摘要翻译：一种在由组II和VI组成的体（44,44a，44b）中形成n-p结的方法。本体（44,44a，44b）最初是p型导电特性，采用干式反应蚀刻工艺，通过化学反应在体内形成通孔（60,60a，60b）转换邻近通孔的身体的一部分。因此，在体内围绕通孔和通孔与本体的剩余的p掺杂区域之间在体内形成n掺杂区域（64,64a，64b），由此限定n-p结。在一个实施例中，主体安装在具有输入接触焊盘（58,58a，58b）的电气设备（50,50a，50b）上，并且导电层（62,46a，90）与接触焊盘和邻近通孔的n掺杂区域。在一个应用中，多个np掺杂的通孔结形成为横向间隔的取向以提供红外辐射敏感光电二极管阵列（24,24a，24b），每个二极管的n掺杂区域与相应的触点电连接电气设备的垫。

7. 发明授权

US5017511A Method for dry etching vias in integrated circuit layers 失效
标题翻译：集成电路层干法蚀刻通孔的方法
公开(公告)号：US5017511A
公开(公告)日：1991-05-21
申请号：US377514
申请日：1989-07-10
申请人： Jerome L. Elkind , Patricia B. Smith , Larry D. Hutchins , Joseph D. Luttmer , Rudy L. York , Julie S. England
发明人： Jerome L. Elkind , Patricia B. Smith , Larry D. Hutchins , Joseph D. Luttmer , Rudy L. York , Julie S. England
IPC分类号： H01L21/465 , H01L21/467 , H01L21/4757
CPC分类号： H01L21/465 , H01L21/467 , H01L21/47573 , Y10S148/051
摘要： A process is disclosed through which vias (50) can be formed by the reaction of an etchant species (52) with a mercury cadmium telluride (HgCdTe) or zinc sulfide (ZnS) layer (42). The activating gases (20) are preferably a hydrogen gas or a methane gas which is excited in a diode plasma reactor (100) which has an RF power source (13) applied to one of two parallel electrodes. The etching occurs in selected areas in a photoresist pattern (44) residing over the ZnS or HgCdTe layer (42). Wet etching the layer (42) with a wet etchant (54) following the dry etching, improves the via (50) by making the walls (48) smoother, and allowing for expansion of the vias (50) to a dimension necessary for proper operation of a HgCdTe-based infrared detector.

8. 发明授权

US07179751B2 Hydrogen plasma photoresist strip and polymeric residue cleanup process for low dielectric constant materials 有权
公开(公告)号：US07179751B2
公开(公告)日：2007-02-20
申请号：US11140771
申请日：2005-05-31
申请人： Patricia B. Smith , Mona M. Eissa
发明人： Patricia B. Smith , Mona M. Eissa
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/02063 , G03F7/427 , H01L21/02052 , H01L21/31116 , H01L21/31138 , H01L21/76802 , H01L21/76814 , H01L21/76838 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a layer (215) of a first material in a fixed position relative to the wafer. The first material has a dielectric constant less than 3.6. The method also forms a photoresist layer in (216) a fixed position relative to the layer of the first material. The method also forms at least one void (220) through the layer of the first material in response to the photoresist layer. Further, the method subjects (106) the semiconductor wafer to a plasma which incorporates a gas which includes hydrogen so as to remove the photoresist layer.

9. 发明授权

US06727185B1 Dry process for post oxide etch residue removal 有权
标题翻译：用于后氧化物蚀刻残留物去除的干法
公开(公告)号：US06727185B1
公开(公告)日：2004-04-27
申请号：US09679800
申请日：2000-10-05
申请人： Patricia B. Smith , Antonio L. P. Rotondaro , David B. Aldrich , Eric C. Williams
发明人： Patricia B. Smith , Antonio L. P. Rotondaro , David B. Aldrich , Eric C. Williams
IPC分类号： H01L21302
CPC分类号： H01L21/31116 , Y10S438/906
摘要： A cleanup process that uses a dilute fluorine in oxygen chemistry in a downstream plasma tool to remove organic and inorganic polymeric residues (116).
摘要翻译：在下游等离子体工具中使用氧化学中的稀氟来去除有机和无机聚合物残余物的清除方法（116）。

10. 发明授权

US4988533A Method for deposition of silicon oxide on a wafer 失效
标题翻译：在晶圆上沉积氧化硅的方法
公开(公告)号：US4988533A
公开(公告)日：1991-01-29
申请号：US203583
申请日：1988-05-27
申请人： Dean W. Freeman , Joseph D. Luttmer , Patricia B. Smith , Cecil J. Davis
发明人： Dean W. Freeman , Joseph D. Luttmer , Patricia B. Smith , Cecil J. Davis
IPC分类号： C23C16/40
CPC分类号： C23C16/402
摘要： A processing apparatus and method for depositing a silicon oxide layer on a temperature sensitive wafer utilizing a single process chamber provide nitrous oxide gas to the chamber with the excitation energy being provided by a remotely generated plasma while supplying silane gas in combination with illuminating the wafer with an in situ generated ultraviolet energy to produce the silicon oxide layer.
摘要翻译：使用单个处理室在温度敏感晶片上沉积氧化硅层的处理装置和方法向室提供氧化亚氮气体，其中激发能由远程产生的等离子体提供，同时将硅烷气体与照射晶片同时原位产生的紫外线能量以产生氧化硅层。

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