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1. 发明授权

US06578097B1 Method and apparatus for transmitting registered data onto a PCI bus 有权
标题翻译：将注册数据发送到PCI总线上的方法和装置
公开(公告)号：US06578097B1
公开(公告)日：2003-06-10
申请号：US09651423
申请日：2000-08-30
申请人： Chang-Fu Lin , Chih-Jou Lin
发明人： Chang-Fu Lin , Chih-Jou Lin
IPC分类号： G06F100
CPC分类号： G06F13/423 , G06F13/4068
摘要： A method and apparatus for transmitting registered data onto a PCI bus is provided, which can reduce the delay time of manipulating the outgoing signals without greatly increasing the circuit complexity. The apparatus employee a 2R1W data buffer to send a current phase data and a next phase data one clock cycle ahead of the actual AD activity on PCI bus and use a multiplexer to select the current phase data or the next phase data according to a select signal. The select signal is outputted by a OR gate with IRDY# and TRDY# signals as its inputs. Then, the apparatus use a flip-flop to toggling the output signal of the multiplexer to the PCI bus at the actual AD activity. Therefore, the apparatus of the present invention not only reduce the delay time of manipulating the outgoing signals, but also is implemented with simple architecture.
摘要翻译：提供一种将注册数据发送到PCI总线上的方法和装置，其可以减少操纵输出信号的延迟时间，而不会大大增加电路复杂度。该设备雇员一个2R1W数据缓冲器，用于在PCI总线上的实际AD活动之前一个时钟周期发送当前相位数据和下一个相位数据，并使用多路复用器根据选择信号选择当前相位数据或下一个相位数据。选择信号由IRDY＃和TRDY＃信号作为其输入的或门输出。然后，该设备使用触发器在实际的AD活动下切换多路复用器的输出信号到PCI总线。因此，本发明的装置不仅减少了操纵输出信号的延迟时间，而且还以简单的架构来实现。

2. 发明授权

US07863731B2 Heat-dissipating structure and heat-dissipating semiconductor package having the same 有权
标题翻译：散热结构及其散热半导体封装
公开(公告)号：US07863731B2
公开(公告)日：2011-01-04
申请号：US12001612
申请日：2007-12-11
申请人： Chin-Te Chen , Ke-Chuan Yang , Chang-Fu Lin
发明人： Chin-Te Chen , Ke-Chuan Yang , Chang-Fu Lin
IPC分类号： H01L23/10
CPC分类号： H01L23/367 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/3011 , H01L2924/00 , H01L2224/0401
摘要： A heat-dissipating structure and a heat-dissipating semiconductor package having the same are disclosed in the present invention. The heat-dissipating semiconductor package includes a chip carrier, a flip chip semiconductor chip attached and electrically connected to the chip carrier, and a heat sink bonded to the flip chip semiconductor chip via a thermal interface material, such as a solder material, wherein a groove is formed on the heat sink around the bonding area of the thermal interface material, and a blocking layer, such as a metal oxide layer, is formed on the surface of the groove to reduce the wetting capability of the thermal interface material, thus further prevents the thermal interface material from wetting the groove in the fusion process performed the thermal interface material, therefore, it ensures the thermal interface material has sufficient thickness for forming solder bonding between the heat sink and the flip chip semiconductor chip.
摘要翻译：在本发明中公开了一种散热结构和具有该散热结构的散热半导体封装。散热半导体封装包括芯片载体，安装并电连接到芯片载体的倒装芯片半导体芯片，以及通过诸如焊料材料的热界面材料接合到倒装芯片半导体芯片的散热器，其中a 在热界面材料的接合区域周围的散热器上形成凹槽，并且在凹槽的表面上形成诸如金属氧化物层的阻挡层，以降低热界面材料的润湿能力，因此进一步防止热界面材料在进行热界面材料的熔融过程中润湿槽，因此，确保热界面材料具有足够的厚度，用于在散热器和倒装芯片半导体芯片之间形成焊接。

3. 发明授权

US06849942B2 Semiconductor package with heat sink attached to substrate 有权
标题翻译：带散热片的半导体封装连接到基板上
公开(公告)号：US06849942B2
公开(公告)日：2005-02-01
申请号：US10438463
申请日：2003-05-14
申请人： Chang-Fu Lin , Han-Ping Pu , Cheng-Hsu Hsiao , Chien Ping Huang
发明人： Chang-Fu Lin , Han-Ping Pu , Cheng-Hsu Hsiao , Chien Ping Huang
IPC分类号： H01L23/367 , H01L23/34
CPC分类号： H01L23/3675 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00014 , H01L2924/15311 , H01L2924/16251 , H01L2924/19105 , H01L2924/00012 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a flange in contact with the substrate, allowing a plurality of clip members to clamp the flange of the heat sink and the substrate. Each of the clip members has a recess portion for receiving the flange of the heat sink and the substrate to thereby firmly position the heat sink on the substrate. The clip members are engaged with edges of the heat sink and the substrate, thereby not affecting trace routability on the substrate. Moreover, the heat sink is mounted on the substrate and would not be dislocated.
摘要翻译：提供了具有散热器的半导体封装，其中至少一个芯片安装在基板上并被散热器覆盖。散热器形成有与基板接触的凸缘，允许多个夹子构件夹紧散热器和基板的凸缘。每个夹子构件具有用于容纳散热器和基板的凸缘的凹部，从而将散热器牢固地定位在基板上。夹子构件与散热器和基板的边缘接合，从而不影响基板上的迹线布线性。此外，散热器安装在基板上并且不会脱位。

4. 发明授权

US06424189B1 Apparatus and system for multi-stage event synchronization 失效
标题翻译：多级事件同步的装置和系统
公开(公告)号：US06424189B1
公开(公告)日：2002-07-23
申请号：US09687418
申请日：2000-10-13
申请人： Jen-Pin Su , Tsan-Hui Chen , Wen-Hsiang Lin , Chun-Chieh Wu , Chang-Fu Lin
发明人： Jen-Pin Su , Tsan-Hui Chen , Wen-Hsiang Lin , Chun-Chieh Wu , Chang-Fu Lin
IPC分类号： H03L700
CPC分类号： G06F5/06 , H04L7/005 , H04L7/02
摘要： The present invention discloses an apparatus and system for multi-stage event synchronization, whose main object is to eliminate the drawbacks of an expensive synchronization circuit used to balance the data transmissions between an origination agent and a destination agent operating at different frequencies or clock phases as in prior art. The apparatus of the present invention organizes the slower one with multi-stage chains, each of which comprises a simple synchronization circuit and an XOR gate, for receiving the number of events transmitted from the faster one. Therefore, the slower one will not miss the data from the faster one.
摘要翻译：本发明公开了一种用于多级事件同步的装置和系统，其主要目的是消除用于平衡在不同频率或时钟相位工作的发起代理和目的代理之间的数据传输的昂贵的同步电路的缺点，如在现有技术中。本发明的装置组合了具有多级链的较慢级的链，其中每一级都包括一个简单的同步电路和一个异或门，用于接收从较快级链发送的事件数。因此，较慢的数据不会错过更快的数据。

5. 发明授权

US08698326B2 Semiconductor package and fabrication method thereof 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US08698326B2
公开(公告)日：2014-04-15
申请号：US11900345
申请日：2007-09-10
申请人： Wen-Home Huang , Wen-Tsung Tseng , Chang-Fu Lin , Ho-Yi Tsai , Cheng-Hsu Hsiao
发明人： Wen-Home Huang , Wen-Tsung Tseng , Chang-Fu Lin , Ho-Yi Tsai , Cheng-Hsu Hsiao
IPC分类号： H01L23/28 , H01L23/48
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/3142 , H01L29/0657 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/10158 , H01L2924/15311 , H01L2924/3011 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.
摘要翻译：公开了半导体封装及其制造方法。该制造方法包括以下步骤：提供具有与活性表面相对的活性表面和非活性表面的半导体芯片，粗糙化非活性表面的周边部分，以将非活性表面划分成周边部分形成有粗糙结构和非粗糙化的中心部分，通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上，在芯片载体上形成密封剂以封装半导体芯片。形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合，并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持半导体芯片的结构强度。

6. 发明授权

US08207973B2 Systems and methods for control signal and data transmission between various types of electronic modules 有权
标题翻译：各类电子模块之间控制信号和数据传输的系统和方法
公开(公告)号：US08207973B2
公开(公告)日：2012-06-26
申请号：US12176674
申请日：2008-07-21
申请人： Chang-Fu Lin , Shu-Wen Teng , Cheng-Che Chen , Wei-Cheng Gu
发明人： Chang-Fu Lin , Shu-Wen Teng , Cheng-Che Chen , Wei-Cheng Gu
IPC分类号： G09G3/36 , G09G5/39 , H04B7/24 , H04N7/24
CPC分类号： H04L12/66 , H04N1/00127 , H04N1/00129 , H04N2101/00 , H04N2201/0048
摘要： An electronic device is disclosed. The electronic device comprises a transmitter, a converter, and a receiver. The transmitter transmits data and a control signal. The converter receives the control signal from the transmitter and converts the control signal. The receiver receives the data from the transmitter via a data bus isolated from the converter and receives the converted control signal from the converter. The data transmitted from the transmitter is directly electrically connected to the receiver.
摘要翻译：公开了一种电子设备。电子设备包括发射机，转换器和接收机。发射机发射数据和控制信号。转换器从发送器接收控制信号并转换控制信号。接收器通过与转换器隔离的数据总线从发送器接收数据，并从转换器接收转换后的控制信号。从发射机发送的数据直接电连接到接收机。

7. 发明授权

US08194146B2 Apparatuses for capturing and storing real-time images 有权
标题翻译：用于捕获和存储实时图像的设备
公开(公告)号：US08194146B2
公开(公告)日：2012-06-05
申请号：US12191547
申请日：2008-08-14
申请人： Chang-Fu Lin , Shu-Wen Teng , Cheng-Che Chen , Wei Cheng Gu , Ching-Chao Yang , Shih Tang Lin
发明人： Chang-Fu Lin , Shu-Wen Teng , Cheng-Che Chen , Wei Cheng Gu , Ching-Chao Yang , Shih Tang Lin
IPC分类号： H04N5/228
CPC分类号： H04N5/772 , H04N5/04 , H04N5/765
摘要： An apparatus for capturing and storing real-time images is provided. A camera module records frames corresponding to sensed light, outputs pixel data of the frames on a data bus, and generates synchronization control signals to control the synchronized transmission of the frames. An interrupt controller receives the synchronization control signals and correspondingly generates interrupt signals. A processing unit receives the interrupt signals, fetches the pixel data of the frames on the data bus according to at least one of the interrupt signals, and stores the fetched pixel data in a memory device.
摘要翻译：提供了一种用于捕获和存储实时图像的设备。相机模块记录与感测光对应的帧，在数据总线上输出帧的像素数据，并产生同步控制信号以控制帧的同步传输。中断控制器接收同步控制信号并相应产生中断信号。处理单元接收中断信号，根据至少一个中断信号取出数据总线上的帧的像素数据，并将获取的像素数据存储在存储器件中。

8. 发明授权

US07937520B2 General purpose interface controller of resoure limited system 有权
标题翻译：通用接口控制器
公开(公告)号：US07937520B2
公开(公告)日：2011-05-03
申请号：US12271073
申请日：2008-11-14
申请人： Chang-Fu Lin , Shu-Wen Teng , Wei Cheng Gu , Cheng-Che Chen
发明人： Chang-Fu Lin , Shu-Wen Teng , Wei Cheng Gu , Cheng-Che Chen
IPC分类号： G06F13/36
CPC分类号： G06F13/387
摘要： The invention discloses a general purpose interface controller, including a slave interface controller and a master interface controller, used to exchange data among master devices and slave devices in an electronic device. The slave interface controller receives data and a first control signal from one of the master devices, and converts the first control signal to a request signal. The master interface controller receives the data and the request signal from the slave interface controller, converts the request signal to a second control signal recognized by at least one of the slave devices, and forwards the data and the second control signal to the slave device.
摘要翻译：本发明公开了一种通用接口控制器，包括从接口控制器和主接口控制器，用于在电子设备中的主设备和从设备之间交换数据。从接口控制器从主设备之一接收数据和第一控制信号，并将第一控制信号转换为请求信号。主接口控制器从从接口控制器接收数据和请求信号，将请求信号转换成由至少一个从设备识别的第二控制信号，并将数据和第二控制信号转发给从设备。

9. 发明申请

US20080061451A1 Semiconductor package and fabrication method thereof 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20080061451A1
公开(公告)日：2008-03-13
申请号：US11900345
申请日：2007-09-10
申请人： Wen-Home Huang , Wen-Tsung Tseng , Chang-Fu Lin , Ho-Yi Tsai , Cheng-Hsu Hsiao
发明人： Wen-Home Huang , Wen-Tsung Tseng , Chang-Fu Lin , Ho-Yi Tsai , Cheng-Hsu Hsiao
IPC分类号： H01L23/495 , H01L21/00
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/3142 , H01L29/0657 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/10158 , H01L2924/15311 , H01L2924/3011 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.
摘要翻译：公开了半导体封装及其制造方法。该制造方法包括以下步骤：提供具有与活性表面相对的活性表面和非活性表面的半导体芯片，粗糙化非活性表面的周边部分，以将非活性表面划分成周边部分形成有粗糙结构和非粗糙化的中心部分，通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上，在芯片载体上形成密封剂以封装半导体芯片。形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合，并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持半导体芯片的结构强度。

10. 发明申请

US20070050553A1 PROCESSING MODULES WITH MULTILEVEL CACHE ARCHITECTURE 有权
标题翻译：具有多个高速缓存架构的处理模块
公开(公告)号：US20070050553A1
公开(公告)日：2007-03-01
申请号：US11307073
申请日：2006-01-23
申请人： Ting-Cheng Hsu , Yen-Yu Lin , Chih-Wei Ko , Chang-Fu Lin
发明人： Ting-Cheng Hsu , Yen-Yu Lin , Chih-Wei Ko , Chang-Fu Lin
IPC分类号： G06F12/00
CPC分类号： G06F12/0848 , G06F12/0857 , G06F12/0897
摘要： A processing module with multilevel cache architecture, including: a processor; a level-one (L1) cache, coupled to the processor, for caching data for the processor, wherein the L1 cache has at least one L1 cacheable range; a level-two (L2) cache, coupled to the L1 cache, for caching data for the processor, wherein the L2 cache has at least one L2 cacheable range, and the L1 cacheable range and the L2 cacheable range are mutually exclusive; and a memory interface, coupled to the L1 cache and the L2 cache, for transferring data between the L1 cache and a memory and for transferring data between the L2 cache and the memory.
摘要翻译：具有多级缓存架构的处理模块，包括：处理器; 耦合到所述处理器的用于高速缓存用于所述处理器的数据的一级缓存（L 1），其中所述L 1高速缓存具有至少一个L 1可缓存范围; 耦合到所述L1缓存的二级（L2）高速缓存，用于缓存用于所述处理器的数据，其中所述L 2高速缓存具有至少一个L 2可缓存范围，并且所述L 1可缓存范围和所述L 2可缓存范围是相互排斥的以及耦合到L 1缓存和L 2高速缓存的存储器接口，用于在L 1高速缓存和存储器之间传送数据，并用于在L 2高速缓存和存储器之间传送数据。

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