专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090164852A1 Preemptive Thermal Management For A Computing System Based On Cache Performance 有权
标题翻译：基于缓存性能的计算系统的先发热管理
公开(公告)号：US20090164852A1
公开(公告)日：2009-06-25
申请号：US11960599
申请日：2007-12-19
申请人： Challis L. Purrington , Michael L. Scollard , Victor A. Stankevich , Ivan R. Zapata
发明人： Challis L. Purrington , Michael L. Scollard , Victor A. Stankevich , Ivan R. Zapata
IPC分类号： G06F11/07
CPC分类号： G06F1/206
摘要： Methods, apparatus, and products are disclosed for preemptive thermal management for a computing system based on cache performance, the computing system having a processor, cached computer memory operatively coupled to the processor, and a processor cache operatively coupled to the processor, the processor cache capable of storing a subset of memory contents of the cached computer memory, that include: attempting, by the processor, to retrieve portions of the memory contents of the cached computer memory from the processor cache, resulting in cache misses for the processor cache; tracking, by the processor, cache miss statistics for the processor cache in the computing system, the cache miss statistics describing the cache misses for the processor cache; and administering a thermal management device for the computing system in dependence upon the cache miss statistics, the thermal management device operatively coupled to the processor and capable of managing temperature for the computing system.
摘要翻译：公开了用于基于高速缓存性能的计算系统的先占热管理的方法，装置和产品，所述计算系统具有处理器，可操作地耦合到所述处理器的高速缓存计算机存储器，以及可操作地耦合到所述处理器的处理器高速缓存器能够存储缓存的计算机存储器的存储器内容的子集，其包括：由处理器尝试从处理器高速缓存中检索缓存的计算机存储器的存储器内容的部分，导致处理器高速缓存的高速缓存未命中; 由处理器跟踪计算系统中处理器缓存的高速缓存未命中统计信息，描述处理器高速缓存未命中的高速缓存未命中统计信息; 以及根据所述高速缓存未命中统计管理所述计算系统的热管理装置，所述热管理装置可操作地耦合到所述处理器并能够管理所述计算系统的温度。

2. 发明授权

US07971102B2 Preemptive thermal management for a computing system based on cache performance 有权
标题翻译：基于缓存性能的计算系统的抢先热管理
公开(公告)号：US07971102B2
公开(公告)日：2011-06-28
申请号：US11960599
申请日：2007-12-19
申请人： Challis L. Purrington , Michael L. Scollard , Victor A. Stankevich , Ivan R. Zapata
发明人： Challis L. Purrington , Michael L. Scollard , Victor A. Stankevich , Ivan R. Zapata
IPC分类号： G06F11/00
CPC分类号： G06F1/206
摘要： Methods, apparatus, and products are disclosed for preemptive thermal management for a computing system based on cache performance, the computing system having a processor, cached computer memory operatively coupled to the processor, and a processor cache operatively coupled to the processor, the processor cache capable of storing a subset of memory contents of the cached computer memory, that include: attempting, by the processor, to retrieve portions of the memory contents of the cached computer memory from the processor cache, resulting in cache misses for the processor cache; tracking, by the processor, cache miss statistics for the processor cache in the computing system, the cache miss statistics describing the cache misses for the processor cache; and administering a thermal management device for the computing system in dependence upon the cache miss statistics, the thermal management device operatively coupled to the processor and capable of managing temperature for the computing system.
摘要翻译：公开了用于基于高速缓存性能的计算系统的先占热管理的方法，装置和产品，所述计算系统具有处理器，可操作地耦合到所述处理器的高速缓存计算机存储器，以及可操作地耦合到所述处理器的处理器高速缓存器能够存储缓存的计算机存储器的存储器内容的子集，其包括：由处理器尝试从处理器高速缓存中检索缓存的计算机存储器的存储器内容的部分，导致处理器高速缓存的高速缓存未命中; 由处理器跟踪计算系统中处理器缓存的高速缓存未命中统计信息，描述处理器高速缓存未命中的高速缓存未命中统计信息; 以及根据所述高速缓存未命中统计管理所述计算系统的热管理装置，所述热管理装置可操作地耦合到所述处理器并能够管理所述计算系统的温度。

3. 发明授权

US08347154B2 Use of hashing function to distinguish random and repeat errors in a memory system 有权
标题翻译：使用散列函数来区分存储器系统中的随机和重复错误
公开(公告)号：US08347154B2
公开(公告)日：2013-01-01
申请号：US12887184
申请日：2010-09-21
申请人： Sumanta K. Bahali , Tu T. Dang , Michael C. Elles , Juan Q. Hernandez , Dwayne A. Lowe , Challis L. Purrington , Michael L. Scollard , Ivan R. Zapata
发明人： Sumanta K. Bahali , Tu T. Dang , Michael C. Elles , Juan Q. Hernandez , Dwayne A. Lowe , Challis L. Purrington , Michael L. Scollard , Ivan R. Zapata
IPC分类号： G06F11/00
CPC分类号： G06F11/076 , G06F11/008 , G06F11/073 , G06F11/1048 , G11C29/42 , G11C29/44 , G11C2029/0411
摘要： One embodiment provides an error detection method wherein single-bit errors in a memory module are detected and identified as being a random error or a repeat error. Each identified random error and each identified repeat error occurring in a time interval is counted. An alert is generated in response to a number of identified random errors reaching a random-error threshold or a number of identified repeat errors reaching a repeat-error threshold during the predefined interval. The repeat-error threshold is set lower than the random-error threshold. A hashing process may be applied to the memory address of each detected error to map the location of the error in the memory system to a corresponding location in an electronic table.
摘要翻译：一个实施例提供一种错误检测方法，其中检测存储器模块中的单位错误并将其识别为随机错误或重复错误。每个识别的随机误差和每个识别的在时间间隔中发生的重复误差被计数。响应于识别的随机误差的数量达到随机误差阈值或在预定义间隔期间到达重复误差阈值的多个识别的重复错误而产生警报。重复错误阈值设置为低于随机误差阈值。可以将散列处理应用于每个检测到的错误的存储器地址，以将存储器系统中的错误的位置映射到电子表中的相应位置。

4. 发明申请

US20120072786A1 USE OF HASHING FUNCTION TO DISTINGUISH RANDOM AND REPEAT ERRORS IN A MEMORY SYSTEM 有权
标题翻译：使用散列函数来识别存储系统中的随机和重复错误
公开(公告)号：US20120072786A1
公开(公告)日：2012-03-22
申请号：US12887184
申请日：2010-09-21
申请人： Sumanta K. Bahali , Tu T. Dang , Michael C. Elles , Juan Q. Hernandez , Dwayne A. Lowe , Challis L. Purrington , Michael L. Scollard , Ivan R. Zapata
发明人： Sumanta K. Bahali , Tu T. Dang , Michael C. Elles , Juan Q. Hernandez , Dwayne A. Lowe , Challis L. Purrington , Michael L. Scollard , Ivan R. Zapata
IPC分类号： G11C29/04 , G06F11/00 , G06F11/22
CPC分类号： G06F11/076 , G06F11/008 , G06F11/073 , G06F11/1048 , G11C29/42 , G11C29/44 , G11C2029/0411
摘要： One embodiment provides an error detection method wherein single-bit errors in a memory module are detected and identified as being a random error or a repeat error. Each identified random error and each identified repeat error occurring in a time interval is counted. An alert is generated in response to a number of identified random errors reaching a random-error threshold or a number of identified repeat errors reaching a repeat-error threshold during the predefined interval. The repeat-error threshold is set lower than the random-error threshold. A hashing process may be applied to the memory address of each detected error to map the location of the error in the memory system to a corresponding location in an electronic table.
摘要翻译：一个实施例提供一种错误检测方法，其中检测存储器模块中的单位错误并将其识别为随机错误或重复错误。每个识别的随机误差和每个识别的在时间间隔中发生的重复误差被计数。响应于识别的随机误差的数量达到随机误差阈值或在预定义间隔期间到达重复误差阈值的多个识别的重复错误而产生警报。重复错误阈值设置为低于随机误差阈值。可以将散列处理应用于每个检测到的错误的存储器地址，以将存储器系统中的错误的位置映射到电子表中的相应位置。

5. 发明授权

US07954007B2 Detecting faulty CPU heat sink coupling during system power-up 失效
标题翻译：在系统上电期间检测CPU散热器耦合故障
公开(公告)号：US07954007B2
公开(公告)日：2011-05-31
申请号：US11551961
申请日：2006-10-23
申请人： Henry G. McMillan , Christopher C. Moody , Challis L. Purrington , Terry L. Sawyers , Michael L. Scollard , Richard P. Southers , Troy S. Voytko , Christopher C. West , Christopher L. Wood
发明人： Henry G. McMillan , Christopher C. Moody , Challis L. Purrington , Terry L. Sawyers , Michael L. Scollard , Richard P. Southers , Troy S. Voytko , Christopher C. West , Christopher L. Wood
IPC分类号： G06F11/00
CPC分类号： H01L23/34 , G06F1/206 , H01L2924/0002 , H01L2924/00
摘要： The present invention is directed to the detection of faulty CPU heat sink coupling during system power-up. A method in accordance with an embodiment of the present invention includes: monitoring a slope of a CPU temperature rise from initial system power-up; determining if the slope of the CPU temperature rise exceeds an expected value; and in the case that the slope of the CPU temperature rise exceeds the expected value, indicating an existence of a possible fault (PFA) related to a heat sink coupled to the CPU.
摘要翻译：本发明涉及在系统上电期间检测故障的CPU散热器耦合。根据本发明的实施例的方法包括：从初始系统上电监视CPU温度上升的斜率; 确定CPU温度上升的斜率是否超过预期值; 并且在CPU温度升高的斜率超过预期值的情况下，指示与耦合到CPU的散热器相关的可能故障（PFA）的存在。

6. 发明授权

US07493503B2 Programmable throttling in blade/chassis power management 有权
标题翻译：可编程节流在刀片/机箱电源管理
公开(公告)号：US07493503B2
公开(公告)日：2009-02-17
申请号：US11315837
申请日：2005-12-22
申请人： Alfredo Aldereguia , Brian E. Bigelow , Dhruv M. Desai , Scott N. Dunham , Nickolas J. Gruendler , William G. Holland , James E. Hughes , Randolph S. Kolvick , Challis L. Purrington , Michael L. Scollard , Gary R. Shippy
发明人： Alfredo Aldereguia , Brian E. Bigelow , Dhruv M. Desai , Scott N. Dunham , Nickolas J. Gruendler , William G. Holland , James E. Hughes , Randolph S. Kolvick , Challis L. Purrington , Michael L. Scollard , Gary R. Shippy
IPC分类号： G06F1/26
CPC分类号： G06F1/3209
摘要： A method and system are disclosed to enable and control power reduction in a blade/chassis system. A “maximum power reduction” attribute is stored in the VPD of the blade (or can otherwise be input to or retrieved or calculated by the management entity). The management module of the chassis in which the blades and power supplies are located uses this information to manage the power reduction of blades when the system is operating in an over-subscription mode and a power supply fails. If throttling is required, the system knows the amount of power reduction available for each blade and controls the throttling by spreading it out among the blades in the system so that, ideally, no blade will cease operation altogether.
摘要翻译：公开了一种方法和系统，以实现和控制刀片/底盘系统中的功率降低。 “最大功率降低”属性存储在刀片的VPD中（否则可以由管理实体输入或检索或计算）。其中叶片和电源所在的机箱的管理模块使用该信息来管理当系统以超订购模式操作并且电源出现故障时叶片的功率降低。如果需要节流，则系统知道每个刀片可用的功率减少量，并通过将系统中的刀片扩展到控制器中来控制节流，从而理想地，刀片不会完全停止运行。

7. 发明申请

US20080154536A1 DETECTING FAULTY CPU HEAT SINK COUPLING DURING SYSTEM POWER-UP 失效
标题翻译：在系统加电期间检测故障CPU散热耦合
公开(公告)号：US20080154536A1
公开(公告)日：2008-06-26
申请号：US11551961
申请日：2006-10-23
申请人： Henry G. McMillan , Christopher C. Moody , Challis L. Purrington , Terry L. Sawyers , Michael L. Scollard , Richard P. Southers , Troy S. Voytko , Christopher C. West , Christopher L. Wood
发明人： Henry G. McMillan , Christopher C. Moody , Challis L. Purrington , Terry L. Sawyers , Michael L. Scollard , Richard P. Southers , Troy S. Voytko , Christopher C. West , Christopher L. Wood
IPC分类号： G06F15/00
CPC分类号： H01L23/34 , G06F1/206 , H01L2924/0002 , H01L2924/00
摘要： The present invention is directed to the detection of faulty CPU heat sink coupling during system power-up. A method in accordance with an embodiment of the present invention includes: monitoring a slope of a CPU temperature rise from initial system power-up; determining if the slope of the CPU temperature rise exceeds an expected value; and in the case that the slope of the CPU temperature rise exceeds the expected value, indicating an existence of a possible fault (PFA) related to a heat sink coupled to the CPU.
摘要翻译：本发明涉及在系统上电期间检测故障的CPU散热器耦合。根据本发明的实施例的方法包括：从初始系统上电监视CPU温度上升的斜率; 确定CPU温度上升的斜率是否超过预期值; 并且在CPU温度升高的斜率超过预期值的情况下，指示与耦合到CPU的散热器相关的可能故障（PFA）的存在。

8. 发明授权

US07650517B2 Throttle management for blade system 有权
标题翻译：叶片系统的油门管理
公开(公告)号：US07650517B2
公开(公告)日：2010-01-19
申请号：US11311818
申请日：2005-12-19
申请人： James E. Hughes , Henry G. McMillan , Challis L. Purrington , Michael L. Scollard , Gary R. Shippy , Paul M. Smith , Maya P. Yarbrough
发明人： James E. Hughes , Henry G. McMillan , Challis L. Purrington , Michael L. Scollard , Gary R. Shippy , Paul M. Smith , Maya P. Yarbrough
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3228
摘要： Power is allocated to blades based on an estimate of the actual power they are expected to use rather than their maximum-power draw-value. To protect against situations where the estimated actual-power draw-value is exceeded, a hardware comparator monitors the blade system load against a predetermined threshold value set by a management module (MM) based on user input. If this threshold value is exceeded, a throttle latch is triggered, based on a signal from a service processor monitoring the blade system load. The output of this latch directly engages throttling. The service processor also monitors the output of the latch and communicates information regarding the throttling to the MM for evaluation.
摘要翻译：根据其预期使用的实际功率的估计而不是其最大功率抽取值，将功率分配给刀片。为了防止超过估计的实际功率抽取值的情况，硬件比较器基于由管理模块（MM）基于用户输入设置的预定阈值来监视刀片系统负载。如果超过该阈值，则根据监视刀片系统负载的服务处理器的信号触发油门闩锁。该闩锁的输出直接接合节流。服务处理器还监视锁存器的输出并将关于限流的信息传送到MM以进行评估。

9. 发明授权

US08576578B2 Robust power plane configuration in printed circuit boards 有权
标题翻译：印刷电路板中的强大功率平面配置
公开(公告)号：US08576578B2
公开(公告)日：2013-11-05
申请号：US13170010
申请日：2011-06-27
申请人： Robert L. Ayers , Michael L. Scollard , Heidi D. Williams
发明人： Robert L. Ayers , Michael L. Scollard , Heidi D. Williams
IPC分类号： H05K1/11 , H05K1/14
CPC分类号： H05K1/0298 , H05K2201/09145 , H05K2201/09309
摘要： A robust printed circuit board (PCB) that includes at least two power layers that are used in providing power to components connected to the PCB. The power layers may be a power plane layer and a ground plane layer. The power plane layer is situated such that its edge is pulled back a second distance from the planar edge of the PCB. The ground plane layer is situated such that its edge is pulled back a first distance from the planar edge of the PCB. The second distance and the first distance are different, and as a result, the planar edges of the power plane layer and the ground plane layer respectively do not coincide.
摘要翻译：坚固的印刷电路板（PCB），其包括用于向连接到PCB的部件提供电力的至少两个功率层。功率层可以是功率平面层和接地层。功率平面层被定位成使得其边缘被从PCB的平面边缘拉回第二距离。接地平面层的位置使其边缘从PCB的平面边缘拉回第一距离。第二距离和第一距离不同，结果，功率平面层和接地层的平面边缘分别不一致。

10. 发明申请

US20120327583A1 ROBUST POWER PLANE CONFIGURATION IN PRINTED CIRCUIT BOARDS 有权
标题翻译：印刷电路板中的稳定电源平面配置
公开(公告)号：US20120327583A1
公开(公告)日：2012-12-27
申请号：US13170010
申请日：2011-06-27
申请人： Robert L. Ayers , Michael L. Scollard , Heidi D. Williams
发明人： Robert L. Ayers , Michael L. Scollard , Heidi D. Williams
IPC分类号： G06F1/16 , H05K3/00 , H05K1/02
CPC分类号： H05K1/0298 , H05K2201/09145 , H05K2201/09309
摘要： A robust printed circuit board (PCB) that includes at least two power layers that are used in providing power to components connected to the PCB. The power layers may be a power plane layer and a ground plane layer. The power plane layer is situated such that its edge is pulled back a second distance from the planar edge of the PCB. The ground plane layer is situated such that its edge is pulled back a first distance from the planar edge of the PCB. The second distance and the first distance are different, and as a result, the planar edges of the power plane layer and the ground plane layer respectively do not coincide.
摘要翻译：坚固的印刷电路板（PCB），其包括用于向连接到PCB的部件提供电力的至少两个功率层。功率层可以是功率平面层和接地层。功率平面层被定位成使得其边缘被从PCB的平面边缘拉回第二距离。接地平面层的位置使其边缘从PCB的平面边缘拉回第一距离。第二距离和第一距离不同，结果，功率平面层和接地层的平面边缘分别不一致。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式