专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07157947B2 Power supplies noise detector for integrated circuits 失效
标题翻译：集成电路用电源噪声检测器
公开(公告)号：US07157947B2
公开(公告)日：2007-01-02
申请号：US10731393
申请日：2003-12-09
申请人： Chaiyuth Chansungsan , Keith Self
发明人： Chaiyuth Chansungsan , Keith Self
IPC分类号： H03K4/06 , H03K3/02
CPC分类号： G01R19/16552 , H04B15/005
摘要： In some embodiments, a circuit includes a reference current source to provide a substantially noise free current signal, and a detector coupled to one or two power supplies. In some embodiments, a method includes receiving a substantially noise free current signal, receiving one or two power supply signals, processing the substantially noise free current signal and the one or two power supply signals to detect a noise signal in the one or two power supply signals, and generating a noise detection signal in response to detection of the noise signal.
摘要翻译：在一些实施例中，电路包括参考电流源以提供基本上无噪声的电流信号，以及耦合到一个或两个电源的检测器。在一些实施例中，一种方法包括接收基本无噪声的电流信号，接收一个或两个电源信号，处理基本上无噪声的电流信号和一个或两个电源信号以检测一个或两个电源中的噪声信号信号，并且响应于噪声信号的检测而产生噪声检测信号。

2. 发明申请

US20050122138A1 Power supplies noise detector for integrated circuits 失效
标题翻译：集成电路用电源噪声检测器
公开(公告)号：US20050122138A1
公开(公告)日：2005-06-09
申请号：US10731393
申请日：2003-12-09
申请人： Chaiyuth Chansungsan , Keith Self
发明人： Chaiyuth Chansungsan , Keith Self
IPC分类号： G01R19/165 , H03K5/153 , H04B15/00
CPC分类号： G01R19/16552 , H04B15/005
摘要： In some embodiments, a circuit includes a reference current source to provide a substantially noise free current signal, and a detector coupled to one or two power supplies. In some embodiments, a method includes receiving a substantially noise free current signal, receiving one or two power supply signals, processing the substantially noise free current signal and the one or two power supply signals to detect a noise signal in the one or two power supply signals, and generating a noise detection signal in response to detection of the noise signal.
摘要翻译：在一些实施例中，电路包括参考电流源以提供基本上无噪声的电流信号，以及耦合到一个或两个电源的检测器。在一些实施例中，一种方法包括接收基本无噪声的电流信号，接收一个或两个电源信号，处理基本上无噪声的电流信号和一个或两个电源信号以检测一个或两个电源中的噪声信号信号，并且响应于噪声信号的检测而产生噪声检测信号。

3. 发明申请

US20050242856A1 Interpolator circuit 审中-公开
标题翻译：内插电路
公开(公告)号：US20050242856A1
公开(公告)日：2005-11-03
申请号：US11173859
申请日：2005-06-30
申请人： Chaiyuth Chansungsan
发明人： Chaiyuth Chansungsan
IPC分类号： H03L7/081 , H03L7/06
CPC分类号： H03L7/0814
摘要： An improved interpolator includes a replica delay line and an interpolated delay edge generator. The replica delay line provides two replica delay edges to the interpolated delay edge generator. The interpolated delay edge generator selectively generates an interpolated delay edge while maintaining a substantially constant capacitive loading on the two replica delay edges. The replica delay line may comprise a delay cell of four current-starved inverter delay stages or four capacitor-loaded inverter delay stages.
摘要翻译：改进的内插器包括复制延迟线和内插延迟边缘发生器。复制延迟线向内插的延迟边沿发生器提供两个复制延迟边缘。内插延迟边沿发生器选择性地产生内插延迟边沿，同时在两个复制延迟边缘上保持基本恒定的电容负载。复制延迟线可以包括四个当前饥饿的反相器延迟级或四个电容器负载的反相器延迟级的延迟单元。

4. 发明授权

US06452428B1 Slew rate control circuit 有权
公开(公告)号：US06452428B1
公开(公告)日：2002-09-17
申请号：US09448048
申请日：1999-11-23
申请人： Stephen R. Mooney , Joseph T. Kennedy , Chaiyuth Chansungsan , Prantik K. Nag
发明人： Stephen R. Mooney , Joseph T. Kennedy , Chaiyuth Chansungsan , Prantik K. Nag
IPC分类号： H03K1716
CPC分类号： H04L25/0292 , H03K17/164 , H04L5/1423 , H04L25/0278 , H04L25/028
摘要： A bi-directional communication system includes a driver capable of controlling a slew rate of transmitted data signals. Impedance matching can be provided to match an impedance of a driver circuit to an impedance of a communication line. The impedance is maintained constant as data is driven from the data driver. The data receiver circuit can adjust a reference voltage in response to simultaneously transmitted data. The slew rate of the receiver circuit trip point is controlled to maintain adequate noise margin during operation. Both the receiver and driver circuits can be controlled using a delay line circuit.

5. 发明申请

US20050258882A1 Interpolator circuit 失效
标题翻译：内插电路
公开(公告)号：US20050258882A1
公开(公告)日：2005-11-24
申请号：US11173386
申请日：2005-06-30
申请人： Chaiyuth Chansungsan
发明人： Chaiyuth Chansungsan
IPC分类号： H03L7/081 , H03L7/06
CPC分类号： H03L7/0814
摘要： An improved interpolator includes a replica delay line and an interpolated delay edge generator. The replica delay line provides two replica delay edges to the interpolated delay edge generator. The interpolated delay edge generator selectively generates an interpolated delay edge while maintaining a substantially constant capacitive loading on the two replica delay edges. The replica delay line may comprise a delay cell of four current-stared inverter delay stages or four capacitor-loaded inverter delay stages.
摘要翻译：改进的内插器包括复制延迟线和内插延迟边缘发生器。复制延迟线向内插的延迟边沿发生器提供两个复制延迟边缘。内插延迟边沿发生器选择性地产生内插延迟边沿，同时在两个复制延迟边缘上保持基本恒定的电容负载。复制延迟线可以包括四个电流反相器延迟级或四个电容器负载的反相器延迟级的延迟单元。

6. 发明授权

US06744275B2 Termination pair for a differential driver-differential receiver input output circuit 失效
标题翻译：差分驱动器 - 差分接收器输入输出电路的终端对
公开(公告)号：US06744275B2
公开(公告)日：2004-06-01
申请号：US10061530
申请日：2002-02-01
申请人： Chaiyuth Chansungsan
发明人： Chaiyuth Chansungsan
IPC分类号： A03K1716
CPC分类号： H04L25/0298
摘要： Various apparatuses and methods are described that include a variable-impedance matched termination pair coupled to differential signaling bus pair. In an embodiment, the differential signaling bus pair includes a first bus and a second bus. The variable-impedance matched termination pair includes a first variable-impedance component and a second variable-impedance component. The impedance value of each variable-impedance component depends on the voltage level sensed by that variable-impedance component. The first variable-impedance component couples to the first bus. The second variable-impedance component couples to the second bus. The first variable-impedance component is electrically isolated from the second variable-impedance resistor.
摘要翻译：描述了包括耦合到差分信号总线对的可变阻抗匹配终端对的各种装置和方法。在一个实施例中，差分信令总线对包括第一总线和第二总线。可变阻抗匹配终端对包括第一可变阻抗分量和第二可变阻抗分量。每个可变阻抗分量的阻抗值取决于该可变阻抗分量感测到的电压电平。第一可变阻抗元件耦合到第一总线。第二可变阻抗分量耦合到第二总线。第一可变阻抗分量与第二可变阻抗电阻器电隔离。

7. 发明授权

US07102404B2 Interpolator circuit 失效
标题翻译：内插电路
公开(公告)号：US07102404B2
公开(公告)日：2006-09-05
申请号：US11173386
申请日：2005-06-30
申请人： Chaiyuth Chansungsan
发明人： Chaiyuth Chansungsan
IPC分类号： H03L7/00 , H03K5/13
CPC分类号： H03L7/0814
摘要： An improved interpolator includes a replica delay line and an interpolated delay edge generator. The replica delay line provides two replica delay edges to the interpolated delay edge generator. The interpolated delay edge generator selectively generates an interpolated delay edge while maintaining a substantially constant capacitive loading on the two replica delay edges. The replica delay line may comprise a delay cell of four current-starved inverter delay stages or four capacitor-loaded inverter delay stages.
摘要翻译：改进的内插器包括复制延迟线和内插延迟边缘发生器。复制延迟线向内插的延迟边沿发生器提供两个复制延迟边缘。内插延迟边沿发生器选择性地产生内插延迟边沿，同时在两个复制延迟边缘上保持基本恒定的电容负载。复制延迟线可以包括四个当前饥饿的反相器延迟级或四个电容器负载的反相器延迟级的延迟单元。

8. 发明授权

US06744287B2 Slew rate control circuit 有权
标题翻译：压摆率控制电路
公开(公告)号：US06744287B2
公开(公告)日：2004-06-01
申请号：US10225326
申请日：2002-08-21
申请人： Stephen R. Mooney , Joseph T. Kennedy , Chaiyuth Chansungsan , Prantik K. Nag
发明人： Stephen R. Mooney , Joseph T. Kennedy , Chaiyuth Chansungsan , Prantik K. Nag
IPC分类号： H03K1716
CPC分类号： H04L25/0292 , H03K17/164 , H04L5/1423 , H04L25/0278 , H04L25/028
摘要： A bi-directional communication system includes a driver capable of controlling a slew rate of transmitted data signals. Impedance matching can be provided to match an impedance of a driver circuit to an impedance of a communication line. The impedance is maintained constant as data is driven from the data driver. The data receiver circuit can adjust a reference voltage in response to simultaneously transmitted data. The slew rate of the receiver circuit trip point is controlled to maintain adequate noise margin during operation. Both the receiver and driver circuits can be controlled using a delay line circuit.
摘要翻译：双向通信系统包括能够控制发送的数据信号的转换速率的驱动器。可以提供阻抗匹配以将驱动器电路的阻抗与通信线路的阻抗相匹配。当数据从数据驱动器驱动时，阻抗保持不变。数据接收器电路可以响应于同时发送的数据来调整参考电压。控制接收器电路跳变点的转换速率，以在运行期间保持足够的噪声容限。可以使用延迟线电路来控制接收器和驱动器电路。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式