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    • 2. 发明授权
    • Self clock generation structure for low power local clock buffering decoder
    • 用于低功耗本地时钟缓冲解码器的自身时钟生成结构
    • US07860172B2
    • 2010-12-28
    • US10845540
    • 2004-05-13
    • Chad AdamsToru AsanoAndrew Maust
    • Chad AdamsToru AsanoAndrew Maust
    • H04B14/04
    • G06F1/32G06F1/06
    • A k-to-2k decoder is provided. Within the final stage of a k-to-2k decoder is a plurality of word line drivers. These word line drivers utilize clocking signals to fire word lines to a memory array. However, power consumption by clocks has become a serious issue with the increase component density on silicon wafers. To alleviate the problem, signals from the first stage of the k-to-2k decoder provide enablement signals to Local Clock Buffers (LCBs) that allow the word line drivers to fire. The enablement signal reduces the number of active buffers and signals carried to word line drivers, reducing power consumption.
    • 提供k-to-2k解码器。 在k-to-2k解码器的最后阶段是多个字线驱动器。 这些字线驱动器利用时钟信号将字线触发到存储器阵列。 然而,随着硅晶片的组件密度的增加,时钟功耗成为一个严重的问题。 为了减轻这个问题,来自k-2k解码器的第一级的信号向本地时钟缓冲器(LCB)提供允许字线驱动器触发的启动信号。 启用信号减少了向字线驱动器传送的有效缓冲器和信号的数量,从而降低了功耗。