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1. 发明授权

US5835392A Method for performing complex fast fourier transforms (FFT's) 失效
标题翻译：执行复杂快速傅立叶变换（FFT）的方法
公开(公告)号：US5835392A
公开(公告)日：1998-11-10
申请号：US580467
申请日：1995-12-28
申请人： Carole Dulong , Larry M. Mennemeier , Eiichi Kowashi , Alexander D. Peleg , Stephen A. Fischer
发明人： Carole Dulong , Larry M. Mennemeier , Eiichi Kowashi , Alexander D. Peleg , Stephen A. Fischer
IPC分类号： G06F17/14 , G06F15/00 , G06F7/38
CPC分类号： G06F17/142 , G06F9/3001 , G06F9/30036 , G06F9/30109 , G06F9/3013
摘要： A method in a computer system of performing a butterfly stage of a complex fast fourier transform of two input signals. First, a packed multiply add is performed on a first packed complex value generated from a first input signal and a set of trigonometric values to generate a first product. Then, a second product is generated which comprises the first product with a sign inverted. A packed add of the second product and a second complex value generated from a second input signal is performed to generate a first result, and the first product and the second complex value to generate a second result.
摘要翻译：一种执行两个输入信号的复杂快速傅里叶变换的蝶形阶段的计算机系统中的方法。首先，对从第一输入信号和一组三角值生成的第一打包复数值执行打包乘法加法，以生成第一乘积。然后，产生第二产品，其包括具有倒牌的第一产品。执行第二产品的打包添加和从第二输入信号产生的第二复数值以产生第一结果，以及第一乘积和第二复数值以产生第二结果。

2. 发明授权

US6058408A Method and apparatus for multiplying and accumulating complex numbers in a digital filter 失效
公开(公告)号：US6058408A
公开(公告)日：2000-05-02
申请号：US575778
申请日：1995-12-20
申请人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
发明人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
IPC分类号： G06F7/48 , G06F17/10
CPC分类号： G06F7/4812
摘要： The invention provides a method and apparatus for performing complex digital filters. According to one aspect of the invention, a method for performing a complex digital filter is described. The complex digital filter is performed using a set of data samples and a set of complex coefficients. In addition, the complex digital filter is performed using a inner and outer loop. The outer loop steps through a number of corresponding relationships between the set of complex coefficients and the set of data samples. The inner loop steps thorough each complex coefficient in the set of complex coefficients. Within the inner loop, the data sample corresponding to the current complex coefficient (the complex coefficient currently identified by the inner loop) is determined according to the current corresponding relationship (the corresponding relationship currently identified by the outer loop). Then, in response to receiving an instruction, eight data elements are read and used to generate a currently calculated complex number. These eight data elements were previously stored as packed data and include two representations of each of the components of the current complex coefficient and its current corresponding data sample. Each of these data elements is either the positive or negative of the component they represent. As a result of the manner in which these eight data elements are stored, the currently calculated complex number represents the product of the current complex coefficient and its current corresponding data sample. The currently calculated complex number is then added to the current output packed data.

3. 发明授权

US5983257A System for signal processing using multiply-add operations 失效
标题翻译：使用多重加法运算的信号处理系统
公开(公告)号：US5983257A
公开(公告)日：1999-11-09
申请号：US578829
申请日：1995-12-26
申请人： Carole Dulong , Larry M. Mennemeier , Tuan H. Bui , Eiichi Kowashi , Alexander D. Peleg , Benny Eitan , Stephen A. Fischer , Benny Maytal , Millind Mittal
发明人： Carole Dulong , Larry M. Mennemeier , Tuan H. Bui , Eiichi Kowashi , Alexander D. Peleg , Benny Eitan , Stephen A. Fischer , Benny Maytal , Millind Mittal
IPC分类号： G06F7/544 , G06F9/302 , G06F7/00 , G06F7/52
CPC分类号： G06F9/30036 , G06F7/5443 , G06F9/30014 , G06F2207/3828
摘要： A computer system which includes a multimedia input device which generates an audio or video input signal and a processor coupled to the multimedia input device. The system further includes a storage device coupled to the processor and having stored therein a signal processing routine for multiplying and accumulating input values representative of the audio or video input signal. The signal processing routine, when executed by the processor, causes the processor to perform several steps. These steps include performing a packed multiply add on a first set of values packed into a first source and a second set of values packed into a second source each representing input signals to generate a packed intermediate result. The packed intermediate result is added to an accumulator to generate a packed accumulated result in the accumulator. These steps may be iterated with the first set of values and portions of the second set of values to the accumulator to generate the packed accumulated result. Subsequent thereto, the packed accumulated result in the accumulator is unpacked into a first result and a second result and the first result and the second result are added together to generate an accumulated result.
摘要翻译：一种计算机系统，其包括产生音频或视频输入信号的多媒体输入设备和耦合到所述多媒体输入设备的处理器。该系统还包括耦合到处理器并且在其中存储有用于乘以和累加表示音频或视频输入信号的输入值的信号处理例程的存储装置。信号处理程序在由处理器执行时使处理器执行几个步骤。这些步骤包括对打包到第一源的第一组值进行压缩乘法加法，并将第二组值打包到表示输入信号的第二源中，以生成打包的中间结果。将打包的中间结果加到累加器中以在累加器中产生打包累计结果。这些步骤可以用第一组值和第二组值的部分迭代到累加器，以产生打包的累积结果。随后，将累加器中的打包累积结果解包成第一结果，将第二结果与第一结果和第二结果相加在一起以产生累积结果。

4. 发明授权

US06823353B2 Method and apparatus for multiplying and accumulating complex numbers in a digital filter 失效
标题翻译：用于在数字滤波器中乘法和累加复数的方法和装置
公开(公告)号：US06823353B2
公开(公告)日：2004-11-23
申请号：US10211203
申请日：2002-08-02
申请人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
发明人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
IPC分类号： G06F752
CPC分类号： G06F17/10
摘要： The invention provides a method and apparatus for performing complex digital filters. According to one aspect of the invention, a method for performing a complex digital filter is described. The complex digital filter is performed using a set of data samples and a set of complex coefficients. In addition, the complex digital filter is performed using a inner and outer loop. The outer loop steps through a number of corresponding relationships between the set of complex coefficients and the set of data samples. The inner loop steps thorough each complex coefficient in the set of complex coefficients. Within the inner loop, the data sample corresponding to the current complex coefficient (the complex coefficient currently identified by the inner loop) is determined according to the current corresponding relationship (the corresponding relationship currently identified by the outer loop). Then, in response to receiving an instruction, eight data elements are read and used to generate a currently calculated complex number. These eight data elements were previously stored as packed data and include two representations of each of the components of the current complex coefficient and its current corresponding data sample. Each of these data elements is either the positive or negative of the component they represent. As a result of the manner in which these eight data elements are stored, the currently calculated complex number represents the product of the current complex coefficient and its current corresponding data sample. The currently calculated complex number is then added to the current output packed data.
摘要翻译：本发明提供一种用于执行复杂数字滤波器的方法和装置。根据本发明的一个方面，描述了一种用于执行复数数字滤波器的方法。使用一组数据样本和一组复系数来执行复数数字滤波器。另外，使用内循环和外循环执行复数数字滤波器。外循环遍历复系数集合和数据样本集之间的若干对应关系。内循环遍及复系数集合中的每个复系数。在内循环中，根据当前对应关系（当前由外循环确定的对应关系）确定对应于当前复系数（由内循环确定的复系数）的数据样本。然后，响应于接收到指令，读取并使用八个数据元素来生成当前计算的复数。这八个数据元素预先存储为打包数据，并且包括当前复系数及其当前相应数据样本的每个分量的两个表示。这些数据元素中的每一个都是它们表示的组件的正或负。作为存储这八个数据元素的方式的结果，当前计算的复数代表当前复系数和其当前相应数据样本的乘积。然后将当前计算的复数加到当前输出的打包数据中。

5. 发明授权

US06237016B1 Method and apparatus for multiplying and accumulating data samples and complex coefficients 失效
标题翻译：用于乘法和累加数据样本和复系数的方法和装置
公开(公告)号：US06237016B1
公开(公告)日：2001-05-22
申请号：US08905506
申请日：1997-07-31
申请人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
发明人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
IPC分类号： G06F752
CPC分类号： G06F7/4812 , G06F9/3001 , G06F9/30036 , G06F17/10
摘要： A method and apparatus for performing complex digital filters. According to one aspect of the invention, a method for performing a complex digital filter is described. The complex digital filter is performed using a set of data samples and a set of complex coefficients. In addition, the complex digital filter is performed using a inner and outer loop. The outer loop steps through a number of corresponding relationships between the set of complex coefficients and the set of data samples. The inner loop steps thorough each complex coefficient in the set of complex coefficients. Within the inner loop, the data sample corresponding to the current complex coefficient (the complex coefficient currently identified by the inner loop) is determined according to the current corresponding relationship (the corresponding relationship currently identified by the outer loop). Then, in response to receiving an instruction, eight data elements are read and used to generate a currently calculated complex number. These eight data elements were previously stored as packed data and include two representations of each of the components of the current complex coefficient and its current corresponding data sample. Each of these data elements is either the positive or negative of the component they represent. As a result of the manner in which these eight data elements are stored, the currently calculated complex number represents the product of the current complex coefficient and its current corresponding data sample. The currently calculated complex number is then added to the current output packed data.
摘要翻译：一种用于执行复杂数字滤波器的方法和装置。根据本发明的一个方面，描述了一种用于执行复数数字滤波器的方法。使用一组数据样本和一组复系数来执行复数数字滤波器。另外，使用内循环和外循环执行复数数字滤波器。外循环遍历复系数集合和数据样本集之间的若干对应关系。内循环遍及复系数集合中的每个复系数。在内循环中，根据当前对应关系（当前由外循环确定的对应关系）确定对应于当前复系数（由内循环确定的复系数）的数据样本。然后，响应于接收到指令，读取并使用八个数据元素来生成当前计算的复数。这八个数据元素预先存储为打包数据，并且包括当前复系数及其当前相应数据样本的每个分量的两个表示。这些数据元素中的每一个都是它们表示的组件的正或负。作为存储这八个数据元素的方式的结果，当前计算的复数代表当前复系数和其当前相应数据样本的乘积。然后将当前计算的复数加到当前输出的打包数据中。

6. 发明授权

US5983253A Computer system for performing complex digital filters 失效
标题翻译：用于执行复杂数字滤波器的计算机系统
公开(公告)号：US5983253A
公开(公告)日：1999-11-09
申请号：US575777
申请日：1995-12-20
申请人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
发明人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
IPC分类号： G06F7/48 , G06F17/10 , G06F7/00 , G06F7/52
CPC分类号： G06F7/4812
摘要： A method and apparatus for performing complex digital filters. According to one aspect of the invention, a computer system generally having a transmitting unit, a processor, and a storage device is described. The storage device is coupled to the processor and has stored therein a routine. When executed by the processor, the routine causes the processor to perform a digital filter on unfiltered data items using complex coefficients to generate an output data stream. Execution of the routine causes the processor to perform outer and inner loops. The outer loop steps through corresponding relationships between the complex coefficients and the unfiltered data items. Each of these corresponding relationships is used by the digital filter to generate the output data stream. The inner loop steps the complex coefficients. Within the inner loop, the unfiltered data item corresponding to the current complex coefficient is determined according to the current corresponding relationship. Then, in response to receiving an instruction, eight data elements are read and used to generate a currently calculated complex number. As a result of the manner in which these eight data elements are stored, the currently calculated complex number represents the product of the current complex coefficient and its corresponding unfiltered data item. The currently calculated complex number is then added to the current output packed data. As a result, the current output packed data stores the sum of the complex numbers generated in the current inner loop.
摘要翻译：一种用于执行复杂数字滤波器的方法和装置。根据本发明的一个方面，描述了通常具有发送单元，处理器和存储设备的计算机系统。存储设备耦合到处理器并且在其中存储有例程。当由处理器执行时，例程使得处理器使用复系数对未过滤的数据项执行数字滤波以产生输出数据流。执行例程会导致处理器执行外部和内部循环。外环循环复杂系数与未过滤数据项之间的对应关系。这些对应关系中的每一个被数字滤波器用于生成输出数据流。内循环步进复系数。在内循环中，根据当前的对应关系确定与当前复系数对应的未过滤数据项。然后，响应于接收到指令，读取并使用八个数据元素来生成当前计算的复数。作为存储这八个数据元素的方式的结果，当前计算的复数表示当前复数系数及其相应的未过滤数据项的乘积。然后将当前计算的复数加到当前输出的打包数据中。结果，当前输出打包数据存储当前内循环中生成的复数的总和。

7. 发明授权

US06470370B2 Method and apparatus for multiplying and accumulating complex numbers in a digital filter 有权
标题翻译：用于在数字滤波器中乘法和累加复数的方法和装置
公开(公告)号：US06470370B2
公开(公告)日：2002-10-22
申请号：US09760969
申请日：2001-01-16
申请人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
发明人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
IPC分类号： G06F752
CPC分类号： G06F17/10
摘要： The invention provides a method and apparatus for performing complex digital filters. According to one aspect of the invention, a method for performing a complex digital filter is described. The complex digital filter is performed using a set of data samples and a set of complex coefficients. In addition, the complex digital filter is performed using a inner and outer loop. The outer loop steps through a number of corresponding relationships between the set of complex coefficients and the set of data samples. The inner loop steps thorough each complex coefficient in the set of complex coefficients. Within the inner loop, the data sample corresponding to the current complex coefficient (the complex coefficient currently identified by the inner loop) is determined according to the current corresponding relationship (the corresponding relationship currently identified by the outer loop). Then, in response to receiving an instruction, eight data elements are read and used to generate a currently calculated complex number. These eight data elements were previously stored as packed data and include two representations of each of the components of the current complex coefficient and its current corresponding data sample. Each of these data elements is either the positive or negative of the component they represent. As a result of the manner in which these eight data elements are stored, the currently calculated complex number represents the product of the current complex coefficient and its current corresponding data sample. The currently calculated complex number is then added to the current output packed data.
摘要翻译：本发明提供一种用于执行复杂数字滤波器的方法和装置。根据本发明的一个方面，描述了一种用于执行复数数字滤波器的方法。使用一组数据样本和一组复系数来执行复数数字滤波器。另外，使用内循环和外循环执行复数数字滤波器。外循环遍历复系数集合和数据样本集之间的若干对应关系。内循环遍及复系数集合中的每个复系数。在内循环中，根据当前对应关系（当前由外循环确定的对应关系）确定对应于当前复系数（由内循环确定的复系数）的数据样本。然后，响应于接收到指令，读取并使用八个数据元素来生成当前计算的复数。这八个数据元素预先存储为打包数据，并且包括当前复系数及其当前相应数据样本的每个分量的两个表示。这些数据元素中的每一个都是它们表示的组件的正或负。作为存储这八个数据元素的方式的结果，当前计算的复数代表当前复系数和其当前相应数据样本的乘积。然后将当前计算的复数加到当前输出的打包数据中。

8. 发明授权

US5936872A Method and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operations 失效
标题翻译：用于存储复数以允许有效的复数乘法运算并执行这种复数乘法运算的方法和装置
公开(公告)号：US5936872A
公开(公告)日：1999-08-10
申请号：US575966
申请日：1995-12-20
申请人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
发明人： Stephen A. Fischer , Larry M. Mennemeier , Alexander D. Peleg , Carole Dulong , Eiichi Kowashi
IPC分类号： G06F7/48 , G06F7/52
CPC分类号： G06F7/4812
摘要： The invention provides a method and apparatus for storing complex data in formats which allow efficient complex multiplication operations to be performed and for performing such complex multiplication operations. According to one aspect of the invention, a method for multiplying complex numbers is provided for use in a data processing system. In response to receiving an instruction, eight data elements are read and used to generate a resulting complex number. These eight data elements were previously stored as packed data and include two representations of each of the components of a first and second complex number. Each of these representations is signed such that it represents either the positive or negative of said component. As a result of the manner in which these eight data elements are stored, the resulting complex number represents the product of the first and second complex numbers. According to another aspect of the invention, a machine-readable medium is described. This machine-readable medium has stored thereon data representing sequences of instructions which, when executed by a processor, cause that processor to perform the above described method.
摘要翻译：本发明提供一种用于以允许执行有效的复数乘法运算并执行这种复数乘法运算的格式存储复数数据的方法和装置。根据本发明的一个方面，提供一种用于复数的方法，用于数据处理系统。响应于接收到指令，读取并使用八个数据元素来产生所得到的复数。这八个数据元素预先存储为打包数据，并且包括第一和第二复数的每个组件的两个表示。这些表示中的每一个都被签名，使得它表示所述组件的正或负。作为存储这八个数据元素的方式的结果，所得到的复数代表第一和第二复数的乘积。根据本发明的另一方面，描述了一种机器可读介质。该机器可读介质上存储有表示指令序列的数据，该指令序列由处理器执行时使该处理器执行上述方法。

9. 发明授权

US5793661A Method and apparatus for performing multiply and accumulate operations on packed data 失效
标题翻译：对打包数据执行乘法和累加操作的方法和装置
公开(公告)号：US5793661A
公开(公告)日：1998-08-11
申请号：US578827
申请日：1995-12-26
申请人： Carole Dulong , Larry Mennemeier , Tuan H. Bui , Eiichi Kowashi , Alexander D. Peleg , Benny Eitan , Stephen A. Fischer , Benny Maytal , Millind Mittal
发明人： Carole Dulong , Larry Mennemeier , Tuan H. Bui , Eiichi Kowashi , Alexander D. Peleg , Benny Eitan , Stephen A. Fischer , Benny Maytal , Millind Mittal
IPC分类号： G06F7/544 , G06F7/00
CPC分类号： G06F7/5443 , G06F2207/3828
摘要： A method of multiplying and accumulating two sets of values in a computer system. A packed multiply add is performed on a first portion of a first set of values packed into a first source and a first portion of a second set of values packed into a second source to generate a first result. The first result is unpacked into a plurality of values (e.g. two). The plurality of values is then added together to form a resulting accumulation value.
摘要翻译：一种在计算机系统中乘法和累加两组值的方法。在打包到第一源的第一组值的第一部分和打包到第二源中的第二组值的第一部分的第一部分上执行打包乘法加法以产生第一结果。第一个结果被打包成多个值（例如两个）。然后将多个值相加在一起以形成结果积累值。

10. 发明授权

US09383998B2 MFENCE and LFENCE micro-architectural implementation method and system 有权
公开(公告)号：US09383998B2
公开(公告)日：2016-07-05
申请号：US13440096
申请日：2012-04-05
申请人： Salvador Palanca , Stephen A. Fischer , Subramaniam Maiyuran , Shekoufeh Qawami
发明人： Salvador Palanca , Stephen A. Fischer , Subramaniam Maiyuran , Shekoufeh Qawami
IPC分类号： G06F15/00 , G06F9/30 , G06F9/40 , G06F9/38
CPC分类号： G06F9/3836 , G06F9/30043 , G06F9/30047 , G06F9/30087 , G06F9/3012 , G06F9/30145 , G06F9/3808 , G06F9/3812 , G06F9/3834 , G06F9/3855 , G06F9/3857 , G06F9/3867 , G06F2009/45583 , G06F2009/45591
摘要： A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. The system receives a fencing instruction that separates memory access instructions into older accesses and newer accesses. A buffer within the memory ordering unit is allocated to the instruction. The access instructions newer than the fencing instruction are stalled. The older access instructions are gradually retired. When all older memory accesses are retired, the fencing instruction is dispatched from the buffer.

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