会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明授权
    • Current-limited output buffer
    • 限流输出缓冲器
    • US07741882B1
    • 2010-06-22
    • US12173405
    • 2008-07-15
    • Abhijit Ray
    • Abhijit Ray
    • H03K3/00
    • H03K19/018521
    • An output buffer circuit includes a first output transistor having a source terminal connected to a voltage supply and a drain terminal connected to an output node. The first output transistor is capable of coupling the output node to the voltage supply when the input signal is at a high voltage in the input voltage range. The circuit also includes a second output transistor having a drain terminal connected to the output node and a source terminal connected to ground. The second output transistor is capable of coupling the output node to ground when the input signal is at a low voltage in the input voltage range. The circuit further includes a current-limiting circuit coupled to a gate terminal of the first output transistor and capable of limiting a current flowing through the gate terminal when the first output transistor is turned on. The output node outputs an output signal in an output voltage range, wherein a high voltage of the output voltage range exceeds the high voltage of the input voltage range.
    • 输出缓冲电路包括具有连接到电压源的源极端子和连接到输出节点的漏极端子的第一输出晶体管。 当输入信号在输入电压范围内处于高电压时,第一输出晶体管能够将输出节点耦合到电压源。 电路还包括具有连接到输出节点的漏极端子和连接到地的源极端子的第二输出晶体管。 当输入信号在输入电压范围内处于低电压时,第二输出晶体管能够将输出节点耦合到地。 电路还包括限流电路,其耦合到第一输出晶体管的栅极端子,并且当第一输出晶体管导通时能够限制流过栅极端子的电流。 输出节点输出输出电压范围内的输出信号,其中输出电压范围的高电压超过输入电压范围的高电压。