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    • 1. 发明申请
    • Disc Clamp Having Force Distributing Features
    • 具有力分配功能的光盘夹
    • US20070242388A1
    • 2007-10-18
    • US11733894
    • 2007-04-11
    • Bulent GokselMichael D. Leis
    • Bulent GokselMichael D. Leis
    • G11B17/02
    • G11B17/038G11B17/0287
    • A disc clamp is provided for securing discs to a spindle motor. In particular, the clamp is useful in providing distributed forces to the discs. The clamp includes an annular body having an upper surface, a lower surface, an inner circumference and an outer circumference. A flange extends from the lower surface of the annular body and has an inner surface oriented towards the inner circumference of the annular body. A plurality of apertures are formed between the upper and lower surfaces of the annular body and are configured to receive fasteners. Further, a plurality of force distributing features are formed in the flange between the outer surface of the flange and the inner surface of the flange.
    • 提供了用于将盘固定到主轴电机的盘夹。 特别地,夹具可用于向盘提供分布的力。 夹具包括具有上表面,下表面,内圆周和外圆周的环形体。 凸缘从环形体的下表面延伸并且具有朝向环形体的内圆周的内表面。 在环形体的上表面和下表面之间形成多个孔,并且构造成容纳紧固件。 此外,在凸缘的外表面和凸缘的内表面之间的凸缘中形成多个力分布特征。
    • 4. 发明授权
    • Auto-centered phase-locked loop
    • 自动对中锁相环
    • US5119043A
    • 1992-06-02
    • US544506
    • 1990-06-27
    • Russell W. BorwnMichael D. LeisElmer C. Simmons
    • Russell W. BorwnMichael D. LeisElmer C. Simmons
    • H03L7/089H03L7/099H03L7/187
    • H03L7/0805H03L7/0891H03L7/099H03L7/187
    • A multi-band processing system for automatically tuning the oscillator of a phase-locked loop to the frequency and phase of an applied input. The system includes an error detection circuit, a frequency controller, a scaling circuit, and a phase and frequency controller. The applied input and the oscillator output are coupled to the error detection circuit whose error output drives a charge pump/filter circuit. An error signal is derived from the difference between the loop charge pump output V.sub.1 and a preset charge pump zero error reference signal V.sub.ref, wherein the frequency controller regulates the oscillator output frequency according to a frequency error component of V.sub.1 -V.sub.ref, the scaling circuit scales the oscillator output frequency according to a system scaling signal N, and the phase and frequency controller adjusts the oscillator output frequency and phase according to V.sub.1 -V.sub.ref, when a 1/N multiple of the frequency of the oscillator output is compared in the error detection circuit to the frequency of the applied input.
    • 一种用于将锁相环的振荡器自动调谐到施加输入的频率和相位的多频带处理系统。 该系统包括错误检测电路,频率控制器,缩放电路以及相位和频率控制器。 施加的输入和振荡器输出耦合到误差检测电路,其误差输出驱动电荷泵/滤波器电路。 根据环路电荷泵输出V1和预设电荷泵零误差参考信号Vref之间的差异导出误差信号,其中频率控制器根据V1-Vref的频率误差分量来调节振荡器输出频率,缩放电路比例 振荡器输出频率根据系统缩放信号N,相位和频率控制器根据V1-Vref调节振荡器输出频率和相位,当在错误检测中比较振荡器输出频率的1 / N倍数 电路到施加输入的频率。
    • 5. 发明授权
    • Method and apparatus for using block reread
    • 使用块重读的方法和装置
    • US06412088B1
    • 2002-06-25
    • US09453164
    • 1999-12-02
    • Ara PatapoutianMichael D. LeisMathew P. Vea
    • Ara PatapoutianMichael D. LeisMathew P. Vea
    • G11C2900
    • G11B20/18G11B20/1876G11B2020/183
    • Disclosed is a method and apparatus for increasing the reliability of a disk drive. A block of information is read from a storage medium to provide a first sample, which is stored. The method determines whether an uncorrectable error occurred during the reading, and when the error is determined to have occurred, the block of information is reread from the storage medium to provide an averaged sample, and the average sample is decoded. Further disclosed is a storage unit, which includes a reader for reading a block of information from a storage medium to provide a first sample and for storing said first sample. An error determining mechanism determines whether an uncorrectable error occurred during the reading and issues a command to the reader to re-read the block of information to provide a second sample when the uncorrectable error is determined. A processor receives and averages the first sample and the second sample and produces an averaged sample. A decoder decodes the average sample.
    • 公开了一种用于增加磁盘驱动器的可靠性的方法和装置。 从存储介质读取信息块以提供被存储的第一样本。 该方法确定在读取期间是否发生不可纠正的错误,并且当确定发生错误时,从存储介质重新读取信息块以提供平均样本,并且对平均样本进行解码。 进一步公开的是一种存储单元,其包括用于从存储介质读取信息块以提供第一样本并用于存储所述第一样本的读取器。 错误确定机构确定在读取期间是否发生不可校正的错误,并且当确定不可校正的错误时向读者发出命令以重新读取信息块以提供第二样本。 处理器接收并平均第一样品和第二样品并产生平均样品。 解码器解码平均样本。
    • 6. 发明授权
    • Digital velocity servo
    • 数字速度伺服
    • US4380723A
    • 1983-04-19
    • US046130
    • 1979-06-05
    • Michael D. LeisRobert C. Rose
    • Michael D. LeisRobert C. Rose
    • H02P29/00G01P3/489H02P7/29H02P5/16
    • G01P3/489H02P7/2913Y10S388/902Y10S388/922
    • A servo circuit for electronically controlling the operation of an electric motor is disclosed. The rotational frequency of the motor is converted into a varying frequency waveform by a tachometer. The tachometer output is applied to a conversion circuit which includes a peak detector that converts the output waveform of the tachometer into a square-wave signal. The square-wave signal is, in turn, connected to one input of an exclusive-OR gate. The peak detector square-wave signal is also applied to a shift register which, after a time delay, applies the same signal to another input of the exclusive-OR gate. With these connections, the exclusive-OR gate produces a square-wave output whose duty cycle is proportional to the speed of the DC motor. This output can then be either amplified and applied directly to the electric motor to drive it, or integrated and applied to an amplifier to drive the motor in accordance with standard servo techniques.
    • 公开了用于电子控制电动机的操作的伺服电路。 电机的转速通过转速计转换成变化的频率波形。 转速计输出应用于转换电路,转换电路包括将转速表的输出波形转换为方波信号的峰值检测器。 方波信号又连接到异或门的一个输入。 峰值检测器方波信号也被施加到移位寄存器,该移位寄存器在时间延迟之后将相同的信号施加到异或门的另一个输入。 通过这些连接,异或门产生方波输出,其占空比与直流电机的速度成比例。 然后可以将该输出放大并直接施加到电动机以驱动它,或者将其整合并施加到放大器以根据标准伺服技术驱动电动机。
    • 9. 发明授权
    • Multiple bandwidth filter system for phase locked loop
    • 用于锁相环的多带宽滤波器系统
    • US4928075A
    • 1990-05-22
    • US371494
    • 1989-06-26
    • Michael D. Leis
    • Michael D. Leis
    • H03L7/107
    • H03L7/107
    • A method and apparatus for combining a plurality of different filtering paths of varying bandwidth to provide selectable bandwidth signal filtering without transients caused by initialization of filter components. The signal to be filtered is applied to a plurality of parallel connected passband filters ranging from a widest passband filter to a narrowest passband filter. The bandwidth of the parallel filter combination is progressively narrowed by sequentially holding the output level of each of the filters in declining order of their passband frequency range, beginning with the widest passband filter, until all of the output levels of the filters are held constant except for the narrowest passband filter. This filter system is especially adapted for use as a loop filter in a phase locked loop control system incorporated in a data storage disc drive.
    • 一种用于组合多个不同带宽的不同滤波路径的方法和装置,以提供可选择的带宽信号滤波,而不会由滤波器组件的初始化引起瞬变。 要滤波的信号被施加到从最宽通带滤波器到最窄通带滤波器的多个并联连接的通带滤波器。 并行滤波器组合的带宽通过依次保持每个滤波器的输出电平以通带频率范围的下降顺序逐渐变窄,从最宽通带滤波器开始,直到滤波器的所有输出电平保持不变,除了 用于最窄的通带滤波器。 该滤波器系统特别适用于并入数据存储盘驱动器中的锁相环控制系统中的环路滤波器。