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1. 发明申请

US20080014895A1 DIRECT CONVERSION RECEIVER ARCHITECTURE 有权
标题翻译：直接转换接收机架构
公开(公告)号：US20080014895A1
公开(公告)日：2008-01-17
申请号：US11862330
申请日：2007-09-27
申请人： Tao Li , Christian Holenstein , Inyup Kang , Brett Walker , Paul Peterzell , Raghu Challa , Matthew Severson , Arun Raghupathy , Gilbert Sih
发明人： Tao Li , Christian Holenstein , Inyup Kang , Brett Walker , Paul Peterzell , Raghu Challa , Matthew Severson , Arun Raghupathy , Gilbert Sih
IPC分类号： H04B1/26
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供一系列增益的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

2. 发明申请

US20050208919A1 Serial bus interface for direct conversion receiver 有权
标题翻译：用于直接转换接收器的串行总线接口
公开(公告)号：US20050208919A1
公开(公告)日：2005-09-22
申请号：US11131093
申请日：2005-05-16
申请人： Brett Walker , Paul Peterzell , Tao Li , Matthew Severson
发明人： Brett Walker , Paul Peterzell , Tao Li , Matthew Severson
IPC分类号： H03G1/00 , H03G3/20 , H03G3/30 , H04L27/22 , H04L27/38 , H04B1/06 , H04B1/10 , H04B7/00
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供增益范围的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

3. 发明申请

US20060038617A1 Continuously variable gain radio frequency driver amplifier having linear in decibel gain control characteristics 有权
公开(公告)号：US20060038617A1
公开(公告)日：2006-02-23
申请号：US11152445
申请日：2005-06-13
申请人： Kenneth Barnett , Brett Walker , Kevin Gard
发明人： Kenneth Barnett , Brett Walker , Kevin Gard
IPC分类号： H03G3/12
CPC分类号： H04B5/00 , H03F1/301 , H03G1/04 , H03G3/3036 , H03G3/3042 , H03G7/001
摘要： A radio frequency (RF) driver amplifier system and method that provides linear in decibel gain control is provided. The RF driver amplifier system comprises a linear transconductor receiving an input voltage and providing a controlled current based on input voltage received, temperature compensation circuitry for varying current from the linear transconductor according to absolute temperature, an exponential current controller receiving current varied according to temperature and providing an exponential current in response, and an inductive degeneration compensator receiving exponential current and providing a control current to driver amplifier circuitry, thereby compensating for inductive degeneration due to at least one inductor in the driver amplifier circuitry. Control current passes from the inductive degeneration compensator to the driver amplifier circuitry. Output gain from the driver amplifier circuitry varies linearly in decibels with respect to the input voltage.

4. 发明申请

US20110292855A1 DYNAMIC CLOCK BUFFER POWER OPTIMIZATION BASED ON MODES OF OPERATION 审中-公开
标题翻译：基于运行模式的动态时钟缓冲器功率优化
公开(公告)号：US20110292855A1
公开(公告)日：2011-12-01
申请号：US13118232
申请日：2011-05-27
申请人： Juhi Saha , Brett Walker , Chris Rosolowski , Soon-Seng Lau
发明人： Juhi Saha , Brett Walker , Chris Rosolowski , Soon-Seng Lau
IPC分类号： H04W52/02
CPC分类号： G06F1/04 , G06F1/3203
摘要： Circuitry configured for dynamically adjusting clock signal quality based on an operating mode for power savings is described. The circuitry includes clock generation circuitry. The circuitry also includes mode control circuitry. The mode control circuitry provides a drive signal based on an operating mode. The circuitry also includes clock buffer circuitry coupled to the clock generation circuitry and to the mode control circuitry. The clock buffer circuitry adjusts a clock signal quality based on the drive signal.
摘要翻译：描述了基于用于功率节省的操作模式来动态地调整时钟信号质量的电路。电路包括时钟发生电路。电路还包括模式控制电路。模式控制电路基于操作模式提供驱动信号。电路还包括耦合到时钟产生电路和模式控制电路的时钟缓冲器电路。时钟缓冲电路根据驱动信号调整时钟信号质量。

5. 发明申请

US20050259609A1 Single wire bus interface 审中-公开
标题翻译：单线总线接口
公开(公告)号：US20050259609A1
公开(公告)日：2005-11-24
申请号：US10851787
申请日：2004-05-20
申请人： David Hansquine , Brett Walker , Muhammad Muneer
发明人： David Hansquine , Brett Walker , Muhammad Muneer
IPC分类号： H04L12/40 , H04L12/413 , H04L12/50
CPC分类号： H04L12/40013 , H04L12/403
摘要： Embodiments disclosed herein address the need for a single wire bus interface. In one aspect, a device communicates with a second device via a single wire bus using a driver for driving the bus with a write frame comprising a start symbol, a write indicator symbol, an address, and data symbols. In another aspect, the device receives one or more data symbols on the single wire bus during a read frame. In yet another aspect, a device communicates with a second device via a single wire bus using a receiver for receiving a frame on the single wire bus comprising a start symbol, a write indicator symbol, an address, and one or more data symbols, and a driver for driving return read data associated with the address when the write indicator identifies a write frame. Various other aspects are also presented. These aspects provide for communication on a single wire bus, which allows for a reduction in pins, pads, or inter-block connections between devices.
摘要翻译：本文公开的实施例解决了对单个有线总线接口的需要。在一个方面，一种设备通过单线总线与第二设备通信，该驱动器用于使用包括起始符号，写指示符符号，地址和数据符号的写入帧来驱动总线。在另一方面，设备在读取帧期间在单线总线上接收一个或多个数据符号。在另一方面，一种设备通过单线总线与第二设备通信，该接收机用于在单线总线上接收包括开始符号，写指示符符号，地址和一个或多个数据符号的帧，以及当写入指示符识别写入帧时，驱动器用于驱动与地址相关联的读取数据。还提出了各种其他方面。这些方面提供了在单个有线总线上的通信，其允许减少引脚，焊盘或设备之间的块间连接。

6. 发明授权

US08376365B2 Target member 失效
标题翻译：目标成员
公开(公告)号：US08376365B2
公开(公告)日：2013-02-19
申请号：US12735841
申请日：2009-02-18
申请人： Brett Walker
发明人： Brett Walker
IPC分类号： F41J3/00
CPC分类号： F41J1/01 , F41J1/10 , F41J3/0004
摘要： A target member which may be used in conjunction with sporting activities, such as archery, comprising a housing (20, 21) having an outer surface which forms a portion of a target during use, the outer surface having an aperture (18) therein. The target member also comprises a degradable component (22) which is positionable within said housing such that at least a portion of said second component is exposed by said aperture (18). The exposed portion of said degradable component (22) forms part of the target and the degradable component (22) is repositionable upon degradation of the exposed portion through use of the target so as to expose a further portion of said second component (22) by said aperture (18) for further use.
摘要翻译：可以与诸如射箭等运动活动结合使用的目标构件，其包括在使用期间具有形成目标的一部分的外表面的壳体（20,21），所述外表面在其中具有孔（18）。目标构件还包括可降解构件（22），其可定位在所述壳体内，使得所述第二构件的至少一部分由所述孔（18）暴露。所述可降解组分（22）的暴露部分形成靶的一部分，并且可降解组分（22）在通过使用目标物使暴露部分劣化时可重新定位，以便将所述第二组分（22）的另一部分暴露出来所述孔（18）用于进一步使用。

7. 发明授权

US07506033B2 System and method for remotely accessing a client in a client server environment 有权
标题翻译：在客户端服务器环境中远程访问客户端的系统和方法
公开(公告)号：US07506033B2
公开(公告)日：2009-03-17
申请号：US09191256
申请日：1998-11-12
申请人： Douglas Robert Case , David Derk , James Michael Dile , Robert Clair Edwards, Jr. , Avishai Haim Hochberg , David T. Kwan , Thomas Franklin Ramke, Jr. , Pete Tanenhaus , Randy Tung , John Viksne , Brett Walker , Hui-Lan Wen
发明人： Douglas Robert Case , David Derk , James Michael Dile , Robert Clair Edwards, Jr. , Avishai Haim Hochberg , David T. Kwan , Thomas Franklin Ramke, Jr. , Pete Tanenhaus , Randy Tung , John Viksne , Brett Walker , Hui-Lan Wen
IPC分类号： G06F15/16 , G06F3/00
CPC分类号： H04L63/083 , H04L67/06 , H04L67/34 , H04L67/42 , H04L69/329
摘要： The present invention provides a system and method for remotely accessing a client in a client-server system. From a browser, an end user enters a URL containing a machine name and a port number. A listening program at the client listening on that port number establishes communication with the browser and invokes a client agent. The client agent includes conventional client functions as well as APIs that allow the client to interface with both the server and the browser. The client agent then serves an applet to the browser that makes the browser appear to the end user as the client machine. The user can then execute client functions from the browser. Examples of the client functions include backing up and restoring files from the client to/from the server, migrating or recalling files, archiving or retrieving files.
摘要翻译：本发明提供了一种用于在客户机 - 服务器系统中远程访问客户端的系统和方法。从浏览器中，最终用户输入一个包含机器名称和端口号的URL。侦听该端口号的客户端的侦听程序与浏览器建立通信并调用客户端代理。客户端代理包括常规客户端功能以及允许客户端与服务器和浏览器进行接口的API。然后，客户端代理服务器将浏览器的小程序提供给使最终用户作为客户机的浏览器。然后用户可以从浏览器执行客户端功能。客户端功能的示例包括从客户端到服务器的备份和还原文件，迁移或调用文件，归档或检索文件。

8. 发明申请

US20070049212A1 Discrete amplitude calibration of oscillators in frequency synthesizers 有权
标题翻译：频率合成器中振荡器的离散幅度校准
公开(公告)号：US20070049212A1
公开(公告)日：2007-03-01
申请号：US11436915
申请日：2006-05-18
申请人： Jeremy Dunworth , Brett Walker
发明人： Jeremy Dunworth , Brett Walker
IPC分类号： H04B1/40 , H04B1/06
CPC分类号： H03L7/099 , H03L5/00 , H03L7/18
摘要： In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more amplitude calibration techniques prior to enabling the PLL. For example, an amplitude calibration unit may be used to selectively activate switched unit current sources within a tail current source of the VCO. In this manner, the amplitude the signal generated by the oscillator can be adjusted without requiring closed-loop amplitude monitoring or control.
摘要翻译：在一个实施例中，本公开描述了一种在无线通信设备中使用的频率合成器或需要精确频率合成但是具有少量噪声的类似设备。特别地，频率合成器可以包括锁相环（PLL）和集成压控振荡器（VCO）。在使能PLL之前，频率合成器可以实现一个或多个振幅校准技术。例如，幅度校准单元可用于选择性地激活VCO的尾流源内的开关单元电流源。以这种方式，可以调节由振荡器产生的信号的幅度，而不需要闭环幅度监视或控制。

9. 发明申请

US20110024986A1 TARGET MEMBER 失效
标题翻译：目标成员
公开(公告)号：US20110024986A1
公开(公告)日：2011-02-03
申请号：US12735841
申请日：2009-02-18
申请人： Brett Walker
发明人： Brett Walker
IPC分类号： F41J3/00
CPC分类号： F41J1/01 , F41J1/10 , F41J3/0004
摘要： A target member which may be used in conjunction with sporting activities, such as archery, comprising a housing (20, 21) having an outer surface which forms a portion of a target during use, the outer surface having an aperture (18) therein. The target member also comprises a degradable component (22) which is positionable within said housing such that at least a portion of said second component is exposed by said aperture (18). The exposed portion of said degradable component (22) forms part of the target and the degradable component (22) is repositionable upon degradation of the exposed portion through use of the target so as to expose a further portion of said second component (22) by said aperture (18) for further use.
摘要翻译：可以与诸如射箭等运动活动结合使用的目标构件，其包括在使用期间具有形成目标的一部分的外表面的壳体（20,21），所述外表面在其中具有孔（18）。目标构件还包括可降解构件（22），其可定位在所述壳体内，使得所述第二构件的至少一部分由所述孔（18）暴露。所述可降解组分（22）的暴露部分形成靶的一部分，并且可降解组分（22）在通过使用目标物使暴露部分劣化时可重新定位，以便将所述第二组分（22）的另一部分暴露出来所述孔（18）用于进一步使用。

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