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1. 发明授权

US07487302B2 Service layer architecture for memory access system and method 有权
标题翻译：内存访问系统和方法的服务层体系结构
公开(公告)号：US07487302B2
公开(公告)日：2009-02-03
申请号：US11243527
申请日：2005-10-03
申请人： Brent I. Gouldey , Joel J. Fuster , John Rapp , Mark Jones
发明人： Brent I. Gouldey , Joel J. Fuster , John Rapp , Mark Jones
IPC分类号： G06F12/00
CPC分类号： G06F17/5054 , G06F9/54 , G06F11/1407 , G06F11/1417 , G06F11/142 , G06F11/2025 , G06F11/2028 , G06F11/2035 , G06F11/2038 , G06F11/2051 , G06F13/1694 , G06F15/7867 , G06F15/8053 , G06F17/505 , H04Q9/00
摘要： A memory subsystem includes a memory controller operable to generate first control signals according to a standard interface. A memory interface adapter is coupled to the memory controller and is operable responsive to the first control signals to develop second control signals adapted to be applied to a memory subsystem to access desired storage locations within the memory subsystem.
摘要翻译：存储器子系统包括可操作以根据标准接口产生第一控制信号的存储器控制器。存储器接口适配器耦合到存储器控制器，并且响应于第一控制信号可操作地开发适于被应用于存储器子系统以访问存储器子系统内的期望存储位置的第二控制信号。

2. 发明授权

US08189345B2 Electronics module, enclosure assembly housing same, and related systems and methods 有权
标题翻译：电子模块，外壳组件外壳相同，以及相关系统和方法
公开(公告)号：US08189345B2
公开(公告)日：2012-05-29
申请号：US12141773
申请日：2008-06-18
申请人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
发明人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
IPC分类号： H05K7/14
CPC分类号： H05K7/1442 , F42B15/01 , F42B30/006 , Y10T29/49826
摘要： Various embodiments of the invention relate to electronics modules, enclosure assemblies housing at least one such electronics module, and systems (e.g., missiles or unmanned vehicles) that may employ such enclosure assemblies. In one embodiment, an electronics module includes a first plate extending generally in a first plane, and a second plate spaced from the first plate and extending generally in a second plane. The electronics module further includes a plurality of electronic board assemblies each of which extends generally in a respective plane and is in thermal communication with at least one of the first and second plates. Each electronic board assembly may be positioned between the first and second plates and oriented so that the respective plane thereof is non-parallel relative to the first and second planes.
摘要翻译：本发明的各种实施例涉及电子模块，容纳至少一个这样的电子模块的外壳组件和可以使用这种外壳组件的系统（例如，导弹或无人驾驶的车辆）。在一个实施例中，电子模块包括大体上在第一平面中延伸的第一板和与第一板间隔开并且大致在第二平面中延伸的第二板。电子模块还包括多个电子板组件，每个电子板组件大体上在相应平面中延伸并且与第一和第二板中的至少一个热连通。每个电子板组件可以定位在第一板和第二板之间并且被定向成使得其相应平面相对于第一和第二平面不平行。

3. 发明申请

US20100046175A1 ELECTRONICS MODULE, ENCLOSURE ASSEMBLY HOUSING SAME, AND RELATED SYSTEMS AND METHODS 有权
标题翻译：电子模块，外壳组件外壳以及相关系统和方法
公开(公告)号：US20100046175A1
公开(公告)日：2010-02-25
申请号：US12141773
申请日：2008-06-18
申请人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
发明人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
IPC分类号： H05K7/14 , B23P11/00
CPC分类号： H05K7/1442 , F42B15/01 , F42B30/006 , Y10T29/49826
摘要： Various embodiments of the invention relate to electronics modules, enclosure assemblies housing at least one such electronics module, and systems (e.g., missiles or unmanned vehicles) that may employ such enclosure assemblies. In one embodiment, an electronics module includes a first plate extending generally in a first plane, and a second plate spaced from the first plate and extending generally in a second plane. The electronics module further includes a plurality of electronic board assemblies each of which extends generally in a respective plane and is in thermal communication with at least one of the first and second plates. Each electronic board assembly may be positioned between the first and second plates and oriented so that the respective plane thereof is non-parallel relative to the first and second planes.
摘要翻译：本发明的各种实施例涉及电子模块，容纳至少一个这样的电子模块的外壳组件和可以使用这种外壳组件的系统（例如，导弹或无人驾驶的车辆）。在一个实施例中，电子模块包括大体上在第一平面中延伸的第一板和与第一板间隔开并且大致在第二平面中延伸的第二板。电子模块还包括多个电子板组件，每个电子板组件大体上在相应平面中延伸并且与第一和第二板中的至少一个热连通。每个电子板组件可以定位在第一板和第二板之间并且被定向成使得其相应平面相对于第一和第二平面不平行。

4. 发明授权

US08773864B2 Enclosure assembly housing at least one electronic board assembly and systems using same 有权
标题翻译：外壳组件容纳至少一个电子板组件和使用其的系统
公开(公告)号：US08773864B2
公开(公告)日：2014-07-08
申请号：US12141799
申请日：2008-06-18
申请人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
发明人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
IPC分类号： H05K5/00
CPC分类号： H05K7/1434
摘要： Various embodiments of the invention relate to enclosure assemblies housing at least one electronic board assembly and systems (e.g., missiles or unmanned vehicles) that may employ such enclosure assemblies. In an embodiment, an enclosure assembly includes an enclosure having an interior surface defining an interior space and an inner diameter. At least one electronic board assembly is positioned within the interior space and includes a first peripheral edge region and an opposing second peripheral edge region. The electronic board assembly extends diametrically so that the first and second peripheral edge regions are at least proximate to the interior surface. In another embodiment, a plurality of electronic board assemblies are positioned within the interior space and each extends generally along a respective non-diametric chord defined by the interior surface.
摘要翻译：本发明的各种实施例涉及容纳至少一个电子板组件和可以采用这种外壳组件的系统（例如，导弹或无人驾驶车辆）的外壳组件。在一个实施例中，外壳组件包括具有限定内部空间和内径的内表面的外壳。至少一个电子板组件位于内部空间内，并且包括第一周边边缘区域和相对的第二周边边缘区域。电子板组件沿径向延伸，使得第一和第二周边边缘区域至少靠近内表面。在另一个实施例中，多个电子板组件定位在内部空间内，并且每个电子板组件大致沿着由内表面限定的相应的非直径弦延伸。

5. 发明申请

US20100046177A1 ENCLOSURE ASSEMBLY HOUSING AT LEAST ONE ELECTRONIC BOARD ASSEMBLY AND SYSTEMS USING SAME 有权
标题翻译：外壳装配最少一个电子板组件和系统使用相同
公开(公告)号：US20100046177A1
公开(公告)日：2010-02-25
申请号：US12141799
申请日：2008-06-18
申请人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
发明人： John W. Rapp , Nicholas J. Nagurny , Brent I. Gouldey , Mark Jones , Wendy S. Normark
IPC分类号： H05K5/00
CPC分类号： H05K7/1434
摘要： Various embodiments of the invention relate to enclosure assemblies housing at least one electronic board assembly and systems (e.g., missiles or unmanned vehicles) that may employ such enclosure assemblies. In an embodiment, an enclosure assembly includes an enclosure having an interior surface defining an interior space and an inner diameter. At least one electronic board assembly is positioned within the interior space and includes a first peripheral edge region and an opposing second peripheral edge region. The electronic board assembly extends diametrically so that the first and second peripheral edge regions are at least proximate to the interior surface. In another embodiment, a plurality of electronic board assemblies are positioned within the interior space and each extends generally along a respective non-diametric chord defined by the interior surface.
摘要翻译：本发明的各种实施例涉及容纳至少一个电子板组件和可以采用这种外壳组件的系统（例如，导弹或无人驾驶车辆）的外壳组件。在一个实施例中，外壳组件包括具有限定内部空间和内径的内表面的外壳。至少一个电子板组件位于内部空间内，并且包括第一周边边缘区域和相对的第二周边边缘区域。电子板组件沿径向延伸，使得第一和第二周边边缘区域至少靠近内表面。在另一个实施例中，多个电子板组件定位在内部空间内，并且每个电子板组件大致沿着由内表面限定的相应的非直径弦延伸。

6. 发明授权

US07814696B2 Projectile accelerator and related vehicle and method 有权
标题翻译：弹丸加速器及相关车辆及方法
公开(公告)号：US07814696B2
公开(公告)日：2010-10-19
申请号：US11264299
申请日：2005-10-31
申请人： John Rapp , Joseph R. Mayersak , Mark Jones , Michael E. Feeley , Robert J. Howard , Robert J. Varley , Stephen Melicher , Howard Taylor , Jyun-Horng Fu , Richard A. Udicious
发明人： John Rapp , Joseph R. Mayersak , Mark Jones , Michael E. Feeley , Robert J. Howard , Robert J. Varley , Stephen Melicher , Howard Taylor , Jyun-Horng Fu , Richard A. Udicious
IPC分类号： F41A19/58 , F41A1/10
CPC分类号： F42B5/035 , F41A19/65
摘要： A projectile system includes an enclosure, first and second propellants, and first and second projectiles. The first and second propellants are disposed within the enclosure. The first projectile is disposed within the enclosure between the first propellant and a first end of the enclosure, and is operable to exit the enclosure via the first end in response to detonation of the first charge. The second projectile is disposed within the enclosure between the second propellant and a second end of the enclosure, and is operable to exit the enclosure via the second end in response to the detonation of the second propellant.
摘要翻译：射弹系统包括外壳，第一和第二推进剂以及第一和第二射弹。第一和第二推进剂设置在外壳内。第一弹丸设置在第一推进剂和外壳的第一端之间的外壳内，并且可操作以响应于第一电荷的爆震而经由第一端离开外壳。第二抛射体设置在第二推进剂与外壳的第二端之间的外壳内，并且可操作以响应于第二推进剂的爆炸而经由第二端离开外壳。

7. 发明申请

US20060101250A1 Configurable computing machine and related systems and methods 审中-公开
标题翻译：可配置的计算机及相关系统和方法
公开(公告)号：US20060101250A1
公开(公告)日：2006-05-11
申请号：US11243459
申请日：2005-10-03
申请人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph Capizzi
发明人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph Capizzi
IPC分类号： G06F9/44
CPC分类号： G06F17/5054 , G06F9/54 , G06F11/1407 , G06F11/1417 , G06F11/142 , G06F11/2025 , G06F11/2028 , G06F11/2035 , G06F11/2038 , G06F11/2051 , G06F13/1694 , G06F15/7867 , G06F15/8053 , G06F17/505 , H04Q9/00
摘要： A computing machine includes programmable integrated circuits, a configuration registry, and a processor. The registry stores a file that defines a circuit having portions, and the processor is, in response to the file, operable to instantiate one of the circuit portions on one of the programmable integrated circuits. Consequently, by accessing a file that defines a circuit, such a computing machine can often instantiate the circuit on a pipeline accelerator regardless of the hardware that compose the accelerator and despite modifications to the circuit or to the hardware. That is, the computing machine can often “fit” the circuit into the pipeline accelerator regardless of its composition.
摘要翻译：计算机包括可编程集成电路，配置注册表和处理器。注册表存储定义具有部分的电路的文件，并且处理器响应于文件可操作以实例化其中一个可编程集成电路中的一个电路部分。因此，通过访问定义电路的文件，这种计算机器可以经常在线路加速器上实例化电路，而不考虑构成加速器的硬件，并且尽管修改了电路或硬件。也就是说，计算机通常可以将电路“适配”到管道加速器中，而不管其组成如何。

8. 发明授权

US07676649B2 Computing machine with redundancy and related systems and methods 有权
标题翻译：具有冗余和相关系统和方法的计算机
公开(公告)号：US07676649B2
公开(公告)日：2010-03-09
申请号：US11243507
申请日：2005-10-03
申请人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph A. Capizzi
发明人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph A. Capizzi
IPC分类号： G06F15/76 , G06F11/00 , G06F11/16 , G06F9/00
CPC分类号： G06F17/5054 , G06F9/54 , G06F11/1407 , G06F11/1417 , G06F11/142 , G06F11/2025 , G06F11/2028 , G06F11/2035 , G06F11/2038 , G06F11/2051 , G06F13/1694 , G06F15/7867 , G06F15/8053 , G06F17/505 , H04Q9/00
摘要： According to an embodiment of the invention, a computing machine comprises a pipeline accelerator, a host processor coupled to the pipeline accelerator, and a redundant processor, a redundant pipeline unit, or both, coupled to the host processor and to the pipeline accelerator. The computing machine may also include a system-restore server and a system-restore bus that allow the machine to periodically save the machine states in case of a failure. Such a computing machine has a fault-tolerant scheme that is often more flexible than conventional schemes. For example, if the pipeline accelerator has more extra “space” than the host processor, then one can add to the computing machine one or more redundant pipeline units that can provide redundancy to both the pipeline and the host processor. Therefore, the computing machine can include redundancy for the host processor even though it has no redundant processing units.
摘要翻译：根据本发明的实施例，计算机器包括流水线加速器，耦合到流水线加速器的主机处理器，以及耦合到主机处理器和流水线加速器的冗余处理器，冗余流水线单元或两者。计算机还可以包括系统恢复服务器和系统恢复总线，其允许机器在发生故障的情况下周期性地保存机器状态。这样的计算机具有通常比常规方案更灵活的容错方案。例如，如果流水线加速器具有比主处理器更多的“空间”，则可以向计算机添加一个或多个冗余流水线单元，其可以为流水线和主机处理器提供冗余。因此，即使计算机没有冗余处理单元，计算机也可以包括主机处理器的冗余。

9. 发明授权

US07809982B2 Reconfigurable computing machine and related systems and methods 有权
标题翻译：可重构计算机及相关系统和方法
公开(公告)号：US07809982B2
公开(公告)日：2010-10-05
申请号：US11243508
申请日：2005-10-03
申请人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph A. Capizzi
发明人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph A. Capizzi
IPC分类号： G06F11/00
CPC分类号： G06F17/5054 , G06F9/54 , G06F11/1407 , G06F11/1417 , G06F11/142 , G06F11/2025 , G06F11/2028 , G06F11/2035 , G06F11/2038 , G06F11/2051 , G06F13/1694 , G06F15/7867 , G06F15/8053 , G06F17/505 , H04Q9/00
摘要： A computing machine comprises an electronic circuit operable to perform a function, a programmable integrated circuit such as an FPGA, and a processor. The processor is operable to detect a failure of the electronic circuit and to configure the programmable integrated circuit to perform the function of the electronic circuit in response to detecting the failure. Alternatively, the computing machine comprises a hardwired pipeline operable to perform a function and a processor operable to detect a failure of the pipeline and to perform the function in response to detecting the failure. By allowing a first type of circuit (e.g., an FPGA) to take over for a failed second type of circuit (e.g., a processor), such a computing machine can be fault-tolerant without having redundant versions of each component, and may thus be less expensive and smaller than computing machines of comparable computing power.
摘要翻译：计算机包括可执行功能的电子电路，诸如FPGA的可编程集成电路和处理器。处理器可操作以检测电子电路的故障并且配置可编程集成电路以响应于检测到故障来执行电子电路的功能。或者，计算机包括可操作以执行功能的硬连线管线和可操作以检测管道故障并且响应于检测到故障而执行功能的处理器。通过允许第一类电路（例如，FPGA）接管故障的第二类电路（例如，处理器），这样的计算机可以是容错的，而不需要每个组件的冗余版本，并且因此可以比较可靠的计算能力的计算机更便宜，更小。

10. 发明申请

US20060101253A1 Computing machine with redundancy and related systems and methods 有权
标题翻译：具有冗余的计算机及相关系统和方法
公开(公告)号：US20060101253A1
公开(公告)日：2006-05-11
申请号：US11243507
申请日：2005-10-03
申请人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph Capizzi
发明人： John Rapp , Chandan Mathur , Scott Hellenbach , Mark Jones , Joseph Capizzi
IPC分类号： G06F9/44
CPC分类号： G06F17/5054 , G06F9/54 , G06F11/1407 , G06F11/1417 , G06F11/142 , G06F11/2025 , G06F11/2028 , G06F11/2035 , G06F11/2038 , G06F11/2051 , G06F13/1694 , G06F15/7867 , G06F15/8053 , G06F17/505 , H04Q9/00
摘要： According to an embodiment of the invention, a computing machine comprises a pipeline accelerator, a host processor coupled to the pipeline accelerator, and a redundant processor, a redundant pipeline unit, or both, coupled to the host processor and to the pipeline accelerator. The computing machine may also include a system-restore server and a system-restore bus that allow the machine to periodically save the machine states in case of a failure. Such a computing machine has a fault-tolerant scheme that is often more flexible than conventional schemes. For example, if the pipeline accelerator has more extra “space” than the host processor, then one can add to the computing machine one or more redundant pipeline units that can provide redundancy to both the pipeline and the host processor. Therefore, the computing machine can include redundancy for the host processor even though it has no redundant processing units.
摘要翻译：根据本发明的实施例，计算机器包括流水线加速器，耦合到流水线加速器的主机处理器，以及耦合到主机处理器和流水线加速器的冗余处理器，冗余流水线单元或两者。计算机还可以包括系统恢复服务器和系统恢复总线，其允许机器在发生故障的情况下周期性地保存机器状态。这样的计算机具有通常比常规方案更灵活的容错方案。例如，如果流水线加速器具有比主处理器更多的“空间”，则可以向计算机添加一个或多个冗余流水线单元，其可以为流水线和主机处理器提供冗余。因此，即使计算机没有冗余处理单元，计算机也可以包括主机处理器的冗余。

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