专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20150040111A1 HANDLING PRECOMPILED BINARIES IN A HARDWARE ACCELERATED SOFTWARE TRANSACTIONAL MEMORY SYSTEM 有权
标题翻译：在硬件加速软件交易存储系统中处理预先确定的二进制
公开(公告)号：US20150040111A1
公开(公告)日：2015-02-05
申请号：US14271024
申请日：2014-05-06
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn A. Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn A. Jacobson
IPC分类号： G06F9/30 , G06F9/38 , G06F9/46 , G06F12/08
CPC分类号： G06F9/30087 , G06F9/3004 , G06F9/30043 , G06F9/30076 , G06F9/3834 , G06F9/3851 , G06F9/3861 , G06F9/467 , G06F12/0837 , G06F2212/62
摘要： A method and apparatus for enabling a Software Transactional Memory (STM) with precompiled binaries is herein described. Upon encountering an access operation in a transaction, an annotation field associated with a memory location referenced by the access is checked. In response to the memory location representing a previous similar access within the transaction, the access is performed without access barriers. However, if the annotation field is in a default state representing no previous access during a pendancy of the transaction, then a mode of the processor is determined. If the processor mode is in implicit mode, an access handler/barrier is asynchronously executed. Conversely, in an explicit mode, a flag is set instead of asynchronously executing the handler. In addition, during compilation convert explicit and convert implicit instructions are inserted to intelligently convert modes for precompiled and newly compiled binaries. Furthermore, new versions of newly compiled functions may be inserted to provide strong atomicity between previously and newly compiled functions.
摘要翻译：这里描述了使用预编译二进制文件实现软件事务存储器（STM）的方法和装置。在事务中遇到访问操作时，检查与由访问引用的存储器位置相关联的注释字段。响应于表示事务内先前类似访问的存储器位置，访问被执行而没有访问障碍。然而，如果注释字段处于表示在事务的挂起期间没有先前访问的默认状态，则确定处理器的模式。如果处理器模式处于隐式模式，则异步执行访问处理程序/障碍。相反，在显式模式下，设置标志而不是异步执行处理程序。此外，在编译期间，转换显式和转换隐式指令将被智能地转换为预编译和新编译的二进制文件的模式。此外，可以插入新版本的新编译的函数，以便在先前和新编译的函数之间提供强大的原子性。

2. 发明授权

US08719514B2 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US08719514B2
公开(公告)日：2014-05-06
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F13/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

3. 发明授权

US08706982B2 Mechanisms for strong atomicity in a transactional memory system 有权
标题翻译：事务记忆系统中强原子性的机制
公开(公告)号：US08706982B2
公开(公告)日：2014-04-22
申请号：US11967231
申请日：2007-12-30
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Cheng Wang , Tatiana Shpeisman
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Cheng Wang , Tatiana Shpeisman
IPC分类号： G06F12/12
CPC分类号： G06F9/30087 , G06F9/3004 , G06F9/467
摘要： A method and apparatus for providing efficient strong atomicity is herein described. Optimized strong operations may be inserted at non-transactional read accesses to provide efficient strong atomicity. A global transaction value is copied at a beginning of a non-transactional function to a local transaction value; essentially creating a local timestamp of the global transaction value. At a non-transactional memory access within the function, a counter value or version value is compared to the LTV to see if a transaction has started updating memory locations, or specifically the memory location accessed. If memory locations have not been updated by a transaction, execution is accelerated by avoiding a full set of slowpath strong atomic operations to ensure validity of data accessed. In contrast, the slowpath operations may be executed to resolve contention between a transactional and non-transaction access contending for the same memory location.
摘要翻译：这里描述了提供有效的强原子性的方法和装置。可以在非事务性读访问中插入优化的强操作，以提供有效的强原子性。全局事务值在非事务函数的开头被复制到本地事务值; 基本上创建了全局事务值的本地时间戳。在功能内的非事务性存储器访问中，将计数器值或版本值与LTV进行比较，以查看事务是否开始更新存储器位置，或具体地访问存储器位置。如果事务没有更新存储器位置，则通过避免一整套的慢路强原子操作来加速执行，以确保访问的数据的有效性。相比之下，可以执行慢路操作来解决争用相同内存位置的事务和非事务访问之间的争用。

4. 发明授权

US08627048B2 Mechanism for irrevocable transactions 有权
标题翻译：不可撤销交易的机制
公开(公告)号：US08627048B2
公开(公告)日：2014-01-07
申请号：US13231575
申请日：2011-09-13
申请人： Adam Welc , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Adam Welc , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F9/00
CPC分类号： G06F9/526 , G06F9/3004 , G06F9/30087 , G06F9/3857 , G06F9/3863
摘要： A method and apparatus for designating and handling irrevocable transactions is herein described. In response to detecting an irrevocable event, such as an I/O operation, a user-defined irrevocable designation, and a dynamic failure profile, a transaction is designated as irrevocable. In response to designating a transaction as irrevocable, Single Owner Read Locks (SORLs) are acquired for previous and subsequent reads in the irrevocably designated transaction to ensure the transaction is able to complete without modification to locations read from, while permitting remote resources to load from those locations to continue execution.
摘要翻译：这里描述用于指定和处理不可撤销交易的方法和装置。响应于检测到诸如I / O操作，用户定义的不可撤销指定和动态故障简档的不可撤销事件，交易被指定为不可撤销。为了将交易指定为不可撤销，单独所有者读取锁（SORL）是为不可撤销地指定的事务中的先前和后续读取而获取的，以确保事务能够完成，而无需修改读取的位置，同时允许远程资源从那些位置继续执行。

5. 发明授权

US08356166B2 Minimizing code duplication in an unbounded transactional memory system by using mode agnostic transactional read and write barriers 有权
标题翻译：通过使用模式不可知事务读写障碍来最大限度地减少无界事务内存系统中的代码重复
公开(公告)号：US08356166B2
公开(公告)日：2013-01-15
申请号：US12493168
申请日：2009-06-26
申请人： Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
发明人： Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
IPC分类号： G06F15/00 , G06F9/00 , G06F9/44 , G06F7/38
CPC分类号： G06F9/3004 , G06F9/30076 , G06F9/30087 , G06F9/30101 , G06F9/30181 , G06F9/30189 , G06F9/3857 , G06F9/467
摘要： Minimizing code duplication in an unbounded transactional memory system. A computing apparatus including one or more processors in which it is possible to use a set of common mode-agnostic TM barrier sequences that runs on legacy ISA and extended ISA processors, and that employs hardware filter indicators (when available) to filter redundant applications of TM barriers, and that enables a compiled binary representation of the subject code to run correctly in any of the currently implemented set of transactional memory execution modes, including running the code outside of a transaction, and that enables the same compiled binary to continue to work with future TM implementations which may introduce as yet unknown future TM execution modes.
摘要翻译：最大限度地减少无界事务内存系统中的代码重复。一种包括一个或多个处理器的计算设备，其中可以使用在传统ISA和扩展ISA处理器上运行的一组共同模式不可知TM屏障序列，并且采用硬件滤波器指示器（当可用时）可以过滤冗余应用 TM屏障，并且使得主体代码的编译二进制表示可以在任何当前实现的事务存储器执行模式集中运行，包括在事务之外运行代码，并且使得相同的编译的二进制文件能够继续工作与未来的TM实现可能会引入未知的未来TM执行模式。

6. 发明授权

US08099538B2 Increasing functionality of a reader-writer lock 有权
标题翻译：增加读写器锁的功能
公开(公告)号：US08099538B2
公开(公告)日：2012-01-17
申请号：US11392381
申请日：2006-03-29
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00 , G06F12/14 , G06F13/00 , G06F13/28
CPC分类号： G06F12/145 , G06F9/4881 , G06F9/526
摘要： In one embodiment, the present invention includes a method for accessing a shared memory associated with a reader-writer lock according to a first concurrency mode, dynamically changing from the first concurrency mode to a second concurrency mode, and accessing the shared memory according to the second concurrency mode. In this way, concurrency modes can be adaptively changed based on system conditions. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种用于根据第一并发模式访问与读写器锁相关联的共享存储器的方法，该方法从第一并发模式动态地改变到第二并发模式，以及根据所述第一并发模式访问共享存储器第二并发模式。以这种方式，可以根据系统条件自适应地改变并发模式。描述和要求保护其他实施例。

7. 发明授权

US08065490B2 Hardware acceleration of strongly atomic software transactional memory 有权
标题翻译：强力原子软件交易内存的硬件加速
公开(公告)号：US08065490B2
公开(公告)日：2011-11-22
申请号：US11906175
申请日：2007-09-28
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Cheng Wang
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Cheng Wang
IPC分类号： G06F9/312
CPC分类号： G06F9/467 , G06F9/3004 , G06F9/30087 , G06F9/3834
摘要： In accordance with some embodiments, software transactional memory may be used for both managed and unmanaged environments. If a cache line is resident in a cache and this is not the first time that the cache line has been read since the last write, then the data may be read directly from the cache line, improving performance. Otherwise, a normal read may be utilized to read the information. Similarly, write performance can be accelerated in some instances to improve performance.
摘要翻译：根据一些实施例，软件事务存储器可以用于被管理的和非管理的环境。如果高速缓存行驻留在缓存中，并且这不是自上次写入以来第一次读取高速缓存行，则可以直接从高速缓存行读取数据，从而提高性能。否则，可以使用正常读取来读取信息。同样，在某些情况下，写入性能可以加快，以提高性能。

8. 发明授权

US08060482B2 Efficient and consistent software transactional memory 有权
标题翻译：高效一致的软件事务内存
公开(公告)号：US08060482B2
公开(公告)日：2011-11-15
申请号：US11648012
申请日：2006-12-28
申请人： Cheng Wang , Youfeng Wu , Wei-Yu Chen , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Cheng Wang , Youfeng Wu , Wei-Yu Chen , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F7/00 , G06F17/00 , G06F17/30
CPC分类号： G06F8/458 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3859 , G06F9/3863 , G06F9/467
摘要： A method and apparatus for efficient and consistent validation/conflict detection in a Software Transactional Memory (STM) system is herein described. A version check barrier is inserted after a load to compare versions of loaded values before and after the load. In addition, a global timestamp (GTS) is utilized to track a latest committed transaction. Each transaction is associated with a local timestamp (LTS) initialized to the GTS value at the start of a transaction. As a transaction commits it updates the GTS to a new value and sets versions of modified locations to the new value. Pending transactions compare versions determined in read barriers to their LTS. If the version is greater than their LTS indicating another transaction has committed after the pending transaction started and initialized the LTS, then the pending transaction validates its read set to maintain efficient and consistent transactional execution.
摘要翻译：这里描述了用于在软件事务存储器（STM）系统中有效且一致的验证/冲突检测的方法和装置。在加载之后插入版本检查障碍，以便在加载之前和之后比较加载值的版本。此外，使用全局时间戳（GTS）来跟踪最近提交的事务。每个事务与在事务开始时初始化为GTS值的本地时间戳（LTS）相关联。作为事务提交，将GTS更新为新值，并将修改的位置的版本设置为新值。待处理的交易将比较其在LTS阅读障碍中确定的版本。如果版本大于其LTS，指示在挂起事务启动并初始化LTS之后另一个事务已经提交，则挂起的事务会验证其读取集合以保持有效且一致的事务执行。

9. 发明申请

US20090319753A1 HYBRID LINEAR VALIDATION ALGORITHM FOR SOFTWARE TRANSACTIONAL MEMORY (STM) SYSTEMS 有权
标题翻译：用于软件交互式存储器（STM）系统的混合线性验证算法
公开(公告)号：US20090319753A1
公开(公告)日：2009-12-24
申请号：US12142097
申请日：2008-06-19
申请人： Adam Welc , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Adam Welc , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/06
CPC分类号： G06F9/526 , G06F9/466
摘要： A method and apparatus for hybrid validation for a Software Transaction Memory (STM) is herein described. During execution of a transaction, when acquiring ownership of meta-data associated with a data element, the meta-data is updated with an ownership reference to a transaction to enable efficient subsequent ownership tests. However, during validation, for some conditions, meta-data is updated from the ownership reference to a write entry reference to enable efficient validation.
摘要翻译：这里描述了用于软件事务存储器（STM）的混合验证的方法和装置。在执行事务期间，当获取与数据元素相关联的元数据的所有权时，元数据被更新为对事务的所有权引用，以便能够进行有效的后续所有权测试。然而，在验证期间，对于某些条件，元数据从所有权引用更新为写入条目引用以实现高效验证。

10. 发明授权

US07606981B2 System and method for reducing store latency 有权
标题翻译：减少存储延迟的系统和方法
公开(公告)号：US07606981B2
公开(公告)日：2009-10-20
申请号：US11311751
申请日：2005-12-19
申请人： Bratin Saha , Hariharan L. Thantry , Ali-Reza Adl-Tabatabai
发明人： Bratin Saha , Hariharan L. Thantry , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00
CPC分类号： G06F12/0822
摘要： According to one embodiment of the invention, a method comprises verifying that a cache block is not exclusively owned, and if not, transmitting a message identifying both the cache block and a caching agent requesting ownership of the cache block to a broadcast interconnect.
摘要翻译：根据本发明的一个实施例，一种方法包括验证高速缓存块不是专有的，如果没有，则将识别高速缓存块和缓存代理的高速缓存代理的消息发送到广播互连。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式