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1. 发明申请

US20060094197A1 Method of trimming semiconductor elements with electrical resistance feedback 有权
标题翻译：用电阻反馈修整半导体元件的方法
公开(公告)号：US20060094197A1
公开(公告)日：2006-05-04
申请号：US10983314
申请日：2004-11-04
申请人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
发明人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
IPC分类号： H01L21/20
CPC分类号： H01L28/20 , H01C17/267 , H01L22/22
摘要： A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is applied to the electrodes to produce an electrical current through the conductive material sufficient to heat and melt away a portion of the conductive material. By reducing the volume of the conductive material, its resistance is increased. The application of the voltage is ceased once the desired dimensions (and thus resistivity) of the conductive material is reached. The resulting semiconductor resistor element could have a fixed resistance, or could have a variable resistance (by using phase change memory material).
摘要翻译：使用电阻反馈来减少半导体电阻元件的体积的方法。在形成设置在一对电极之间的导电材料之后，向电极施加电压以产生通过导电材料的电流，足以加热和熔化掉导电材料的一部分。通过减小导电材料的体积，其电阻增加。一旦达到导电材料的所需尺寸（因此电阻率），电压的施加就会停止。所得到的半导体电阻元件可以具有固定电阻，或者可以具有可变电阻（通过使用相变存储器材料）。

2. 发明授权

US07790518B2 Method of trimming semiconductor elements with electrical resistance feedback 有权
标题翻译：用电阻反馈修整半导体元件的方法
公开(公告)号：US07790518B2
公开(公告)日：2010-09-07
申请号：US12027916
申请日：2008-02-07
申请人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
发明人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
IPC分类号： H01L21/82
CPC分类号： H01L28/20 , H01C17/267 , H01L22/22
摘要： A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is applied to the electrodes to produce an electrical current through the conductive material sufficient to heat and melt away a portion of the conductive material. By reducing the volume of the conductive material, its resistance is increased. The application of the voltage is ceased once the desired dimensions (and thus resistivity) of the conductive material is reached. The resulting semiconductor resistor element could have a fixed resistance, or could have a variable resistance (by using phase change memory material).
摘要翻译：使用电阻反馈来减少半导体电阻元件的体积的方法。在形成设置在一对电极之间的导电材料之后，向电极施加电压以产生通过导电材料的电流，足以加热和熔化掉导电材料的一部分。通过减小导电材料的体积，其电阻增加。一旦达到导电材料的所需尺寸（因此电阻率），电压的施加就会停止。所得到的半导体电阻元件可以具有固定电阻，或者可以具有可变电阻（通过使用相变存储器材料）。

3. 发明申请

US20080131982A1 Method Of Trimming Semiconductor Elements With Electrical Resistance Feedback 有权
标题翻译：使用电阻反馈修整半导体元件的方法
公开(公告)号：US20080131982A1
公开(公告)日：2008-06-05
申请号：US12027916
申请日：2008-02-07
申请人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
发明人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
IPC分类号： H01L21/02
CPC分类号： H01L28/20 , H01C17/267 , H01L22/22
摘要： A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is applied to the electrodes to produce an electrical current through the conductive material sufficient to heat and melt away a portion of the conductive material. By reducing the volume of the conductive material, its resistance is increased. The application of the voltage is ceased once the desired dimensions (and thus resistivity) of the conductive material is reached. The resulting semiconductor resistor element could have a fixed resistance, or could have a variable resistance (by using phase change memory material).
摘要翻译：使用电阻反馈来减少半导体电阻元件的体积的方法。在形成设置在一对电极之间的导电材料之后，向电极施加电压以产生通过导电材料的电流，足以加热和熔化掉导电材料的一部分。通过减小导电材料的体积，其电阻增加。一旦达到导电材料的所需尺寸（因此电阻率），电压的施加就会停止。所得到的半导体电阻元件可以具有固定电阻，或者可以具有可变电阻（通过使用相变存储器材料）。

4. 发明授权

US07351613B2 Method of trimming semiconductor elements with electrical resistance feedback 有权
标题翻译：用电阻反馈修整半导体元件的方法
公开(公告)号：US07351613B2
公开(公告)日：2008-04-01
申请号：US10983314
申请日：2004-11-04
申请人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
发明人： Bomy Chen , Ya-Fen Lin , Zhitang Song , Songlin Feng
IPC分类号： H01L21/82
CPC分类号： H01L28/20 , H01C17/267 , H01L22/22
摘要： A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is applied to the electrodes to produce an electrical current through the conductive material sufficient to heat and melt away a portion of the conductive material. By reducing the volume of the conductive material, its resistance is increased. The application of the voltage is ceased once the desired dimensions (and thus resistivity) of the conductive material is reached. The resulting semiconductor resistor element could have a fixed resistance, or could have a variable resistance (by using phase change memory material).
摘要翻译：使用电阻反馈来减少半导体电阻元件的体积的方法。在形成设置在一对电极之间的导电材料之后，向电极施加电压以产生通过导电材料的电流，足以加热和熔化掉导电材料的一部分。通过减小导电材料的体积，其电阻增加。一旦达到导电材料的所需尺寸（因此电阻率），电压的施加就会停止。所得到的半导体电阻元件可以具有固定电阻，或者可以具有可变电阻（通过使用相变存储器材料）。

5. 发明申请

US20130292629A1 PHASE CHANGE MEMORY CELL AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：相变存储单元及其制造方法
公开(公告)号：US20130292629A1
公开(公告)日：2013-11-07
申请号：US13202697
申请日：2011-06-23
申请人： Bo Liu , Zhitang Song , Ting Zhang , Ying Li , Min Zhong , Songlin Feng
发明人： Bo Liu , Zhitang Song , Ting Zhang , Ying Li , Min Zhong , Songlin Feng
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/16 , H01L45/1625 , H01L45/1683
摘要： The present invention provides a phase change memory cell and fabrication method thereof, wherein said phase change memory cell comprises a semiconductor substrate, a first electrode layer, a phase change material layer, a second electrode layer and an extraction electrode, as well as a high resistance material layer used to prevent said phase change material layer from over-corrosion during the chemical mechanical polishing process, and wherein said high resistance material layer has a resistance ten or more times that of the phase change material layer and can be used to prevent phase change material layer from over-corrosion during the chemical mechanical polishing process and thus enhance the memory performance and the yield of phase change memory cell.
摘要翻译：本发明提供一种相变存储单元及其制造方法，其中所述相变存储单元包括半导体衬底，第一电极层，相变材料层，第二电极层和引出电极以及高用于防止所述相变材料层在化学机械抛光工艺期间过度腐蚀的电阻材料层，并且其中所述高电阻材料层具有相变材料层的电阻的十倍或更多倍，并且可用于防止相位在化学机械抛光过程中改变材料层的过度腐蚀，从而提高相变存储单元的记忆性能和产量。

6. 发明授权

US08722455B2 Phase change memory structure having low-K dielectric heat-insulating material and fabrication method thereof 有权
标题翻译：具有低K介电隔热材料的相变存储结构及其制造方法
公开(公告)号：US08722455B2
公开(公告)日：2014-05-13
申请号：US13202955
申请日：2011-06-24
申请人： Zhitang Song , Liangcai Wu , Songlin Feng
发明人： Zhitang Song , Liangcai Wu , Songlin Feng
IPC分类号： H01L21/06 , H01L21/20 , H01L21/8258 , H01L29/792
CPC分类号： H01L21/8258 , H01L27/2409 , H01L29/7923 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1293 , H01L45/144 , H01L45/1625 , H01L45/1683
摘要： The present invention discloses a phase change memory structure having low-k dielectric heat-insulating material and fabrication method thereof, wherein the phase change memory cell comprises diode, heating electrode, reversible phase change resistor, top electrode and etc; the heating electrode and reversible phase change resistor are surrounded by low-k dielectric heat-insulating layer; an anti-diffusion dielectric layer is designed between the reversible phase change resistor and the low-k dielectric heat-insulating layer surrounding thereof. The present invention utilizes low-k dielectric material as heat-insulating material, thereby avoiding thermal crosstalk and mutual influence during operation between phase change memory cells, enhancing the reliability of devices, and eliminating the influence of temperature, pressure and etc. on phase change random access memory (PCRAM) data retention during the change from amorphous to polycrystalline states. Furthermore, an anti-diffusion dielectric layer is prepared between the low-k dielectric material and the phase change material, which can be used to prevent the elements of the phase change material from diffusing to low-k dielectric material. The fabrication process of said phase change memory is compatible with standard complementary metal-oxide semiconductor (CMOS) process and the chemical mechanical polishing (CMP) process with low pressure and light corrosion is adopted in polishing.
摘要翻译：本发明公开了一种具有低k介电绝缘材料的相变存储器结构及其制造方法，其中相变存储单元包括二极管，加热电极，可逆相变电阻器，顶电极等; 加热电极和可逆相变电阻器被低k电介质绝热层包围; 在可逆相变电阻器和围绕其的低k电介质隔热层之间设计了抗扩散电介质层。本发明利用低k绝缘材料作为绝热材料，从而避免相变存储器单元之间的热串扰和相互影响，提高器件的可靠性，消除温度，压力等对相变的影响随机存取存储器（PCRAM）在从无定形到多晶状态的变化期间的数据保留。此外，在低k电介质材料和相变材料之间制备抗扩散电介质层，其可用于防止相变材料的元素扩散到低k电介质材料。所述相变存储器的制造过程与标准互补金属氧化物半导体（CMOS）工艺兼容，并且在抛光中采用具有低压和轻腐蚀的化学机械抛光（CMP）工艺。

7. 发明申请

US20130175493A1 PHASE CHANGE MEMORY STRUCTURE HAVING LOW-K DIELECTRIC HEAT-INSULATING MATERIAL AND FABRICATION METHOD THEREOF 有权
标题翻译：具有低K电介质绝热材料的相变记忆结构及其制造方法
公开(公告)号：US20130175493A1
公开(公告)日：2013-07-11
申请号：US13202955
申请日：2011-06-24
申请人： Zhitang Song , Liangcai Wu , Songlin Feng
发明人： Zhitang Song , Liangcai Wu , Songlin Feng
IPC分类号： H01L45/00
CPC分类号： H01L21/8258 , H01L27/2409 , H01L29/7923 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1293 , H01L45/144 , H01L45/1625 , H01L45/1683
摘要： The present invention discloses a phase change memory structure having low-k dielectric heat-insulating material and fabrication method thereof, wherein the phase change memory cell comprises diode, heating electrode, reversible phase change resistor, top electrode and etc; the heating electrode and reversible phase change resistor are surrounded by low-k dielectric heat-insulating layer; an anti-diffusion dielectric layer is designed between the reversible phase change resistor and the low-k dielectric heat-insulating layer surrounding thereof. The present invention utilizes low-k dielectric material as heat-insulating material, thereby avoiding thermal crosstalk and mutual influence during operation between phase change memory cells, enhancing the reliability of devices, and eliminating the influence of temperature, pressure and etc. on phase change random access memory (PCRAM) data retention during the change from amorphous to polycrystalline states. Furthermore, an anti-diffusion dielectric layer is prepared between the low-k dielectric material and the phase change material, which can be used to prevent the elements of the phase change material from diffusing to low-k dielectric material. The fabrication process of said phase change memory is compatible with standard complementary metal-oxide semiconductor (CMOS) process and the chemical mechanical polishing (CMP) process with low pressure and light corrosion is adopted in polishing.
摘要翻译：本发明公开了一种具有低k介电绝缘材料的相变存储器结构及其制造方法，其中相变存储单元包括二极管，加热电极，可逆相变电阻器，顶电极等; 加热电极和可逆相变电阻器被低k电介质绝热层包围; 在可逆相变电阻器和围绕其的低k电介质隔热层之间设计了抗扩散电介质层。本发明利用低k绝缘材料作为绝热材料，从而避免相变存储器单元之间的热串扰和相互影响，提高器件的可靠性，消除温度，压力等对相变的影响随机存取存储器（PCRAM）在从无定形到多晶状态的变化期间的数据保留。此外，在低k电介质材料和相变材料之间制备抗扩散电介质层，其可用于防止相变材料的元素扩散到低k电介质材料。所述相变存储器的制造过程与标准互补金属氧化物半导体（CMOS）工艺兼容，并且在抛光中采用具有低压和轻腐蚀的化学机械抛光（CMP）工艺。

8. 发明申请

US20070259471A1 MEMS device including a laterally movable portion with piezo-resistive sensing elements and electrostatic actuating elements on trench side walls, and methods for producing the same 有权
标题翻译： MEMS器件包括具有压阻感测元件的侧向可移动部分和在沟槽侧壁上的静电致动元件及其制造方法
公开(公告)号：US20070259471A1
公开(公告)日：2007-11-08
申请号：US11811572
申请日：2007-06-11
申请人： Xinxin Li , Heng Yang , Yuelin Wang , Songlin Feng
发明人： Xinxin Li , Heng Yang , Yuelin Wang , Songlin Feng
IPC分类号： H01L31/062 , H01L31/113 , H01L21/00
CPC分类号： B81C1/00547
摘要： A method to create piezoresistive sensing elements and electrostatic actuator elements on trench sidewalls is disclosed. P-type doped region(s) 25 are formed in the upper surface of an n-type substrate 20. A trench 22 is formed in the substrate (e.g. by DRIE process) intersecting with the doped regions and defining a portion 21 of the substrate which is movable in the plane of the substrate relative to the rest of the substrate. Then diffusion of P-type dopant into the trench side-walls creates piezoresistive elements 27 and electrode elements 29 for electrostatic actuation. Owing to the intersection of two doped regions, there are good electrical paths between the electrical elements 27, 29 on the trench side-walls and the previously P-typedoped portions 25 on the wafer surface. The trench 22 intersects with insulating elements 28, so that insulating elements 28 mutually insulate adjacent electrical elements 27, 29. P-n junctions between the electrical elements 27, 29 and the substrate 20 insulate the electrical elements 27, 29 from the substrate.
摘要翻译：公开了一种在沟槽侧壁上形成压阻感测元件和静电致动元件的方法。 P型掺杂区25形成在n型衬底20的上表面中。沟槽22形成在衬底中（例如通过DRIE工艺）与掺杂区交叉，并且限定衬底的相对于衬底的其余部分在衬底的平面中可移动的部分21。然后，P型掺杂剂扩散到沟槽侧壁中，形成用于静电致动的压阻元件27和电极元件29。由于两个掺杂区域的交点，在沟槽侧壁上的电气元件27,29和晶片表面上的先前的P型化部分25之间存在良好的电路径。沟槽22与绝缘元件28相交，使得绝缘元件28相互绝缘相邻的电气元件27,29。电气元件27,29和基板20之间的P-n结将电气元件27,29与基板绝缘。

9. 发明授权

US07550358B2 MEMS device including a laterally movable portion with piezo-resistive sensing elements and electrostatic actuating elements on trench side walls, and methods for producing the same 有权
标题翻译： MEMS器件包括具有压阻感测元件的侧向可移动部分和在沟槽侧壁上的静电致动元件及其制造方法
公开(公告)号：US07550358B2
公开(公告)日：2009-06-23
申请号：US11811572
申请日：2007-06-11
申请人： Xinxin Li , Heng Yang , Yuelin Wang , Songlin Feng
发明人： Xinxin Li , Heng Yang , Yuelin Wang , Songlin Feng
IPC分类号： H01L21/331
CPC分类号： B81C1/00547
摘要： A method to create piezoresistive sensing elements and electrostatic actuator elements on trench sidewalls is disclosed. P-type doped regions are formed in the upper surface of an n-type substrate. A trench is formed in the substrate (e.g. by DRIE process) intersecting with the doped regions and defining a portion of the substrate which is movable in the plane of the substrate relative to the rest of the substrate. Then diffusion of P-type dopant into the trench side-walls creates piezoresistive elements and electrode elements for electrostatic actuation. Owing to the intersection of two doped regions, there are good electrical paths between the electrical elements on the trench side-walls and the previously P-type doped portions on the wafer surface. The trench intersects with insulating elements, so that insulating elements mutually insulate adjacent electrical elements. P-n junctions between the electrical elements and the substrate insulate the electrical elements from the substrate.
摘要翻译：公开了一种在沟槽侧壁上形成压阻感测元件和静电致动元件的方法。在n型衬底的上表面上形成P型掺杂区域。在衬底中形成沟槽（例如通过DRIE工艺）与掺杂区域交叉并且限定衬底的相对于衬底的其余部分在衬底的平面中可移动的部分。然后，P型掺杂剂扩散到沟槽侧壁中，形成用于静电驱动的压阻元件和电极元件。由于两个掺杂区域的交点，沟槽侧壁上的电气元件与晶片表面上先前的P型掺杂部分之间存在良好的电气路径。沟槽与绝缘元件相交，使得绝缘元件相互绝缘相邻的电气元件。电气元件和衬底之间的P-n结将电气元件与衬底绝缘。

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